1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * RDA8810PL SoC
  4 *
  5 * Copyright (c) 2017 Andreas Färber
  6 * Copyright (c) 2018 Manivannan Sadhasivam
  7 */
  8
  9#include <dt-bindings/interrupt-controller/irq.h>
 10
 11/ {
 12	compatible = "rda,8810pl";
 13	interrupt-parent = <&intc>;
 14	#address-cells = <1>;
 15	#size-cells = <1>;
 16
 17	cpus {
 18		#address-cells = <1>;
 19		#size-cells = <0>;
 20
 21		cpu@0 {
 22			device_type = "cpu";
 23			compatible = "arm,cortex-a5";
 24			reg = <0x0>;
 25		};
 26	};
 27
 28	sram@100000 {
 29		compatible = "mmio-sram";
 30		reg = <0x100000 0x10000>;
 31		#address-cells = <1>;
 32		#size-cells = <1>;
 33		ranges;
 34	};
 35
 36	modem@10000000 {
 37		compatible = "simple-bus";
 38		#address-cells = <1>;
 39		#size-cells = <1>;
 40		ranges = <0x0 0x10000000 0xfffffff>;
 41
 42		gpioc@1a08000 {
 43			compatible = "rda,8810pl-gpio";
 44			reg = <0x1a08000 0x1000>;
 45			gpio-controller;
 46			#gpio-cells = <2>;
 47			ngpios = <32>;
 48		};
 49	};
 50
 51	apb@20800000 {
 52		compatible = "simple-bus";
 53		#address-cells = <1>;
 54		#size-cells = <1>;
 55		ranges = <0x0 0x20800000 0x100000>;
 56
 57		intc: interrupt-controller@0 {
 58			compatible = "rda,8810pl-intc";
 59			reg = <0x0 0x1000>;
 60			interrupt-controller;
 61			#interrupt-cells = <2>;
 62		};
 63	};
 64
 65	apb@20900000 {
 66		compatible = "simple-bus";
 67		#address-cells = <1>;
 68		#size-cells = <1>;
 69		ranges = <0x0 0x20900000 0x100000>;
 70
 71		timer@10000 {
 72			compatible = "rda,8810pl-timer";
 73			reg = <0x10000 0x1000>;
 74			interrupts = <16 IRQ_TYPE_LEVEL_HIGH>,
 75				     <17 IRQ_TYPE_LEVEL_HIGH>;
 76			interrupt-names = "hwtimer", "ostimer";
 77		};
 78
 79		gpioa@30000 {
 80			compatible = "rda,8810pl-gpio";
 81			reg = <0x30000 0x1000>;
 82			gpio-controller;
 83			#gpio-cells = <2>;
 84			ngpios = <32>;
 85			interrupt-controller;
 86			#interrupt-cells = <2>;
 87			interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
 88		};
 89
 90		gpiob@31000 {
 91			compatible = "rda,8810pl-gpio";
 92			reg = <0x31000 0x1000>;
 93			gpio-controller;
 94			#gpio-cells = <2>;
 95			ngpios = <32>;
 96			interrupt-controller;
 97			#interrupt-cells = <2>;
 98			interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
 99		};
100
101		gpiod@32000 {
102			compatible = "rda,8810pl-gpio";
103			reg = <0x32000 0x1000>;
104			gpio-controller;
105			#gpio-cells = <2>;
106			ngpios = <32>;
107			interrupt-controller;
108			#interrupt-cells = <2>;
109			interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
110		};
111	};
112
113	apb@20a00000 {
114		compatible = "simple-bus";
115		#address-cells = <1>;
116		#size-cells = <1>;
117		ranges = <0x0 0x20a00000 0x100000>;
118
119		uart1: serial@0 {
120			compatible = "rda,8810pl-uart";
121			reg = <0x0 0x1000>;
122			interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
123			status = "disabled";
124		};
125
126		uart2: serial@10000 {
127			compatible = "rda,8810pl-uart";
128			reg = <0x10000 0x1000>;
129			interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
130			status = "disabled";
131		};
132
133		uart3: serial@90000 {
134			compatible = "rda,8810pl-uart";
135			reg = <0x90000 0x1000>;
136			interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
137			status = "disabled";
138		};
139	};
140
141	l2: cache-controller@21100000 {
142		compatible = "arm,pl310-cache";
143		reg = <0x21100000 0x1000>;
144		cache-unified;
145		cache-level = <2>;
146	};
147};