Loading...
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2# Copyright 2019 Texas Instruments Incorporated
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Texas Instruments K2G Display Subsystem
9
10maintainers:
11 - Jyri Sarha <jsarha@ti.com>
12 - Tomi Valkeinen <tomi.valkeinen@ti.com>
13
14description: |
15 The K2G DSS is an ultra-light version of TI Keystone Display
16 SubSystem. It has only one output port and video plane. The
17 output is DPI.
18
19properties:
20 compatible:
21 const: ti,k2g-dss
22
23 reg:
24 items:
25 - description: cfg DSS top level
26 - description: common DISPC common
27 - description: VID1 video plane 1
28 - description: OVR1 overlay manager for vp1
29 - description: VP1 video port 1
30
31 reg-names:
32 items:
33 - const: cfg
34 - const: common
35 - const: vid1
36 - const: ovr1
37 - const: vp1
38
39 clocks:
40 items:
41 - description: fck DSS functional clock
42 - description: vp1 Video Port 1 pixel clock
43
44 clock-names:
45 items:
46 - const: fck
47 - const: vp1
48
49 interrupts:
50 maxItems: 1
51
52 power-domains:
53 maxItems: 1
54 description: phandle to the associated power domain
55
56 port:
57 $ref: /schemas/graph.yaml#/properties/port
58 description:
59 The DSS DPI output port node
60
61 max-memory-bandwidth:
62 $ref: /schemas/types.yaml#/definitions/uint32
63 description:
64 Input memory (from main memory to dispc) bandwidth limit in
65 bytes per second
66
67required:
68 - compatible
69 - reg
70 - reg-names
71 - clocks
72 - clock-names
73 - interrupts
74 - port
75
76additionalProperties: false
77
78examples:
79 - |
80 #include <dt-bindings/interrupt-controller/arm-gic.h>
81 #include <dt-bindings/interrupt-controller/irq.h>
82
83 dss: dss@2540000 {
84 compatible = "ti,k2g-dss";
85 reg = <0x02540000 0x400>,
86 <0x02550000 0x1000>,
87 <0x02557000 0x1000>,
88 <0x0255a800 0x100>,
89 <0x0255ac00 0x100>;
90 reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
91 clocks = <&k2g_clks 0x2 0>,
92 <&k2g_clks 0x2 1>;
93 clock-names = "fck", "vp1";
94 interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>;
95
96 power-domains = <&k2g_pds 0x2>;
97
98 max-memory-bandwidth = <230000000>;
99
100 port {
101 dpi_out: endpoint {
102 remote-endpoint = <&sii9022_in>;
103 };
104 };
105 };