1/* SPDX-License-Identifier: GPL-2.0+ */
 2
 3#ifndef _AMDGPU_VKMS_H_
 4#define _AMDGPU_VKMS_H_
 5
 6#define XRES_DEF  1024
 7#define YRES_DEF   768
 8
 9#define XRES_MAX  16384
10#define YRES_MAX  16384
11
12#define drm_crtc_to_amdgpu_vkms_output(target) \
13	container_of(target, struct amdgpu_vkms_output, crtc.base)
14
15extern const struct amdgpu_ip_block_version amdgpu_vkms_ip_block;
16
17struct amdgpu_vkms_output {
18	struct amdgpu_crtc crtc;
19	struct drm_encoder encoder;
20	struct drm_connector connector;
21	ktime_t period_ns;
22	struct drm_pending_vblank_event *event;
23};
24
25#endif /* _AMDGPU_VKMS_H_ */

 1/* SPDX-License-Identifier: GPL-2.0+ */
 2
 3#ifndef _AMDGPU_VKMS_H_
 4#define _AMDGPU_VKMS_H_
 5
 6#define XRES_DEF  1024
 7#define YRES_DEF   768
 8
 9#define XRES_MAX  16384
10#define YRES_MAX  16384
11
12#define drm_crtc_to_amdgpu_vkms_output(target) \
13	container_of(target, struct amdgpu_vkms_output, crtc.base)
14
15extern const struct amdgpu_ip_block_version amdgpu_vkms_ip_block;
16
17struct amdgpu_vkms_output {
18	struct amdgpu_crtc crtc;
19	struct drm_encoder encoder;
20	struct drm_connector connector;
21	ktime_t period_ns;
22	struct drm_pending_vblank_event *event;
23};
24
25#endif /* _AMDGPU_VKMS_H_ */