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1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2018, Intel Corporation. */
3
4/* The driver transmit and receive code */
5
6#include <linux/mm.h>
7#include <linux/netdevice.h>
8#include <linux/prefetch.h>
9#include <linux/bpf_trace.h>
10#include <net/dsfield.h>
11#include <net/mpls.h>
12#include <net/xdp.h>
13#include "ice_txrx_lib.h"
14#include "ice_lib.h"
15#include "ice.h"
16#include "ice_trace.h"
17#include "ice_dcb_lib.h"
18#include "ice_xsk.h"
19#include "ice_eswitch.h"
20
21#define ICE_RX_HDR_SIZE 256
22
23#define FDIR_DESC_RXDID 0x40
24#define ICE_FDIR_CLEAN_DELAY 10
25
26/**
27 * ice_prgm_fdir_fltr - Program a Flow Director filter
28 * @vsi: VSI to send dummy packet
29 * @fdir_desc: flow director descriptor
30 * @raw_packet: allocated buffer for flow director
31 */
32int
33ice_prgm_fdir_fltr(struct ice_vsi *vsi, struct ice_fltr_desc *fdir_desc,
34 u8 *raw_packet)
35{
36 struct ice_tx_buf *tx_buf, *first;
37 struct ice_fltr_desc *f_desc;
38 struct ice_tx_desc *tx_desc;
39 struct ice_tx_ring *tx_ring;
40 struct device *dev;
41 dma_addr_t dma;
42 u32 td_cmd;
43 u16 i;
44
45 /* VSI and Tx ring */
46 if (!vsi)
47 return -ENOENT;
48 tx_ring = vsi->tx_rings[0];
49 if (!tx_ring || !tx_ring->desc)
50 return -ENOENT;
51 dev = tx_ring->dev;
52
53 /* we are using two descriptors to add/del a filter and we can wait */
54 for (i = ICE_FDIR_CLEAN_DELAY; ICE_DESC_UNUSED(tx_ring) < 2; i--) {
55 if (!i)
56 return -EAGAIN;
57 msleep_interruptible(1);
58 }
59
60 dma = dma_map_single(dev, raw_packet, ICE_FDIR_MAX_RAW_PKT_SIZE,
61 DMA_TO_DEVICE);
62
63 if (dma_mapping_error(dev, dma))
64 return -EINVAL;
65
66 /* grab the next descriptor */
67 i = tx_ring->next_to_use;
68 first = &tx_ring->tx_buf[i];
69 f_desc = ICE_TX_FDIRDESC(tx_ring, i);
70 memcpy(f_desc, fdir_desc, sizeof(*f_desc));
71
72 i++;
73 i = (i < tx_ring->count) ? i : 0;
74 tx_desc = ICE_TX_DESC(tx_ring, i);
75 tx_buf = &tx_ring->tx_buf[i];
76
77 i++;
78 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
79
80 memset(tx_buf, 0, sizeof(*tx_buf));
81 dma_unmap_len_set(tx_buf, len, ICE_FDIR_MAX_RAW_PKT_SIZE);
82 dma_unmap_addr_set(tx_buf, dma, dma);
83
84 tx_desc->buf_addr = cpu_to_le64(dma);
85 td_cmd = ICE_TXD_LAST_DESC_CMD | ICE_TX_DESC_CMD_DUMMY |
86 ICE_TX_DESC_CMD_RE;
87
88 tx_buf->type = ICE_TX_BUF_DUMMY;
89 tx_buf->raw_buf = raw_packet;
90
91 tx_desc->cmd_type_offset_bsz =
92 ice_build_ctob(td_cmd, 0, ICE_FDIR_MAX_RAW_PKT_SIZE, 0);
93
94 /* Force memory write to complete before letting h/w know
95 * there are new descriptors to fetch.
96 */
97 wmb();
98
99 /* mark the data descriptor to be watched */
100 first->next_to_watch = tx_desc;
101
102 writel(tx_ring->next_to_use, tx_ring->tail);
103
104 return 0;
105}
106
107/**
108 * ice_unmap_and_free_tx_buf - Release a Tx buffer
109 * @ring: the ring that owns the buffer
110 * @tx_buf: the buffer to free
111 */
112static void
113ice_unmap_and_free_tx_buf(struct ice_tx_ring *ring, struct ice_tx_buf *tx_buf)
114{
115 if (dma_unmap_len(tx_buf, len))
116 dma_unmap_page(ring->dev,
117 dma_unmap_addr(tx_buf, dma),
118 dma_unmap_len(tx_buf, len),
119 DMA_TO_DEVICE);
120
121 switch (tx_buf->type) {
122 case ICE_TX_BUF_DUMMY:
123 devm_kfree(ring->dev, tx_buf->raw_buf);
124 break;
125 case ICE_TX_BUF_SKB:
126 dev_kfree_skb_any(tx_buf->skb);
127 break;
128 case ICE_TX_BUF_XDP_TX:
129 page_frag_free(tx_buf->raw_buf);
130 break;
131 case ICE_TX_BUF_XDP_XMIT:
132 xdp_return_frame(tx_buf->xdpf);
133 break;
134 }
135
136 tx_buf->next_to_watch = NULL;
137 tx_buf->type = ICE_TX_BUF_EMPTY;
138 dma_unmap_len_set(tx_buf, len, 0);
139 /* tx_buf must be completely set up in the transmit path */
140}
141
142static struct netdev_queue *txring_txq(const struct ice_tx_ring *ring)
143{
144 return netdev_get_tx_queue(ring->netdev, ring->q_index);
145}
146
147/**
148 * ice_clean_tx_ring - Free any empty Tx buffers
149 * @tx_ring: ring to be cleaned
150 */
151void ice_clean_tx_ring(struct ice_tx_ring *tx_ring)
152{
153 u32 size;
154 u16 i;
155
156 if (ice_ring_is_xdp(tx_ring) && tx_ring->xsk_pool) {
157 ice_xsk_clean_xdp_ring(tx_ring);
158 goto tx_skip_free;
159 }
160
161 /* ring already cleared, nothing to do */
162 if (!tx_ring->tx_buf)
163 return;
164
165 /* Free all the Tx ring sk_buffs */
166 for (i = 0; i < tx_ring->count; i++)
167 ice_unmap_and_free_tx_buf(tx_ring, &tx_ring->tx_buf[i]);
168
169tx_skip_free:
170 memset(tx_ring->tx_buf, 0, sizeof(*tx_ring->tx_buf) * tx_ring->count);
171
172 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
173 PAGE_SIZE);
174 /* Zero out the descriptor ring */
175 memset(tx_ring->desc, 0, size);
176
177 tx_ring->next_to_use = 0;
178 tx_ring->next_to_clean = 0;
179
180 if (!tx_ring->netdev)
181 return;
182
183 /* cleanup Tx queue statistics */
184 netdev_tx_reset_queue(txring_txq(tx_ring));
185}
186
187/**
188 * ice_free_tx_ring - Free Tx resources per queue
189 * @tx_ring: Tx descriptor ring for a specific queue
190 *
191 * Free all transmit software resources
192 */
193void ice_free_tx_ring(struct ice_tx_ring *tx_ring)
194{
195 u32 size;
196
197 ice_clean_tx_ring(tx_ring);
198 devm_kfree(tx_ring->dev, tx_ring->tx_buf);
199 tx_ring->tx_buf = NULL;
200
201 if (tx_ring->desc) {
202 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
203 PAGE_SIZE);
204 dmam_free_coherent(tx_ring->dev, size,
205 tx_ring->desc, tx_ring->dma);
206 tx_ring->desc = NULL;
207 }
208}
209
210/**
211 * ice_clean_tx_irq - Reclaim resources after transmit completes
212 * @tx_ring: Tx ring to clean
213 * @napi_budget: Used to determine if we are in netpoll
214 *
215 * Returns true if there's any budget left (e.g. the clean is finished)
216 */
217static bool ice_clean_tx_irq(struct ice_tx_ring *tx_ring, int napi_budget)
218{
219 unsigned int total_bytes = 0, total_pkts = 0;
220 unsigned int budget = ICE_DFLT_IRQ_WORK;
221 struct ice_vsi *vsi = tx_ring->vsi;
222 s16 i = tx_ring->next_to_clean;
223 struct ice_tx_desc *tx_desc;
224 struct ice_tx_buf *tx_buf;
225
226 /* get the bql data ready */
227 netdev_txq_bql_complete_prefetchw(txring_txq(tx_ring));
228
229 tx_buf = &tx_ring->tx_buf[i];
230 tx_desc = ICE_TX_DESC(tx_ring, i);
231 i -= tx_ring->count;
232
233 prefetch(&vsi->state);
234
235 do {
236 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
237
238 /* if next_to_watch is not set then there is no work pending */
239 if (!eop_desc)
240 break;
241
242 /* follow the guidelines of other drivers */
243 prefetchw(&tx_buf->skb->users);
244
245 smp_rmb(); /* prevent any other reads prior to eop_desc */
246
247 ice_trace(clean_tx_irq, tx_ring, tx_desc, tx_buf);
248 /* if the descriptor isn't done, no work yet to do */
249 if (!(eop_desc->cmd_type_offset_bsz &
250 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
251 break;
252
253 /* clear next_to_watch to prevent false hangs */
254 tx_buf->next_to_watch = NULL;
255
256 /* update the statistics for this packet */
257 total_bytes += tx_buf->bytecount;
258 total_pkts += tx_buf->gso_segs;
259
260 /* free the skb */
261 napi_consume_skb(tx_buf->skb, napi_budget);
262
263 /* unmap skb header data */
264 dma_unmap_single(tx_ring->dev,
265 dma_unmap_addr(tx_buf, dma),
266 dma_unmap_len(tx_buf, len),
267 DMA_TO_DEVICE);
268
269 /* clear tx_buf data */
270 tx_buf->type = ICE_TX_BUF_EMPTY;
271 dma_unmap_len_set(tx_buf, len, 0);
272
273 /* unmap remaining buffers */
274 while (tx_desc != eop_desc) {
275 ice_trace(clean_tx_irq_unmap, tx_ring, tx_desc, tx_buf);
276 tx_buf++;
277 tx_desc++;
278 i++;
279 if (unlikely(!i)) {
280 i -= tx_ring->count;
281 tx_buf = tx_ring->tx_buf;
282 tx_desc = ICE_TX_DESC(tx_ring, 0);
283 }
284
285 /* unmap any remaining paged data */
286 if (dma_unmap_len(tx_buf, len)) {
287 dma_unmap_page(tx_ring->dev,
288 dma_unmap_addr(tx_buf, dma),
289 dma_unmap_len(tx_buf, len),
290 DMA_TO_DEVICE);
291 dma_unmap_len_set(tx_buf, len, 0);
292 }
293 }
294 ice_trace(clean_tx_irq_unmap_eop, tx_ring, tx_desc, tx_buf);
295
296 /* move us one more past the eop_desc for start of next pkt */
297 tx_buf++;
298 tx_desc++;
299 i++;
300 if (unlikely(!i)) {
301 i -= tx_ring->count;
302 tx_buf = tx_ring->tx_buf;
303 tx_desc = ICE_TX_DESC(tx_ring, 0);
304 }
305
306 prefetch(tx_desc);
307
308 /* update budget accounting */
309 budget--;
310 } while (likely(budget));
311
312 i += tx_ring->count;
313 tx_ring->next_to_clean = i;
314
315 ice_update_tx_ring_stats(tx_ring, total_pkts, total_bytes);
316 netdev_tx_completed_queue(txring_txq(tx_ring), total_pkts, total_bytes);
317
318#define TX_WAKE_THRESHOLD ((s16)(DESC_NEEDED * 2))
319 if (unlikely(total_pkts && netif_carrier_ok(tx_ring->netdev) &&
320 (ICE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
321 /* Make sure that anybody stopping the queue after this
322 * sees the new next_to_clean.
323 */
324 smp_mb();
325 if (netif_tx_queue_stopped(txring_txq(tx_ring)) &&
326 !test_bit(ICE_VSI_DOWN, vsi->state)) {
327 netif_tx_wake_queue(txring_txq(tx_ring));
328 ++tx_ring->ring_stats->tx_stats.restart_q;
329 }
330 }
331
332 return !!budget;
333}
334
335/**
336 * ice_setup_tx_ring - Allocate the Tx descriptors
337 * @tx_ring: the Tx ring to set up
338 *
339 * Return 0 on success, negative on error
340 */
341int ice_setup_tx_ring(struct ice_tx_ring *tx_ring)
342{
343 struct device *dev = tx_ring->dev;
344 u32 size;
345
346 if (!dev)
347 return -ENOMEM;
348
349 /* warn if we are about to overwrite the pointer */
350 WARN_ON(tx_ring->tx_buf);
351 tx_ring->tx_buf =
352 devm_kcalloc(dev, sizeof(*tx_ring->tx_buf), tx_ring->count,
353 GFP_KERNEL);
354 if (!tx_ring->tx_buf)
355 return -ENOMEM;
356
357 /* round up to nearest page */
358 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
359 PAGE_SIZE);
360 tx_ring->desc = dmam_alloc_coherent(dev, size, &tx_ring->dma,
361 GFP_KERNEL);
362 if (!tx_ring->desc) {
363 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
364 size);
365 goto err;
366 }
367
368 tx_ring->next_to_use = 0;
369 tx_ring->next_to_clean = 0;
370 tx_ring->ring_stats->tx_stats.prev_pkt = -1;
371 return 0;
372
373err:
374 devm_kfree(dev, tx_ring->tx_buf);
375 tx_ring->tx_buf = NULL;
376 return -ENOMEM;
377}
378
379/**
380 * ice_clean_rx_ring - Free Rx buffers
381 * @rx_ring: ring to be cleaned
382 */
383void ice_clean_rx_ring(struct ice_rx_ring *rx_ring)
384{
385 struct xdp_buff *xdp = &rx_ring->xdp;
386 struct device *dev = rx_ring->dev;
387 u32 size;
388 u16 i;
389
390 /* ring already cleared, nothing to do */
391 if (!rx_ring->rx_buf)
392 return;
393
394 if (rx_ring->xsk_pool) {
395 ice_xsk_clean_rx_ring(rx_ring);
396 goto rx_skip_free;
397 }
398
399 if (xdp->data) {
400 xdp_return_buff(xdp);
401 xdp->data = NULL;
402 }
403
404 /* Free all the Rx ring sk_buffs */
405 for (i = 0; i < rx_ring->count; i++) {
406 struct ice_rx_buf *rx_buf = &rx_ring->rx_buf[i];
407
408 if (!rx_buf->page)
409 continue;
410
411 /* Invalidate cache lines that may have been written to by
412 * device so that we avoid corrupting memory.
413 */
414 dma_sync_single_range_for_cpu(dev, rx_buf->dma,
415 rx_buf->page_offset,
416 rx_ring->rx_buf_len,
417 DMA_FROM_DEVICE);
418
419 /* free resources associated with mapping */
420 dma_unmap_page_attrs(dev, rx_buf->dma, ice_rx_pg_size(rx_ring),
421 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
422 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
423
424 rx_buf->page = NULL;
425 rx_buf->page_offset = 0;
426 }
427
428rx_skip_free:
429 if (rx_ring->xsk_pool)
430 memset(rx_ring->xdp_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->xdp_buf)));
431 else
432 memset(rx_ring->rx_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->rx_buf)));
433
434 /* Zero out the descriptor ring */
435 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
436 PAGE_SIZE);
437 memset(rx_ring->desc, 0, size);
438
439 rx_ring->next_to_alloc = 0;
440 rx_ring->next_to_clean = 0;
441 rx_ring->first_desc = 0;
442 rx_ring->next_to_use = 0;
443}
444
445/**
446 * ice_free_rx_ring - Free Rx resources
447 * @rx_ring: ring to clean the resources from
448 *
449 * Free all receive software resources
450 */
451void ice_free_rx_ring(struct ice_rx_ring *rx_ring)
452{
453 u32 size;
454
455 ice_clean_rx_ring(rx_ring);
456 if (rx_ring->vsi->type == ICE_VSI_PF)
457 if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
458 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
459 rx_ring->xdp_prog = NULL;
460 if (rx_ring->xsk_pool) {
461 kfree(rx_ring->xdp_buf);
462 rx_ring->xdp_buf = NULL;
463 } else {
464 kfree(rx_ring->rx_buf);
465 rx_ring->rx_buf = NULL;
466 }
467
468 if (rx_ring->desc) {
469 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
470 PAGE_SIZE);
471 dmam_free_coherent(rx_ring->dev, size,
472 rx_ring->desc, rx_ring->dma);
473 rx_ring->desc = NULL;
474 }
475}
476
477/**
478 * ice_setup_rx_ring - Allocate the Rx descriptors
479 * @rx_ring: the Rx ring to set up
480 *
481 * Return 0 on success, negative on error
482 */
483int ice_setup_rx_ring(struct ice_rx_ring *rx_ring)
484{
485 struct device *dev = rx_ring->dev;
486 u32 size;
487
488 if (!dev)
489 return -ENOMEM;
490
491 /* warn if we are about to overwrite the pointer */
492 WARN_ON(rx_ring->rx_buf);
493 rx_ring->rx_buf =
494 kcalloc(rx_ring->count, sizeof(*rx_ring->rx_buf), GFP_KERNEL);
495 if (!rx_ring->rx_buf)
496 return -ENOMEM;
497
498 /* round up to nearest page */
499 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
500 PAGE_SIZE);
501 rx_ring->desc = dmam_alloc_coherent(dev, size, &rx_ring->dma,
502 GFP_KERNEL);
503 if (!rx_ring->desc) {
504 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
505 size);
506 goto err;
507 }
508
509 rx_ring->next_to_use = 0;
510 rx_ring->next_to_clean = 0;
511 rx_ring->first_desc = 0;
512
513 if (ice_is_xdp_ena_vsi(rx_ring->vsi))
514 WRITE_ONCE(rx_ring->xdp_prog, rx_ring->vsi->xdp_prog);
515
516 return 0;
517
518err:
519 kfree(rx_ring->rx_buf);
520 rx_ring->rx_buf = NULL;
521 return -ENOMEM;
522}
523
524/**
525 * ice_rx_frame_truesize
526 * @rx_ring: ptr to Rx ring
527 * @size: size
528 *
529 * calculate the truesize with taking into the account PAGE_SIZE of
530 * underlying arch
531 */
532static unsigned int
533ice_rx_frame_truesize(struct ice_rx_ring *rx_ring, const unsigned int size)
534{
535 unsigned int truesize;
536
537#if (PAGE_SIZE < 8192)
538 truesize = ice_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
539#else
540 truesize = rx_ring->rx_offset ?
541 SKB_DATA_ALIGN(rx_ring->rx_offset + size) +
542 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
543 SKB_DATA_ALIGN(size);
544#endif
545 return truesize;
546}
547
548/**
549 * ice_run_xdp - Executes an XDP program on initialized xdp_buff
550 * @rx_ring: Rx ring
551 * @xdp: xdp_buff used as input to the XDP program
552 * @xdp_prog: XDP program to run
553 * @xdp_ring: ring to be used for XDP_TX action
554 * @rx_buf: Rx buffer to store the XDP action
555 * @eop_desc: Last descriptor in packet to read metadata from
556 *
557 * Returns any of ICE_XDP_{PASS, CONSUMED, TX, REDIR}
558 */
559static void
560ice_run_xdp(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
561 struct bpf_prog *xdp_prog, struct ice_tx_ring *xdp_ring,
562 struct ice_rx_buf *rx_buf, union ice_32b_rx_flex_desc *eop_desc)
563{
564 unsigned int ret = ICE_XDP_PASS;
565 u32 act;
566
567 if (!xdp_prog)
568 goto exit;
569
570 ice_xdp_meta_set_desc(xdp, eop_desc);
571
572 act = bpf_prog_run_xdp(xdp_prog, xdp);
573 switch (act) {
574 case XDP_PASS:
575 break;
576 case XDP_TX:
577 if (static_branch_unlikely(&ice_xdp_locking_key))
578 spin_lock(&xdp_ring->tx_lock);
579 ret = __ice_xmit_xdp_ring(xdp, xdp_ring, false);
580 if (static_branch_unlikely(&ice_xdp_locking_key))
581 spin_unlock(&xdp_ring->tx_lock);
582 if (ret == ICE_XDP_CONSUMED)
583 goto out_failure;
584 break;
585 case XDP_REDIRECT:
586 if (xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))
587 goto out_failure;
588 ret = ICE_XDP_REDIR;
589 break;
590 default:
591 bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act);
592 fallthrough;
593 case XDP_ABORTED:
594out_failure:
595 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
596 fallthrough;
597 case XDP_DROP:
598 ret = ICE_XDP_CONSUMED;
599 }
600exit:
601 ice_set_rx_bufs_act(xdp, rx_ring, ret);
602}
603
604/**
605 * ice_xmit_xdp_ring - submit frame to XDP ring for transmission
606 * @xdpf: XDP frame that will be converted to XDP buff
607 * @xdp_ring: XDP ring for transmission
608 */
609static int ice_xmit_xdp_ring(const struct xdp_frame *xdpf,
610 struct ice_tx_ring *xdp_ring)
611{
612 struct xdp_buff xdp;
613
614 xdp.data_hard_start = (void *)xdpf;
615 xdp.data = xdpf->data;
616 xdp.data_end = xdp.data + xdpf->len;
617 xdp.frame_sz = xdpf->frame_sz;
618 xdp.flags = xdpf->flags;
619
620 return __ice_xmit_xdp_ring(&xdp, xdp_ring, true);
621}
622
623/**
624 * ice_xdp_xmit - submit packets to XDP ring for transmission
625 * @dev: netdev
626 * @n: number of XDP frames to be transmitted
627 * @frames: XDP frames to be transmitted
628 * @flags: transmit flags
629 *
630 * Returns number of frames successfully sent. Failed frames
631 * will be free'ed by XDP core.
632 * For error cases, a negative errno code is returned and no-frames
633 * are transmitted (caller must handle freeing frames).
634 */
635int
636ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
637 u32 flags)
638{
639 struct ice_netdev_priv *np = netdev_priv(dev);
640 unsigned int queue_index = smp_processor_id();
641 struct ice_vsi *vsi = np->vsi;
642 struct ice_tx_ring *xdp_ring;
643 struct ice_tx_buf *tx_buf;
644 int nxmit = 0, i;
645
646 if (test_bit(ICE_VSI_DOWN, vsi->state))
647 return -ENETDOWN;
648
649 if (!ice_is_xdp_ena_vsi(vsi))
650 return -ENXIO;
651
652 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
653 return -EINVAL;
654
655 if (static_branch_unlikely(&ice_xdp_locking_key)) {
656 queue_index %= vsi->num_xdp_txq;
657 xdp_ring = vsi->xdp_rings[queue_index];
658 spin_lock(&xdp_ring->tx_lock);
659 } else {
660 /* Generally, should not happen */
661 if (unlikely(queue_index >= vsi->num_xdp_txq))
662 return -ENXIO;
663 xdp_ring = vsi->xdp_rings[queue_index];
664 }
665
666 tx_buf = &xdp_ring->tx_buf[xdp_ring->next_to_use];
667 for (i = 0; i < n; i++) {
668 const struct xdp_frame *xdpf = frames[i];
669 int err;
670
671 err = ice_xmit_xdp_ring(xdpf, xdp_ring);
672 if (err != ICE_XDP_TX)
673 break;
674 nxmit++;
675 }
676
677 tx_buf->rs_idx = ice_set_rs_bit(xdp_ring);
678 if (unlikely(flags & XDP_XMIT_FLUSH))
679 ice_xdp_ring_update_tail(xdp_ring);
680
681 if (static_branch_unlikely(&ice_xdp_locking_key))
682 spin_unlock(&xdp_ring->tx_lock);
683
684 return nxmit;
685}
686
687/**
688 * ice_alloc_mapped_page - recycle or make a new page
689 * @rx_ring: ring to use
690 * @bi: rx_buf struct to modify
691 *
692 * Returns true if the page was successfully allocated or
693 * reused.
694 */
695static bool
696ice_alloc_mapped_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *bi)
697{
698 struct page *page = bi->page;
699 dma_addr_t dma;
700
701 /* since we are recycling buffers we should seldom need to alloc */
702 if (likely(page))
703 return true;
704
705 /* alloc new page for storage */
706 page = dev_alloc_pages(ice_rx_pg_order(rx_ring));
707 if (unlikely(!page)) {
708 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
709 return false;
710 }
711
712 /* map page for use */
713 dma = dma_map_page_attrs(rx_ring->dev, page, 0, ice_rx_pg_size(rx_ring),
714 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
715
716 /* if mapping failed free memory back to system since
717 * there isn't much point in holding memory we can't use
718 */
719 if (dma_mapping_error(rx_ring->dev, dma)) {
720 __free_pages(page, ice_rx_pg_order(rx_ring));
721 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
722 return false;
723 }
724
725 bi->dma = dma;
726 bi->page = page;
727 bi->page_offset = rx_ring->rx_offset;
728 page_ref_add(page, USHRT_MAX - 1);
729 bi->pagecnt_bias = USHRT_MAX;
730
731 return true;
732}
733
734/**
735 * ice_alloc_rx_bufs - Replace used receive buffers
736 * @rx_ring: ring to place buffers on
737 * @cleaned_count: number of buffers to replace
738 *
739 * Returns false if all allocations were successful, true if any fail. Returning
740 * true signals to the caller that we didn't replace cleaned_count buffers and
741 * there is more work to do.
742 *
743 * First, try to clean "cleaned_count" Rx buffers. Then refill the cleaned Rx
744 * buffers. Then bump tail at most one time. Grouping like this lets us avoid
745 * multiple tail writes per call.
746 */
747bool ice_alloc_rx_bufs(struct ice_rx_ring *rx_ring, unsigned int cleaned_count)
748{
749 union ice_32b_rx_flex_desc *rx_desc;
750 u16 ntu = rx_ring->next_to_use;
751 struct ice_rx_buf *bi;
752
753 /* do nothing if no valid netdev defined */
754 if ((!rx_ring->netdev && rx_ring->vsi->type != ICE_VSI_CTRL) ||
755 !cleaned_count)
756 return false;
757
758 /* get the Rx descriptor and buffer based on next_to_use */
759 rx_desc = ICE_RX_DESC(rx_ring, ntu);
760 bi = &rx_ring->rx_buf[ntu];
761
762 do {
763 /* if we fail here, we have work remaining */
764 if (!ice_alloc_mapped_page(rx_ring, bi))
765 break;
766
767 /* sync the buffer for use by the device */
768 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
769 bi->page_offset,
770 rx_ring->rx_buf_len,
771 DMA_FROM_DEVICE);
772
773 /* Refresh the desc even if buffer_addrs didn't change
774 * because each write-back erases this info.
775 */
776 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
777
778 rx_desc++;
779 bi++;
780 ntu++;
781 if (unlikely(ntu == rx_ring->count)) {
782 rx_desc = ICE_RX_DESC(rx_ring, 0);
783 bi = rx_ring->rx_buf;
784 ntu = 0;
785 }
786
787 /* clear the status bits for the next_to_use descriptor */
788 rx_desc->wb.status_error0 = 0;
789
790 cleaned_count--;
791 } while (cleaned_count);
792
793 if (rx_ring->next_to_use != ntu)
794 ice_release_rx_desc(rx_ring, ntu);
795
796 return !!cleaned_count;
797}
798
799/**
800 * ice_rx_buf_adjust_pg_offset - Prepare Rx buffer for reuse
801 * @rx_buf: Rx buffer to adjust
802 * @size: Size of adjustment
803 *
804 * Update the offset within page so that Rx buf will be ready to be reused.
805 * For systems with PAGE_SIZE < 8192 this function will flip the page offset
806 * so the second half of page assigned to Rx buffer will be used, otherwise
807 * the offset is moved by "size" bytes
808 */
809static void
810ice_rx_buf_adjust_pg_offset(struct ice_rx_buf *rx_buf, unsigned int size)
811{
812#if (PAGE_SIZE < 8192)
813 /* flip page offset to other buffer */
814 rx_buf->page_offset ^= size;
815#else
816 /* move offset up to the next cache line */
817 rx_buf->page_offset += size;
818#endif
819}
820
821/**
822 * ice_can_reuse_rx_page - Determine if page can be reused for another Rx
823 * @rx_buf: buffer containing the page
824 *
825 * If page is reusable, we have a green light for calling ice_reuse_rx_page,
826 * which will assign the current buffer to the buffer that next_to_alloc is
827 * pointing to; otherwise, the DMA mapping needs to be destroyed and
828 * page freed
829 */
830static bool
831ice_can_reuse_rx_page(struct ice_rx_buf *rx_buf)
832{
833 unsigned int pagecnt_bias = rx_buf->pagecnt_bias;
834 struct page *page = rx_buf->page;
835
836 /* avoid re-using remote and pfmemalloc pages */
837 if (!dev_page_is_reusable(page))
838 return false;
839
840#if (PAGE_SIZE < 8192)
841 /* if we are only owner of page we can reuse it */
842 if (unlikely(rx_buf->pgcnt - pagecnt_bias > 1))
843 return false;
844#else
845#define ICE_LAST_OFFSET \
846 (SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_2048)
847 if (rx_buf->page_offset > ICE_LAST_OFFSET)
848 return false;
849#endif /* PAGE_SIZE < 8192) */
850
851 /* If we have drained the page fragment pool we need to update
852 * the pagecnt_bias and page count so that we fully restock the
853 * number of references the driver holds.
854 */
855 if (unlikely(pagecnt_bias == 1)) {
856 page_ref_add(page, USHRT_MAX - 1);
857 rx_buf->pagecnt_bias = USHRT_MAX;
858 }
859
860 return true;
861}
862
863/**
864 * ice_add_xdp_frag - Add contents of Rx buffer to xdp buf as a frag
865 * @rx_ring: Rx descriptor ring to transact packets on
866 * @xdp: xdp buff to place the data into
867 * @rx_buf: buffer containing page to add
868 * @size: packet length from rx_desc
869 *
870 * This function will add the data contained in rx_buf->page to the xdp buf.
871 * It will just attach the page as a frag.
872 */
873static int
874ice_add_xdp_frag(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
875 struct ice_rx_buf *rx_buf, const unsigned int size)
876{
877 struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);
878
879 if (!size)
880 return 0;
881
882 if (!xdp_buff_has_frags(xdp)) {
883 sinfo->nr_frags = 0;
884 sinfo->xdp_frags_size = 0;
885 xdp_buff_set_frags_flag(xdp);
886 }
887
888 if (unlikely(sinfo->nr_frags == MAX_SKB_FRAGS)) {
889 ice_set_rx_bufs_act(xdp, rx_ring, ICE_XDP_CONSUMED);
890 return -ENOMEM;
891 }
892
893 __skb_fill_page_desc_noacc(sinfo, sinfo->nr_frags++, rx_buf->page,
894 rx_buf->page_offset, size);
895 sinfo->xdp_frags_size += size;
896 /* remember frag count before XDP prog execution; bpf_xdp_adjust_tail()
897 * can pop off frags but driver has to handle it on its own
898 */
899 rx_ring->nr_frags = sinfo->nr_frags;
900
901 if (page_is_pfmemalloc(rx_buf->page))
902 xdp_buff_set_frag_pfmemalloc(xdp);
903
904 return 0;
905}
906
907/**
908 * ice_reuse_rx_page - page flip buffer and store it back on the ring
909 * @rx_ring: Rx descriptor ring to store buffers on
910 * @old_buf: donor buffer to have page reused
911 *
912 * Synchronizes page for reuse by the adapter
913 */
914static void
915ice_reuse_rx_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *old_buf)
916{
917 u16 nta = rx_ring->next_to_alloc;
918 struct ice_rx_buf *new_buf;
919
920 new_buf = &rx_ring->rx_buf[nta];
921
922 /* update, and store next to alloc */
923 nta++;
924 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
925
926 /* Transfer page from old buffer to new buffer.
927 * Move each member individually to avoid possible store
928 * forwarding stalls and unnecessary copy of skb.
929 */
930 new_buf->dma = old_buf->dma;
931 new_buf->page = old_buf->page;
932 new_buf->page_offset = old_buf->page_offset;
933 new_buf->pagecnt_bias = old_buf->pagecnt_bias;
934}
935
936/**
937 * ice_get_rx_buf - Fetch Rx buffer and synchronize data for use
938 * @rx_ring: Rx descriptor ring to transact packets on
939 * @size: size of buffer to add to skb
940 * @ntc: index of next to clean element
941 *
942 * This function will pull an Rx buffer from the ring and synchronize it
943 * for use by the CPU.
944 */
945static struct ice_rx_buf *
946ice_get_rx_buf(struct ice_rx_ring *rx_ring, const unsigned int size,
947 const unsigned int ntc)
948{
949 struct ice_rx_buf *rx_buf;
950
951 rx_buf = &rx_ring->rx_buf[ntc];
952 rx_buf->pgcnt =
953#if (PAGE_SIZE < 8192)
954 page_count(rx_buf->page);
955#else
956 0;
957#endif
958 prefetchw(rx_buf->page);
959
960 if (!size)
961 return rx_buf;
962 /* we are reusing so sync this buffer for CPU use */
963 dma_sync_single_range_for_cpu(rx_ring->dev, rx_buf->dma,
964 rx_buf->page_offset, size,
965 DMA_FROM_DEVICE);
966
967 /* We have pulled a buffer for use, so decrement pagecnt_bias */
968 rx_buf->pagecnt_bias--;
969
970 return rx_buf;
971}
972
973/**
974 * ice_build_skb - Build skb around an existing buffer
975 * @rx_ring: Rx descriptor ring to transact packets on
976 * @xdp: xdp_buff pointing to the data
977 *
978 * This function builds an skb around an existing XDP buffer, taking care
979 * to set up the skb correctly and avoid any memcpy overhead. Driver has
980 * already combined frags (if any) to skb_shared_info.
981 */
982static struct sk_buff *
983ice_build_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
984{
985 u8 metasize = xdp->data - xdp->data_meta;
986 struct skb_shared_info *sinfo = NULL;
987 unsigned int nr_frags;
988 struct sk_buff *skb;
989
990 if (unlikely(xdp_buff_has_frags(xdp))) {
991 sinfo = xdp_get_shared_info_from_buff(xdp);
992 nr_frags = sinfo->nr_frags;
993 }
994
995 /* Prefetch first cache line of first page. If xdp->data_meta
996 * is unused, this points exactly as xdp->data, otherwise we
997 * likely have a consumer accessing first few bytes of meta
998 * data, and then actual data.
999 */
1000 net_prefetch(xdp->data_meta);
1001 /* build an skb around the page buffer */
1002 skb = napi_build_skb(xdp->data_hard_start, xdp->frame_sz);
1003 if (unlikely(!skb))
1004 return NULL;
1005
1006 /* must to record Rx queue, otherwise OS features such as
1007 * symmetric queue won't work
1008 */
1009 skb_record_rx_queue(skb, rx_ring->q_index);
1010
1011 /* update pointers within the skb to store the data */
1012 skb_reserve(skb, xdp->data - xdp->data_hard_start);
1013 __skb_put(skb, xdp->data_end - xdp->data);
1014 if (metasize)
1015 skb_metadata_set(skb, metasize);
1016
1017 if (unlikely(xdp_buff_has_frags(xdp)))
1018 xdp_update_skb_shared_info(skb, nr_frags,
1019 sinfo->xdp_frags_size,
1020 nr_frags * xdp->frame_sz,
1021 xdp_buff_is_frag_pfmemalloc(xdp));
1022
1023 return skb;
1024}
1025
1026/**
1027 * ice_construct_skb - Allocate skb and populate it
1028 * @rx_ring: Rx descriptor ring to transact packets on
1029 * @xdp: xdp_buff pointing to the data
1030 *
1031 * This function allocates an skb. It then populates it with the page
1032 * data from the current receive descriptor, taking care to set up the
1033 * skb correctly.
1034 */
1035static struct sk_buff *
1036ice_construct_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
1037{
1038 unsigned int size = xdp->data_end - xdp->data;
1039 struct skb_shared_info *sinfo = NULL;
1040 struct ice_rx_buf *rx_buf;
1041 unsigned int nr_frags = 0;
1042 unsigned int headlen;
1043 struct sk_buff *skb;
1044
1045 /* prefetch first cache line of first page */
1046 net_prefetch(xdp->data);
1047
1048 if (unlikely(xdp_buff_has_frags(xdp))) {
1049 sinfo = xdp_get_shared_info_from_buff(xdp);
1050 nr_frags = sinfo->nr_frags;
1051 }
1052
1053 /* allocate a skb to store the frags */
1054 skb = __napi_alloc_skb(&rx_ring->q_vector->napi, ICE_RX_HDR_SIZE,
1055 GFP_ATOMIC | __GFP_NOWARN);
1056 if (unlikely(!skb))
1057 return NULL;
1058
1059 rx_buf = &rx_ring->rx_buf[rx_ring->first_desc];
1060 skb_record_rx_queue(skb, rx_ring->q_index);
1061 /* Determine available headroom for copy */
1062 headlen = size;
1063 if (headlen > ICE_RX_HDR_SIZE)
1064 headlen = eth_get_headlen(skb->dev, xdp->data, ICE_RX_HDR_SIZE);
1065
1066 /* align pull length to size of long to optimize memcpy performance */
1067 memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen,
1068 sizeof(long)));
1069
1070 /* if we exhaust the linear part then add what is left as a frag */
1071 size -= headlen;
1072 if (size) {
1073 /* besides adding here a partial frag, we are going to add
1074 * frags from xdp_buff, make sure there is enough space for
1075 * them
1076 */
1077 if (unlikely(nr_frags >= MAX_SKB_FRAGS - 1)) {
1078 dev_kfree_skb(skb);
1079 return NULL;
1080 }
1081 skb_add_rx_frag(skb, 0, rx_buf->page,
1082 rx_buf->page_offset + headlen, size,
1083 xdp->frame_sz);
1084 } else {
1085 /* buffer is unused, change the act that should be taken later
1086 * on; data was copied onto skb's linear part so there's no
1087 * need for adjusting page offset and we can reuse this buffer
1088 * as-is
1089 */
1090 rx_buf->act = ICE_SKB_CONSUMED;
1091 }
1092
1093 if (unlikely(xdp_buff_has_frags(xdp))) {
1094 struct skb_shared_info *skinfo = skb_shinfo(skb);
1095
1096 memcpy(&skinfo->frags[skinfo->nr_frags], &sinfo->frags[0],
1097 sizeof(skb_frag_t) * nr_frags);
1098
1099 xdp_update_skb_shared_info(skb, skinfo->nr_frags + nr_frags,
1100 sinfo->xdp_frags_size,
1101 nr_frags * xdp->frame_sz,
1102 xdp_buff_is_frag_pfmemalloc(xdp));
1103 }
1104
1105 return skb;
1106}
1107
1108/**
1109 * ice_put_rx_buf - Clean up used buffer and either recycle or free
1110 * @rx_ring: Rx descriptor ring to transact packets on
1111 * @rx_buf: Rx buffer to pull data from
1112 *
1113 * This function will clean up the contents of the rx_buf. It will either
1114 * recycle the buffer or unmap it and free the associated resources.
1115 */
1116static void
1117ice_put_rx_buf(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf)
1118{
1119 if (!rx_buf)
1120 return;
1121
1122 if (ice_can_reuse_rx_page(rx_buf)) {
1123 /* hand second half of page back to the ring */
1124 ice_reuse_rx_page(rx_ring, rx_buf);
1125 } else {
1126 /* we are not reusing the buffer so unmap it */
1127 dma_unmap_page_attrs(rx_ring->dev, rx_buf->dma,
1128 ice_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
1129 ICE_RX_DMA_ATTR);
1130 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
1131 }
1132
1133 /* clear contents of buffer_info */
1134 rx_buf->page = NULL;
1135}
1136
1137/**
1138 * ice_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1139 * @rx_ring: Rx descriptor ring to transact packets on
1140 * @budget: Total limit on number of packets to process
1141 *
1142 * This function provides a "bounce buffer" approach to Rx interrupt
1143 * processing. The advantage to this is that on systems that have
1144 * expensive overhead for IOMMU access this provides a means of avoiding
1145 * it by maintaining the mapping of the page to the system.
1146 *
1147 * Returns amount of work completed
1148 */
1149int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget)
1150{
1151 unsigned int total_rx_bytes = 0, total_rx_pkts = 0;
1152 unsigned int offset = rx_ring->rx_offset;
1153 struct xdp_buff *xdp = &rx_ring->xdp;
1154 u32 cached_ntc = rx_ring->first_desc;
1155 struct ice_tx_ring *xdp_ring = NULL;
1156 struct bpf_prog *xdp_prog = NULL;
1157 u32 ntc = rx_ring->next_to_clean;
1158 u32 cnt = rx_ring->count;
1159 u32 xdp_xmit = 0;
1160 u32 cached_ntu;
1161 bool failure;
1162 u32 first;
1163
1164 /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
1165#if (PAGE_SIZE < 8192)
1166 xdp->frame_sz = ice_rx_frame_truesize(rx_ring, 0);
1167#endif
1168
1169 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1170 if (xdp_prog) {
1171 xdp_ring = rx_ring->xdp_ring;
1172 cached_ntu = xdp_ring->next_to_use;
1173 }
1174
1175 /* start the loop to process Rx packets bounded by 'budget' */
1176 while (likely(total_rx_pkts < (unsigned int)budget)) {
1177 union ice_32b_rx_flex_desc *rx_desc;
1178 struct ice_rx_buf *rx_buf;
1179 struct sk_buff *skb;
1180 unsigned int size;
1181 u16 stat_err_bits;
1182 u16 vlan_tci;
1183
1184 /* get the Rx desc from Rx ring based on 'next_to_clean' */
1185 rx_desc = ICE_RX_DESC(rx_ring, ntc);
1186
1187 /* status_error_len will always be zero for unused descriptors
1188 * because it's cleared in cleanup, and overlaps with hdr_addr
1189 * which is always zero because packet split isn't used, if the
1190 * hardware wrote DD then it will be non-zero
1191 */
1192 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);
1193 if (!ice_test_staterr(rx_desc->wb.status_error0, stat_err_bits))
1194 break;
1195
1196 /* This memory barrier is needed to keep us from reading
1197 * any other fields out of the rx_desc until we know the
1198 * DD bit is set.
1199 */
1200 dma_rmb();
1201
1202 ice_trace(clean_rx_irq, rx_ring, rx_desc);
1203 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID || !rx_ring->netdev) {
1204 struct ice_vsi *ctrl_vsi = rx_ring->vsi;
1205
1206 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID &&
1207 ctrl_vsi->vf)
1208 ice_vc_fdir_irq_handler(ctrl_vsi, rx_desc);
1209 if (++ntc == cnt)
1210 ntc = 0;
1211 rx_ring->first_desc = ntc;
1212 continue;
1213 }
1214
1215 size = le16_to_cpu(rx_desc->wb.pkt_len) &
1216 ICE_RX_FLX_DESC_PKT_LEN_M;
1217
1218 /* retrieve a buffer from the ring */
1219 rx_buf = ice_get_rx_buf(rx_ring, size, ntc);
1220
1221 if (!xdp->data) {
1222 void *hard_start;
1223
1224 hard_start = page_address(rx_buf->page) + rx_buf->page_offset -
1225 offset;
1226 xdp_prepare_buff(xdp, hard_start, offset, size, !!offset);
1227#if (PAGE_SIZE > 4096)
1228 /* At larger PAGE_SIZE, frame_sz depend on len size */
1229 xdp->frame_sz = ice_rx_frame_truesize(rx_ring, size);
1230#endif
1231 xdp_buff_clear_frags_flag(xdp);
1232 } else if (ice_add_xdp_frag(rx_ring, xdp, rx_buf, size)) {
1233 break;
1234 }
1235 if (++ntc == cnt)
1236 ntc = 0;
1237
1238 /* skip if it is NOP desc */
1239 if (ice_is_non_eop(rx_ring, rx_desc))
1240 continue;
1241
1242 ice_run_xdp(rx_ring, xdp, xdp_prog, xdp_ring, rx_buf, rx_desc);
1243 if (rx_buf->act == ICE_XDP_PASS)
1244 goto construct_skb;
1245 total_rx_bytes += xdp_get_buff_len(xdp);
1246 total_rx_pkts++;
1247
1248 xdp->data = NULL;
1249 rx_ring->first_desc = ntc;
1250 rx_ring->nr_frags = 0;
1251 continue;
1252construct_skb:
1253 if (likely(ice_ring_uses_build_skb(rx_ring)))
1254 skb = ice_build_skb(rx_ring, xdp);
1255 else
1256 skb = ice_construct_skb(rx_ring, xdp);
1257 /* exit if we failed to retrieve a buffer */
1258 if (!skb) {
1259 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
1260 rx_buf->act = ICE_XDP_CONSUMED;
1261 if (unlikely(xdp_buff_has_frags(xdp)))
1262 ice_set_rx_bufs_act(xdp, rx_ring,
1263 ICE_XDP_CONSUMED);
1264 xdp->data = NULL;
1265 rx_ring->first_desc = ntc;
1266 rx_ring->nr_frags = 0;
1267 break;
1268 }
1269 xdp->data = NULL;
1270 rx_ring->first_desc = ntc;
1271 rx_ring->nr_frags = 0;
1272
1273 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
1274 if (unlikely(ice_test_staterr(rx_desc->wb.status_error0,
1275 stat_err_bits))) {
1276 dev_kfree_skb_any(skb);
1277 continue;
1278 }
1279
1280 vlan_tci = ice_get_vlan_tci(rx_desc);
1281
1282 /* pad the skb if needed, to make a valid ethernet frame */
1283 if (eth_skb_pad(skb))
1284 continue;
1285
1286 /* probably a little skewed due to removing CRC */
1287 total_rx_bytes += skb->len;
1288
1289 /* populate checksum, VLAN, and protocol */
1290 ice_process_skb_fields(rx_ring, rx_desc, skb);
1291
1292 ice_trace(clean_rx_irq_indicate, rx_ring, rx_desc, skb);
1293 /* send completed skb up the stack */
1294 ice_receive_skb(rx_ring, skb, vlan_tci);
1295
1296 /* update budget accounting */
1297 total_rx_pkts++;
1298 }
1299
1300 first = rx_ring->first_desc;
1301 while (cached_ntc != first) {
1302 struct ice_rx_buf *buf = &rx_ring->rx_buf[cached_ntc];
1303
1304 if (buf->act & (ICE_XDP_TX | ICE_XDP_REDIR)) {
1305 ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1306 xdp_xmit |= buf->act;
1307 } else if (buf->act & ICE_XDP_CONSUMED) {
1308 buf->pagecnt_bias++;
1309 } else if (buf->act == ICE_XDP_PASS) {
1310 ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1311 }
1312
1313 ice_put_rx_buf(rx_ring, buf);
1314 if (++cached_ntc >= cnt)
1315 cached_ntc = 0;
1316 }
1317 rx_ring->next_to_clean = ntc;
1318 /* return up to cleaned_count buffers to hardware */
1319 failure = ice_alloc_rx_bufs(rx_ring, ICE_RX_DESC_UNUSED(rx_ring));
1320
1321 if (xdp_xmit)
1322 ice_finalize_xdp_rx(xdp_ring, xdp_xmit, cached_ntu);
1323
1324 if (rx_ring->ring_stats)
1325 ice_update_rx_ring_stats(rx_ring, total_rx_pkts,
1326 total_rx_bytes);
1327
1328 /* guarantee a trip back through this routine if there was a failure */
1329 return failure ? budget : (int)total_rx_pkts;
1330}
1331
1332static void __ice_update_sample(struct ice_q_vector *q_vector,
1333 struct ice_ring_container *rc,
1334 struct dim_sample *sample,
1335 bool is_tx)
1336{
1337 u64 packets = 0, bytes = 0;
1338
1339 if (is_tx) {
1340 struct ice_tx_ring *tx_ring;
1341
1342 ice_for_each_tx_ring(tx_ring, *rc) {
1343 struct ice_ring_stats *ring_stats;
1344
1345 ring_stats = tx_ring->ring_stats;
1346 if (!ring_stats)
1347 continue;
1348 packets += ring_stats->stats.pkts;
1349 bytes += ring_stats->stats.bytes;
1350 }
1351 } else {
1352 struct ice_rx_ring *rx_ring;
1353
1354 ice_for_each_rx_ring(rx_ring, *rc) {
1355 struct ice_ring_stats *ring_stats;
1356
1357 ring_stats = rx_ring->ring_stats;
1358 if (!ring_stats)
1359 continue;
1360 packets += ring_stats->stats.pkts;
1361 bytes += ring_stats->stats.bytes;
1362 }
1363 }
1364
1365 dim_update_sample(q_vector->total_events, packets, bytes, sample);
1366 sample->comp_ctr = 0;
1367
1368 /* if dim settings get stale, like when not updated for 1
1369 * second or longer, force it to start again. This addresses the
1370 * frequent case of an idle queue being switched to by the
1371 * scheduler. The 1,000 here means 1,000 milliseconds.
1372 */
1373 if (ktime_ms_delta(sample->time, rc->dim.start_sample.time) >= 1000)
1374 rc->dim.state = DIM_START_MEASURE;
1375}
1376
1377/**
1378 * ice_net_dim - Update net DIM algorithm
1379 * @q_vector: the vector associated with the interrupt
1380 *
1381 * Create a DIM sample and notify net_dim() so that it can possibly decide
1382 * a new ITR value based on incoming packets, bytes, and interrupts.
1383 *
1384 * This function is a no-op if the ring is not configured to dynamic ITR.
1385 */
1386static void ice_net_dim(struct ice_q_vector *q_vector)
1387{
1388 struct ice_ring_container *tx = &q_vector->tx;
1389 struct ice_ring_container *rx = &q_vector->rx;
1390
1391 if (ITR_IS_DYNAMIC(tx)) {
1392 struct dim_sample dim_sample;
1393
1394 __ice_update_sample(q_vector, tx, &dim_sample, true);
1395 net_dim(&tx->dim, dim_sample);
1396 }
1397
1398 if (ITR_IS_DYNAMIC(rx)) {
1399 struct dim_sample dim_sample;
1400
1401 __ice_update_sample(q_vector, rx, &dim_sample, false);
1402 net_dim(&rx->dim, dim_sample);
1403 }
1404}
1405
1406/**
1407 * ice_buildreg_itr - build value for writing to the GLINT_DYN_CTL register
1408 * @itr_idx: interrupt throttling index
1409 * @itr: interrupt throttling value in usecs
1410 */
1411static u32 ice_buildreg_itr(u16 itr_idx, u16 itr)
1412{
1413 /* The ITR value is reported in microseconds, and the register value is
1414 * recorded in 2 microsecond units. For this reason we only need to
1415 * shift by the GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S to apply this
1416 * granularity as a shift instead of division. The mask makes sure the
1417 * ITR value is never odd so we don't accidentally write into the field
1418 * prior to the ITR field.
1419 */
1420 itr &= ICE_ITR_MASK;
1421
1422 return GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
1423 (itr_idx << GLINT_DYN_CTL_ITR_INDX_S) |
1424 (itr << (GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S));
1425}
1426
1427/**
1428 * ice_enable_interrupt - re-enable MSI-X interrupt
1429 * @q_vector: the vector associated with the interrupt to enable
1430 *
1431 * If the VSI is down, the interrupt will not be re-enabled. Also,
1432 * when enabling the interrupt always reset the wb_on_itr to false
1433 * and trigger a software interrupt to clean out internal state.
1434 */
1435static void ice_enable_interrupt(struct ice_q_vector *q_vector)
1436{
1437 struct ice_vsi *vsi = q_vector->vsi;
1438 bool wb_en = q_vector->wb_on_itr;
1439 u32 itr_val;
1440
1441 if (test_bit(ICE_DOWN, vsi->state))
1442 return;
1443
1444 /* trigger an ITR delayed software interrupt when exiting busy poll, to
1445 * make sure to catch any pending cleanups that might have been missed
1446 * due to interrupt state transition. If busy poll or poll isn't
1447 * enabled, then don't update ITR, and just enable the interrupt.
1448 */
1449 if (!wb_en) {
1450 itr_val = ice_buildreg_itr(ICE_ITR_NONE, 0);
1451 } else {
1452 q_vector->wb_on_itr = false;
1453
1454 /* do two things here with a single write. Set up the third ITR
1455 * index to be used for software interrupt moderation, and then
1456 * trigger a software interrupt with a rate limit of 20K on
1457 * software interrupts, this will help avoid high interrupt
1458 * loads due to frequently polling and exiting polling.
1459 */
1460 itr_val = ice_buildreg_itr(ICE_IDX_ITR2, ICE_ITR_20K);
1461 itr_val |= GLINT_DYN_CTL_SWINT_TRIG_M |
1462 ICE_IDX_ITR2 << GLINT_DYN_CTL_SW_ITR_INDX_S |
1463 GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;
1464 }
1465 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);
1466}
1467
1468/**
1469 * ice_set_wb_on_itr - set WB_ON_ITR for this q_vector
1470 * @q_vector: q_vector to set WB_ON_ITR on
1471 *
1472 * We need to tell hardware to write-back completed descriptors even when
1473 * interrupts are disabled. Descriptors will be written back on cache line
1474 * boundaries without WB_ON_ITR enabled, but if we don't enable WB_ON_ITR
1475 * descriptors may not be written back if they don't fill a cache line until
1476 * the next interrupt.
1477 *
1478 * This sets the write-back frequency to whatever was set previously for the
1479 * ITR indices. Also, set the INTENA_MSK bit to make sure hardware knows we
1480 * aren't meddling with the INTENA_M bit.
1481 */
1482static void ice_set_wb_on_itr(struct ice_q_vector *q_vector)
1483{
1484 struct ice_vsi *vsi = q_vector->vsi;
1485
1486 /* already in wb_on_itr mode no need to change it */
1487 if (q_vector->wb_on_itr)
1488 return;
1489
1490 /* use previously set ITR values for all of the ITR indices by
1491 * specifying ICE_ITR_NONE, which will vary in adaptive (AIM) mode and
1492 * be static in non-adaptive mode (user configured)
1493 */
1494 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),
1495 FIELD_PREP(GLINT_DYN_CTL_ITR_INDX_M, ICE_ITR_NONE) |
1496 FIELD_PREP(GLINT_DYN_CTL_INTENA_MSK_M, 1) |
1497 FIELD_PREP(GLINT_DYN_CTL_WB_ON_ITR_M, 1));
1498
1499 q_vector->wb_on_itr = true;
1500}
1501
1502/**
1503 * ice_napi_poll - NAPI polling Rx/Tx cleanup routine
1504 * @napi: napi struct with our devices info in it
1505 * @budget: amount of work driver is allowed to do this pass, in packets
1506 *
1507 * This function will clean all queues associated with a q_vector.
1508 *
1509 * Returns the amount of work done
1510 */
1511int ice_napi_poll(struct napi_struct *napi, int budget)
1512{
1513 struct ice_q_vector *q_vector =
1514 container_of(napi, struct ice_q_vector, napi);
1515 struct ice_tx_ring *tx_ring;
1516 struct ice_rx_ring *rx_ring;
1517 bool clean_complete = true;
1518 int budget_per_ring;
1519 int work_done = 0;
1520
1521 /* Since the actual Tx work is minimal, we can give the Tx a larger
1522 * budget and be more aggressive about cleaning up the Tx descriptors.
1523 */
1524 ice_for_each_tx_ring(tx_ring, q_vector->tx) {
1525 bool wd;
1526
1527 if (tx_ring->xsk_pool)
1528 wd = ice_xmit_zc(tx_ring);
1529 else if (ice_ring_is_xdp(tx_ring))
1530 wd = true;
1531 else
1532 wd = ice_clean_tx_irq(tx_ring, budget);
1533
1534 if (!wd)
1535 clean_complete = false;
1536 }
1537
1538 /* Handle case where we are called by netpoll with a budget of 0 */
1539 if (unlikely(budget <= 0))
1540 return budget;
1541
1542 /* normally we have 1 Rx ring per q_vector */
1543 if (unlikely(q_vector->num_ring_rx > 1))
1544 /* We attempt to distribute budget to each Rx queue fairly, but
1545 * don't allow the budget to go below 1 because that would exit
1546 * polling early.
1547 */
1548 budget_per_ring = max_t(int, budget / q_vector->num_ring_rx, 1);
1549 else
1550 /* Max of 1 Rx ring in this q_vector so give it the budget */
1551 budget_per_ring = budget;
1552
1553 ice_for_each_rx_ring(rx_ring, q_vector->rx) {
1554 int cleaned;
1555
1556 /* A dedicated path for zero-copy allows making a single
1557 * comparison in the irq context instead of many inside the
1558 * ice_clean_rx_irq function and makes the codebase cleaner.
1559 */
1560 cleaned = rx_ring->xsk_pool ?
1561 ice_clean_rx_irq_zc(rx_ring, budget_per_ring) :
1562 ice_clean_rx_irq(rx_ring, budget_per_ring);
1563 work_done += cleaned;
1564 /* if we clean as many as budgeted, we must not be done */
1565 if (cleaned >= budget_per_ring)
1566 clean_complete = false;
1567 }
1568
1569 /* If work not completed, return budget and polling will return */
1570 if (!clean_complete) {
1571 /* Set the writeback on ITR so partial completions of
1572 * cache-lines will still continue even if we're polling.
1573 */
1574 ice_set_wb_on_itr(q_vector);
1575 return budget;
1576 }
1577
1578 /* Exit the polling mode, but don't re-enable interrupts if stack might
1579 * poll us due to busy-polling
1580 */
1581 if (napi_complete_done(napi, work_done)) {
1582 ice_net_dim(q_vector);
1583 ice_enable_interrupt(q_vector);
1584 } else {
1585 ice_set_wb_on_itr(q_vector);
1586 }
1587
1588 return min_t(int, work_done, budget - 1);
1589}
1590
1591/**
1592 * __ice_maybe_stop_tx - 2nd level check for Tx stop conditions
1593 * @tx_ring: the ring to be checked
1594 * @size: the size buffer we want to assure is available
1595 *
1596 * Returns -EBUSY if a stop is needed, else 0
1597 */
1598static int __ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1599{
1600 netif_tx_stop_queue(txring_txq(tx_ring));
1601 /* Memory barrier before checking head and tail */
1602 smp_mb();
1603
1604 /* Check again in a case another CPU has just made room available. */
1605 if (likely(ICE_DESC_UNUSED(tx_ring) < size))
1606 return -EBUSY;
1607
1608 /* A reprieve! - use start_queue because it doesn't call schedule */
1609 netif_tx_start_queue(txring_txq(tx_ring));
1610 ++tx_ring->ring_stats->tx_stats.restart_q;
1611 return 0;
1612}
1613
1614/**
1615 * ice_maybe_stop_tx - 1st level check for Tx stop conditions
1616 * @tx_ring: the ring to be checked
1617 * @size: the size buffer we want to assure is available
1618 *
1619 * Returns 0 if stop is not needed
1620 */
1621static int ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1622{
1623 if (likely(ICE_DESC_UNUSED(tx_ring) >= size))
1624 return 0;
1625
1626 return __ice_maybe_stop_tx(tx_ring, size);
1627}
1628
1629/**
1630 * ice_tx_map - Build the Tx descriptor
1631 * @tx_ring: ring to send buffer on
1632 * @first: first buffer info buffer to use
1633 * @off: pointer to struct that holds offload parameters
1634 *
1635 * This function loops over the skb data pointed to by *first
1636 * and gets a physical address for each memory location and programs
1637 * it and the length into the transmit descriptor.
1638 */
1639static void
1640ice_tx_map(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first,
1641 struct ice_tx_offload_params *off)
1642{
1643 u64 td_offset, td_tag, td_cmd;
1644 u16 i = tx_ring->next_to_use;
1645 unsigned int data_len, size;
1646 struct ice_tx_desc *tx_desc;
1647 struct ice_tx_buf *tx_buf;
1648 struct sk_buff *skb;
1649 skb_frag_t *frag;
1650 dma_addr_t dma;
1651 bool kick;
1652
1653 td_tag = off->td_l2tag1;
1654 td_cmd = off->td_cmd;
1655 td_offset = off->td_offset;
1656 skb = first->skb;
1657
1658 data_len = skb->data_len;
1659 size = skb_headlen(skb);
1660
1661 tx_desc = ICE_TX_DESC(tx_ring, i);
1662
1663 if (first->tx_flags & ICE_TX_FLAGS_HW_VLAN) {
1664 td_cmd |= (u64)ICE_TX_DESC_CMD_IL2TAG1;
1665 td_tag = first->vid;
1666 }
1667
1668 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
1669
1670 tx_buf = first;
1671
1672 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
1673 unsigned int max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1674
1675 if (dma_mapping_error(tx_ring->dev, dma))
1676 goto dma_error;
1677
1678 /* record length, and DMA address */
1679 dma_unmap_len_set(tx_buf, len, size);
1680 dma_unmap_addr_set(tx_buf, dma, dma);
1681
1682 /* align size to end of page */
1683 max_data += -dma & (ICE_MAX_READ_REQ_SIZE - 1);
1684 tx_desc->buf_addr = cpu_to_le64(dma);
1685
1686 /* account for data chunks larger than the hardware
1687 * can handle
1688 */
1689 while (unlikely(size > ICE_MAX_DATA_PER_TXD)) {
1690 tx_desc->cmd_type_offset_bsz =
1691 ice_build_ctob(td_cmd, td_offset, max_data,
1692 td_tag);
1693
1694 tx_desc++;
1695 i++;
1696
1697 if (i == tx_ring->count) {
1698 tx_desc = ICE_TX_DESC(tx_ring, 0);
1699 i = 0;
1700 }
1701
1702 dma += max_data;
1703 size -= max_data;
1704
1705 max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1706 tx_desc->buf_addr = cpu_to_le64(dma);
1707 }
1708
1709 if (likely(!data_len))
1710 break;
1711
1712 tx_desc->cmd_type_offset_bsz = ice_build_ctob(td_cmd, td_offset,
1713 size, td_tag);
1714
1715 tx_desc++;
1716 i++;
1717
1718 if (i == tx_ring->count) {
1719 tx_desc = ICE_TX_DESC(tx_ring, 0);
1720 i = 0;
1721 }
1722
1723 size = skb_frag_size(frag);
1724 data_len -= size;
1725
1726 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1727 DMA_TO_DEVICE);
1728
1729 tx_buf = &tx_ring->tx_buf[i];
1730 tx_buf->type = ICE_TX_BUF_FRAG;
1731 }
1732
1733 /* record SW timestamp if HW timestamp is not available */
1734 skb_tx_timestamp(first->skb);
1735
1736 i++;
1737 if (i == tx_ring->count)
1738 i = 0;
1739
1740 /* write last descriptor with RS and EOP bits */
1741 td_cmd |= (u64)ICE_TXD_LAST_DESC_CMD;
1742 tx_desc->cmd_type_offset_bsz =
1743 ice_build_ctob(td_cmd, td_offset, size, td_tag);
1744
1745 /* Force memory writes to complete before letting h/w know there
1746 * are new descriptors to fetch.
1747 *
1748 * We also use this memory barrier to make certain all of the
1749 * status bits have been updated before next_to_watch is written.
1750 */
1751 wmb();
1752
1753 /* set next_to_watch value indicating a packet is present */
1754 first->next_to_watch = tx_desc;
1755
1756 tx_ring->next_to_use = i;
1757
1758 ice_maybe_stop_tx(tx_ring, DESC_NEEDED);
1759
1760 /* notify HW of packet */
1761 kick = __netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount,
1762 netdev_xmit_more());
1763 if (kick)
1764 /* notify HW of packet */
1765 writel(i, tx_ring->tail);
1766
1767 return;
1768
1769dma_error:
1770 /* clear DMA mappings for failed tx_buf map */
1771 for (;;) {
1772 tx_buf = &tx_ring->tx_buf[i];
1773 ice_unmap_and_free_tx_buf(tx_ring, tx_buf);
1774 if (tx_buf == first)
1775 break;
1776 if (i == 0)
1777 i = tx_ring->count;
1778 i--;
1779 }
1780
1781 tx_ring->next_to_use = i;
1782}
1783
1784/**
1785 * ice_tx_csum - Enable Tx checksum offloads
1786 * @first: pointer to the first descriptor
1787 * @off: pointer to struct that holds offload parameters
1788 *
1789 * Returns 0 or error (negative) if checksum offload can't happen, 1 otherwise.
1790 */
1791static
1792int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1793{
1794 u32 l4_len = 0, l3_len = 0, l2_len = 0;
1795 struct sk_buff *skb = first->skb;
1796 union {
1797 struct iphdr *v4;
1798 struct ipv6hdr *v6;
1799 unsigned char *hdr;
1800 } ip;
1801 union {
1802 struct tcphdr *tcp;
1803 unsigned char *hdr;
1804 } l4;
1805 __be16 frag_off, protocol;
1806 unsigned char *exthdr;
1807 u32 offset, cmd = 0;
1808 u8 l4_proto = 0;
1809
1810 if (skb->ip_summed != CHECKSUM_PARTIAL)
1811 return 0;
1812
1813 protocol = vlan_get_protocol(skb);
1814
1815 if (eth_p_mpls(protocol)) {
1816 ip.hdr = skb_inner_network_header(skb);
1817 l4.hdr = skb_checksum_start(skb);
1818 } else {
1819 ip.hdr = skb_network_header(skb);
1820 l4.hdr = skb_transport_header(skb);
1821 }
1822
1823 /* compute outer L2 header size */
1824 l2_len = ip.hdr - skb->data;
1825 offset = (l2_len / 2) << ICE_TX_DESC_LEN_MACLEN_S;
1826
1827 /* set the tx_flags to indicate the IP protocol type. this is
1828 * required so that checksum header computation below is accurate.
1829 */
1830 if (ip.v4->version == 4)
1831 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1832 else if (ip.v6->version == 6)
1833 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1834
1835 if (skb->encapsulation) {
1836 bool gso_ena = false;
1837 u32 tunnel = 0;
1838
1839 /* define outer network header type */
1840 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1841 tunnel |= (first->tx_flags & ICE_TX_FLAGS_TSO) ?
1842 ICE_TX_CTX_EIPT_IPV4 :
1843 ICE_TX_CTX_EIPT_IPV4_NO_CSUM;
1844 l4_proto = ip.v4->protocol;
1845 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1846 int ret;
1847
1848 tunnel |= ICE_TX_CTX_EIPT_IPV6;
1849 exthdr = ip.hdr + sizeof(*ip.v6);
1850 l4_proto = ip.v6->nexthdr;
1851 ret = ipv6_skip_exthdr(skb, exthdr - skb->data,
1852 &l4_proto, &frag_off);
1853 if (ret < 0)
1854 return -1;
1855 }
1856
1857 /* define outer transport */
1858 switch (l4_proto) {
1859 case IPPROTO_UDP:
1860 tunnel |= ICE_TXD_CTX_UDP_TUNNELING;
1861 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1862 break;
1863 case IPPROTO_GRE:
1864 tunnel |= ICE_TXD_CTX_GRE_TUNNELING;
1865 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1866 break;
1867 case IPPROTO_IPIP:
1868 case IPPROTO_IPV6:
1869 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1870 l4.hdr = skb_inner_network_header(skb);
1871 break;
1872 default:
1873 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1874 return -1;
1875
1876 skb_checksum_help(skb);
1877 return 0;
1878 }
1879
1880 /* compute outer L3 header size */
1881 tunnel |= ((l4.hdr - ip.hdr) / 4) <<
1882 ICE_TXD_CTX_QW0_EIPLEN_S;
1883
1884 /* switch IP header pointer from outer to inner header */
1885 ip.hdr = skb_inner_network_header(skb);
1886
1887 /* compute tunnel header size */
1888 tunnel |= ((ip.hdr - l4.hdr) / 2) <<
1889 ICE_TXD_CTX_QW0_NATLEN_S;
1890
1891 gso_ena = skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL;
1892 /* indicate if we need to offload outer UDP header */
1893 if ((first->tx_flags & ICE_TX_FLAGS_TSO) && !gso_ena &&
1894 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM))
1895 tunnel |= ICE_TXD_CTX_QW0_L4T_CS_M;
1896
1897 /* record tunnel offload values */
1898 off->cd_tunnel_params |= tunnel;
1899
1900 /* set DTYP=1 to indicate that it's an Tx context descriptor
1901 * in IPsec tunnel mode with Tx offloads in Quad word 1
1902 */
1903 off->cd_qw1 |= (u64)ICE_TX_DESC_DTYPE_CTX;
1904
1905 /* switch L4 header pointer from outer to inner */
1906 l4.hdr = skb_inner_transport_header(skb);
1907 l4_proto = 0;
1908
1909 /* reset type as we transition from outer to inner headers */
1910 first->tx_flags &= ~(ICE_TX_FLAGS_IPV4 | ICE_TX_FLAGS_IPV6);
1911 if (ip.v4->version == 4)
1912 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1913 if (ip.v6->version == 6)
1914 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1915 }
1916
1917 /* Enable IP checksum offloads */
1918 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1919 l4_proto = ip.v4->protocol;
1920 /* the stack computes the IP header already, the only time we
1921 * need the hardware to recompute it is in the case of TSO.
1922 */
1923 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1924 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
1925 else
1926 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
1927
1928 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1929 cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
1930 exthdr = ip.hdr + sizeof(*ip.v6);
1931 l4_proto = ip.v6->nexthdr;
1932 if (l4.hdr != exthdr)
1933 ipv6_skip_exthdr(skb, exthdr - skb->data, &l4_proto,
1934 &frag_off);
1935 } else {
1936 return -1;
1937 }
1938
1939 /* compute inner L3 header size */
1940 l3_len = l4.hdr - ip.hdr;
1941 offset |= (l3_len / 4) << ICE_TX_DESC_LEN_IPLEN_S;
1942
1943 /* Enable L4 checksum offloads */
1944 switch (l4_proto) {
1945 case IPPROTO_TCP:
1946 /* enable checksum offloads */
1947 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_TCP;
1948 l4_len = l4.tcp->doff;
1949 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1950 break;
1951 case IPPROTO_UDP:
1952 /* enable UDP checksum offload */
1953 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_UDP;
1954 l4_len = (sizeof(struct udphdr) >> 2);
1955 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1956 break;
1957 case IPPROTO_SCTP:
1958 /* enable SCTP checksum offload */
1959 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_SCTP;
1960 l4_len = sizeof(struct sctphdr) >> 2;
1961 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1962 break;
1963
1964 default:
1965 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1966 return -1;
1967 skb_checksum_help(skb);
1968 return 0;
1969 }
1970
1971 off->td_cmd |= cmd;
1972 off->td_offset |= offset;
1973 return 1;
1974}
1975
1976/**
1977 * ice_tx_prepare_vlan_flags - prepare generic Tx VLAN tagging flags for HW
1978 * @tx_ring: ring to send buffer on
1979 * @first: pointer to struct ice_tx_buf
1980 *
1981 * Checks the skb and set up correspondingly several generic transmit flags
1982 * related to VLAN tagging for the HW, such as VLAN, DCB, etc.
1983 */
1984static void
1985ice_tx_prepare_vlan_flags(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first)
1986{
1987 struct sk_buff *skb = first->skb;
1988
1989 /* nothing left to do, software offloaded VLAN */
1990 if (!skb_vlan_tag_present(skb) && eth_type_vlan(skb->protocol))
1991 return;
1992
1993 /* the VLAN ethertype/tpid is determined by VSI configuration and netdev
1994 * feature flags, which the driver only allows either 802.1Q or 802.1ad
1995 * VLAN offloads exclusively so we only care about the VLAN ID here
1996 */
1997 if (skb_vlan_tag_present(skb)) {
1998 first->vid = skb_vlan_tag_get(skb);
1999 if (tx_ring->flags & ICE_TX_FLAGS_RING_VLAN_L2TAG2)
2000 first->tx_flags |= ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN;
2001 else
2002 first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
2003 }
2004
2005 ice_tx_prepare_vlan_flags_dcb(tx_ring, first);
2006}
2007
2008/**
2009 * ice_tso - computes mss and TSO length to prepare for TSO
2010 * @first: pointer to struct ice_tx_buf
2011 * @off: pointer to struct that holds offload parameters
2012 *
2013 * Returns 0 or error (negative) if TSO can't happen, 1 otherwise.
2014 */
2015static
2016int ice_tso(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2017{
2018 struct sk_buff *skb = first->skb;
2019 union {
2020 struct iphdr *v4;
2021 struct ipv6hdr *v6;
2022 unsigned char *hdr;
2023 } ip;
2024 union {
2025 struct tcphdr *tcp;
2026 struct udphdr *udp;
2027 unsigned char *hdr;
2028 } l4;
2029 u64 cd_mss, cd_tso_len;
2030 __be16 protocol;
2031 u32 paylen;
2032 u8 l4_start;
2033 int err;
2034
2035 if (skb->ip_summed != CHECKSUM_PARTIAL)
2036 return 0;
2037
2038 if (!skb_is_gso(skb))
2039 return 0;
2040
2041 err = skb_cow_head(skb, 0);
2042 if (err < 0)
2043 return err;
2044
2045 protocol = vlan_get_protocol(skb);
2046
2047 if (eth_p_mpls(protocol))
2048 ip.hdr = skb_inner_network_header(skb);
2049 else
2050 ip.hdr = skb_network_header(skb);
2051 l4.hdr = skb_checksum_start(skb);
2052
2053 /* initialize outer IP header fields */
2054 if (ip.v4->version == 4) {
2055 ip.v4->tot_len = 0;
2056 ip.v4->check = 0;
2057 } else {
2058 ip.v6->payload_len = 0;
2059 }
2060
2061 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
2062 SKB_GSO_GRE_CSUM |
2063 SKB_GSO_IPXIP4 |
2064 SKB_GSO_IPXIP6 |
2065 SKB_GSO_UDP_TUNNEL |
2066 SKB_GSO_UDP_TUNNEL_CSUM)) {
2067 if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) &&
2068 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM)) {
2069 l4.udp->len = 0;
2070
2071 /* determine offset of outer transport header */
2072 l4_start = (u8)(l4.hdr - skb->data);
2073
2074 /* remove payload length from outer checksum */
2075 paylen = skb->len - l4_start;
2076 csum_replace_by_diff(&l4.udp->check,
2077 (__force __wsum)htonl(paylen));
2078 }
2079
2080 /* reset pointers to inner headers */
2081 ip.hdr = skb_inner_network_header(skb);
2082 l4.hdr = skb_inner_transport_header(skb);
2083
2084 /* initialize inner IP header fields */
2085 if (ip.v4->version == 4) {
2086 ip.v4->tot_len = 0;
2087 ip.v4->check = 0;
2088 } else {
2089 ip.v6->payload_len = 0;
2090 }
2091 }
2092
2093 /* determine offset of transport header */
2094 l4_start = (u8)(l4.hdr - skb->data);
2095
2096 /* remove payload length from checksum */
2097 paylen = skb->len - l4_start;
2098
2099 if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) {
2100 csum_replace_by_diff(&l4.udp->check,
2101 (__force __wsum)htonl(paylen));
2102 /* compute length of UDP segmentation header */
2103 off->header_len = (u8)sizeof(l4.udp) + l4_start;
2104 } else {
2105 csum_replace_by_diff(&l4.tcp->check,
2106 (__force __wsum)htonl(paylen));
2107 /* compute length of TCP segmentation header */
2108 off->header_len = (u8)((l4.tcp->doff * 4) + l4_start);
2109 }
2110
2111 /* update gso_segs and bytecount */
2112 first->gso_segs = skb_shinfo(skb)->gso_segs;
2113 first->bytecount += (first->gso_segs - 1) * off->header_len;
2114
2115 cd_tso_len = skb->len - off->header_len;
2116 cd_mss = skb_shinfo(skb)->gso_size;
2117
2118 /* record cdesc_qw1 with TSO parameters */
2119 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2120 (ICE_TX_CTX_DESC_TSO << ICE_TXD_CTX_QW1_CMD_S) |
2121 (cd_tso_len << ICE_TXD_CTX_QW1_TSO_LEN_S) |
2122 (cd_mss << ICE_TXD_CTX_QW1_MSS_S));
2123 first->tx_flags |= ICE_TX_FLAGS_TSO;
2124 return 1;
2125}
2126
2127/**
2128 * ice_txd_use_count - estimate the number of descriptors needed for Tx
2129 * @size: transmit request size in bytes
2130 *
2131 * Due to hardware alignment restrictions (4K alignment), we need to
2132 * assume that we can have no more than 12K of data per descriptor, even
2133 * though each descriptor can take up to 16K - 1 bytes of aligned memory.
2134 * Thus, we need to divide by 12K. But division is slow! Instead,
2135 * we decompose the operation into shifts and one relatively cheap
2136 * multiply operation.
2137 *
2138 * To divide by 12K, we first divide by 4K, then divide by 3:
2139 * To divide by 4K, shift right by 12 bits
2140 * To divide by 3, multiply by 85, then divide by 256
2141 * (Divide by 256 is done by shifting right by 8 bits)
2142 * Finally, we add one to round up. Because 256 isn't an exact multiple of
2143 * 3, we'll underestimate near each multiple of 12K. This is actually more
2144 * accurate as we have 4K - 1 of wiggle room that we can fit into the last
2145 * segment. For our purposes this is accurate out to 1M which is orders of
2146 * magnitude greater than our largest possible GSO size.
2147 *
2148 * This would then be implemented as:
2149 * return (((size >> 12) * 85) >> 8) + ICE_DESCS_FOR_SKB_DATA_PTR;
2150 *
2151 * Since multiplication and division are commutative, we can reorder
2152 * operations into:
2153 * return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2154 */
2155static unsigned int ice_txd_use_count(unsigned int size)
2156{
2157 return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2158}
2159
2160/**
2161 * ice_xmit_desc_count - calculate number of Tx descriptors needed
2162 * @skb: send buffer
2163 *
2164 * Returns number of data descriptors needed for this skb.
2165 */
2166static unsigned int ice_xmit_desc_count(struct sk_buff *skb)
2167{
2168 const skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
2169 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2170 unsigned int count = 0, size = skb_headlen(skb);
2171
2172 for (;;) {
2173 count += ice_txd_use_count(size);
2174
2175 if (!nr_frags--)
2176 break;
2177
2178 size = skb_frag_size(frag++);
2179 }
2180
2181 return count;
2182}
2183
2184/**
2185 * __ice_chk_linearize - Check if there are more than 8 buffers per packet
2186 * @skb: send buffer
2187 *
2188 * Note: This HW can't DMA more than 8 buffers to build a packet on the wire
2189 * and so we need to figure out the cases where we need to linearize the skb.
2190 *
2191 * For TSO we need to count the TSO header and segment payload separately.
2192 * As such we need to check cases where we have 7 fragments or more as we
2193 * can potentially require 9 DMA transactions, 1 for the TSO header, 1 for
2194 * the segment payload in the first descriptor, and another 7 for the
2195 * fragments.
2196 */
2197static bool __ice_chk_linearize(struct sk_buff *skb)
2198{
2199 const skb_frag_t *frag, *stale;
2200 int nr_frags, sum;
2201
2202 /* no need to check if number of frags is less than 7 */
2203 nr_frags = skb_shinfo(skb)->nr_frags;
2204 if (nr_frags < (ICE_MAX_BUF_TXD - 1))
2205 return false;
2206
2207 /* We need to walk through the list and validate that each group
2208 * of 6 fragments totals at least gso_size.
2209 */
2210 nr_frags -= ICE_MAX_BUF_TXD - 2;
2211 frag = &skb_shinfo(skb)->frags[0];
2212
2213 /* Initialize size to the negative value of gso_size minus 1. We
2214 * use this as the worst case scenario in which the frag ahead
2215 * of us only provides one byte which is why we are limited to 6
2216 * descriptors for a single transmit as the header and previous
2217 * fragment are already consuming 2 descriptors.
2218 */
2219 sum = 1 - skb_shinfo(skb)->gso_size;
2220
2221 /* Add size of frags 0 through 4 to create our initial sum */
2222 sum += skb_frag_size(frag++);
2223 sum += skb_frag_size(frag++);
2224 sum += skb_frag_size(frag++);
2225 sum += skb_frag_size(frag++);
2226 sum += skb_frag_size(frag++);
2227
2228 /* Walk through fragments adding latest fragment, testing it, and
2229 * then removing stale fragments from the sum.
2230 */
2231 for (stale = &skb_shinfo(skb)->frags[0];; stale++) {
2232 int stale_size = skb_frag_size(stale);
2233
2234 sum += skb_frag_size(frag++);
2235
2236 /* The stale fragment may present us with a smaller
2237 * descriptor than the actual fragment size. To account
2238 * for that we need to remove all the data on the front and
2239 * figure out what the remainder would be in the last
2240 * descriptor associated with the fragment.
2241 */
2242 if (stale_size > ICE_MAX_DATA_PER_TXD) {
2243 int align_pad = -(skb_frag_off(stale)) &
2244 (ICE_MAX_READ_REQ_SIZE - 1);
2245
2246 sum -= align_pad;
2247 stale_size -= align_pad;
2248
2249 do {
2250 sum -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2251 stale_size -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2252 } while (stale_size > ICE_MAX_DATA_PER_TXD);
2253 }
2254
2255 /* if sum is negative we failed to make sufficient progress */
2256 if (sum < 0)
2257 return true;
2258
2259 if (!nr_frags--)
2260 break;
2261
2262 sum -= stale_size;
2263 }
2264
2265 return false;
2266}
2267
2268/**
2269 * ice_chk_linearize - Check if there are more than 8 fragments per packet
2270 * @skb: send buffer
2271 * @count: number of buffers used
2272 *
2273 * Note: Our HW can't scatter-gather more than 8 fragments to build
2274 * a packet on the wire and so we need to figure out the cases where we
2275 * need to linearize the skb.
2276 */
2277static bool ice_chk_linearize(struct sk_buff *skb, unsigned int count)
2278{
2279 /* Both TSO and single send will work if count is less than 8 */
2280 if (likely(count < ICE_MAX_BUF_TXD))
2281 return false;
2282
2283 if (skb_is_gso(skb))
2284 return __ice_chk_linearize(skb);
2285
2286 /* we can support up to 8 data buffers for a single send */
2287 return count != ICE_MAX_BUF_TXD;
2288}
2289
2290/**
2291 * ice_tstamp - set up context descriptor for hardware timestamp
2292 * @tx_ring: pointer to the Tx ring to send buffer on
2293 * @skb: pointer to the SKB we're sending
2294 * @first: Tx buffer
2295 * @off: Tx offload parameters
2296 */
2297static void
2298ice_tstamp(struct ice_tx_ring *tx_ring, struct sk_buff *skb,
2299 struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2300{
2301 s8 idx;
2302
2303 /* only timestamp the outbound packet if the user has requested it */
2304 if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
2305 return;
2306
2307 /* Tx timestamps cannot be sampled when doing TSO */
2308 if (first->tx_flags & ICE_TX_FLAGS_TSO)
2309 return;
2310
2311 /* Grab an open timestamp slot */
2312 idx = ice_ptp_request_ts(tx_ring->tx_tstamps, skb);
2313 if (idx < 0) {
2314 tx_ring->vsi->back->ptp.tx_hwtstamp_skipped++;
2315 return;
2316 }
2317
2318 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2319 (ICE_TX_CTX_DESC_TSYN << ICE_TXD_CTX_QW1_CMD_S) |
2320 ((u64)idx << ICE_TXD_CTX_QW1_TSO_LEN_S));
2321 first->tx_flags |= ICE_TX_FLAGS_TSYN;
2322}
2323
2324/**
2325 * ice_xmit_frame_ring - Sends buffer on Tx ring
2326 * @skb: send buffer
2327 * @tx_ring: ring to send buffer on
2328 *
2329 * Returns NETDEV_TX_OK if sent, else an error code
2330 */
2331static netdev_tx_t
2332ice_xmit_frame_ring(struct sk_buff *skb, struct ice_tx_ring *tx_ring)
2333{
2334 struct ice_tx_offload_params offload = { 0 };
2335 struct ice_vsi *vsi = tx_ring->vsi;
2336 struct ice_tx_buf *first;
2337 struct ethhdr *eth;
2338 unsigned int count;
2339 int tso, csum;
2340
2341 ice_trace(xmit_frame_ring, tx_ring, skb);
2342
2343 if (unlikely(ipv6_hopopt_jumbo_remove(skb)))
2344 goto out_drop;
2345
2346 count = ice_xmit_desc_count(skb);
2347 if (ice_chk_linearize(skb, count)) {
2348 if (__skb_linearize(skb))
2349 goto out_drop;
2350 count = ice_txd_use_count(skb->len);
2351 tx_ring->ring_stats->tx_stats.tx_linearize++;
2352 }
2353
2354 /* need: 1 descriptor per page * PAGE_SIZE/ICE_MAX_DATA_PER_TXD,
2355 * + 1 desc for skb_head_len/ICE_MAX_DATA_PER_TXD,
2356 * + 4 desc gap to avoid the cache line where head is,
2357 * + 1 desc for context descriptor,
2358 * otherwise try next time
2359 */
2360 if (ice_maybe_stop_tx(tx_ring, count + ICE_DESCS_PER_CACHE_LINE +
2361 ICE_DESCS_FOR_CTX_DESC)) {
2362 tx_ring->ring_stats->tx_stats.tx_busy++;
2363 return NETDEV_TX_BUSY;
2364 }
2365
2366 /* prefetch for bql data which is infrequently used */
2367 netdev_txq_bql_enqueue_prefetchw(txring_txq(tx_ring));
2368
2369 offload.tx_ring = tx_ring;
2370
2371 /* record the location of the first descriptor for this packet */
2372 first = &tx_ring->tx_buf[tx_ring->next_to_use];
2373 first->skb = skb;
2374 first->type = ICE_TX_BUF_SKB;
2375 first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
2376 first->gso_segs = 1;
2377 first->tx_flags = 0;
2378
2379 /* prepare the VLAN tagging flags for Tx */
2380 ice_tx_prepare_vlan_flags(tx_ring, first);
2381 if (first->tx_flags & ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN) {
2382 offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2383 (ICE_TX_CTX_DESC_IL2TAG2 <<
2384 ICE_TXD_CTX_QW1_CMD_S));
2385 offload.cd_l2tag2 = first->vid;
2386 }
2387
2388 /* set up TSO offload */
2389 tso = ice_tso(first, &offload);
2390 if (tso < 0)
2391 goto out_drop;
2392
2393 /* always set up Tx checksum offload */
2394 csum = ice_tx_csum(first, &offload);
2395 if (csum < 0)
2396 goto out_drop;
2397
2398 /* allow CONTROL frames egress from main VSI if FW LLDP disabled */
2399 eth = (struct ethhdr *)skb_mac_header(skb);
2400 if (unlikely((skb->priority == TC_PRIO_CONTROL ||
2401 eth->h_proto == htons(ETH_P_LLDP)) &&
2402 vsi->type == ICE_VSI_PF &&
2403 vsi->port_info->qos_cfg.is_sw_lldp))
2404 offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2405 ICE_TX_CTX_DESC_SWTCH_UPLINK <<
2406 ICE_TXD_CTX_QW1_CMD_S);
2407
2408 ice_tstamp(tx_ring, skb, first, &offload);
2409 if (ice_is_switchdev_running(vsi->back))
2410 ice_eswitch_set_target_vsi(skb, &offload);
2411
2412 if (offload.cd_qw1 & ICE_TX_DESC_DTYPE_CTX) {
2413 struct ice_tx_ctx_desc *cdesc;
2414 u16 i = tx_ring->next_to_use;
2415
2416 /* grab the next descriptor */
2417 cdesc = ICE_TX_CTX_DESC(tx_ring, i);
2418 i++;
2419 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2420
2421 /* setup context descriptor */
2422 cdesc->tunneling_params = cpu_to_le32(offload.cd_tunnel_params);
2423 cdesc->l2tag2 = cpu_to_le16(offload.cd_l2tag2);
2424 cdesc->rsvd = cpu_to_le16(0);
2425 cdesc->qw1 = cpu_to_le64(offload.cd_qw1);
2426 }
2427
2428 ice_tx_map(tx_ring, first, &offload);
2429 return NETDEV_TX_OK;
2430
2431out_drop:
2432 ice_trace(xmit_frame_ring_drop, tx_ring, skb);
2433 dev_kfree_skb_any(skb);
2434 return NETDEV_TX_OK;
2435}
2436
2437/**
2438 * ice_start_xmit - Selects the correct VSI and Tx queue to send buffer
2439 * @skb: send buffer
2440 * @netdev: network interface device structure
2441 *
2442 * Returns NETDEV_TX_OK if sent, else an error code
2443 */
2444netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2445{
2446 struct ice_netdev_priv *np = netdev_priv(netdev);
2447 struct ice_vsi *vsi = np->vsi;
2448 struct ice_tx_ring *tx_ring;
2449
2450 tx_ring = vsi->tx_rings[skb->queue_mapping];
2451
2452 /* hardware can't handle really short frames, hardware padding works
2453 * beyond this point
2454 */
2455 if (skb_put_padto(skb, ICE_MIN_TX_LEN))
2456 return NETDEV_TX_OK;
2457
2458 return ice_xmit_frame_ring(skb, tx_ring);
2459}
2460
2461/**
2462 * ice_get_dscp_up - return the UP/TC value for a SKB
2463 * @dcbcfg: DCB config that contains DSCP to UP/TC mapping
2464 * @skb: SKB to query for info to determine UP/TC
2465 *
2466 * This function is to only be called when the PF is in L3 DSCP PFC mode
2467 */
2468static u8 ice_get_dscp_up(struct ice_dcbx_cfg *dcbcfg, struct sk_buff *skb)
2469{
2470 u8 dscp = 0;
2471
2472 if (skb->protocol == htons(ETH_P_IP))
2473 dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2;
2474 else if (skb->protocol == htons(ETH_P_IPV6))
2475 dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2;
2476
2477 return dcbcfg->dscp_map[dscp];
2478}
2479
2480u16
2481ice_select_queue(struct net_device *netdev, struct sk_buff *skb,
2482 struct net_device *sb_dev)
2483{
2484 struct ice_pf *pf = ice_netdev_to_pf(netdev);
2485 struct ice_dcbx_cfg *dcbcfg;
2486
2487 dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
2488 if (dcbcfg->pfc_mode == ICE_QOS_MODE_DSCP)
2489 skb->priority = ice_get_dscp_up(dcbcfg, skb);
2490
2491 return netdev_pick_tx(netdev, skb, sb_dev);
2492}
2493
2494/**
2495 * ice_clean_ctrl_tx_irq - interrupt handler for flow director Tx queue
2496 * @tx_ring: tx_ring to clean
2497 */
2498void ice_clean_ctrl_tx_irq(struct ice_tx_ring *tx_ring)
2499{
2500 struct ice_vsi *vsi = tx_ring->vsi;
2501 s16 i = tx_ring->next_to_clean;
2502 int budget = ICE_DFLT_IRQ_WORK;
2503 struct ice_tx_desc *tx_desc;
2504 struct ice_tx_buf *tx_buf;
2505
2506 tx_buf = &tx_ring->tx_buf[i];
2507 tx_desc = ICE_TX_DESC(tx_ring, i);
2508 i -= tx_ring->count;
2509
2510 do {
2511 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
2512
2513 /* if next_to_watch is not set then there is no pending work */
2514 if (!eop_desc)
2515 break;
2516
2517 /* prevent any other reads prior to eop_desc */
2518 smp_rmb();
2519
2520 /* if the descriptor isn't done, no work to do */
2521 if (!(eop_desc->cmd_type_offset_bsz &
2522 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
2523 break;
2524
2525 /* clear next_to_watch to prevent false hangs */
2526 tx_buf->next_to_watch = NULL;
2527 tx_desc->buf_addr = 0;
2528 tx_desc->cmd_type_offset_bsz = 0;
2529
2530 /* move past filter desc */
2531 tx_buf++;
2532 tx_desc++;
2533 i++;
2534 if (unlikely(!i)) {
2535 i -= tx_ring->count;
2536 tx_buf = tx_ring->tx_buf;
2537 tx_desc = ICE_TX_DESC(tx_ring, 0);
2538 }
2539
2540 /* unmap the data header */
2541 if (dma_unmap_len(tx_buf, len))
2542 dma_unmap_single(tx_ring->dev,
2543 dma_unmap_addr(tx_buf, dma),
2544 dma_unmap_len(tx_buf, len),
2545 DMA_TO_DEVICE);
2546 if (tx_buf->type == ICE_TX_BUF_DUMMY)
2547 devm_kfree(tx_ring->dev, tx_buf->raw_buf);
2548
2549 /* clear next_to_watch to prevent false hangs */
2550 tx_buf->type = ICE_TX_BUF_EMPTY;
2551 tx_buf->tx_flags = 0;
2552 tx_buf->next_to_watch = NULL;
2553 dma_unmap_len_set(tx_buf, len, 0);
2554 tx_desc->buf_addr = 0;
2555 tx_desc->cmd_type_offset_bsz = 0;
2556
2557 /* move past eop_desc for start of next FD desc */
2558 tx_buf++;
2559 tx_desc++;
2560 i++;
2561 if (unlikely(!i)) {
2562 i -= tx_ring->count;
2563 tx_buf = tx_ring->tx_buf;
2564 tx_desc = ICE_TX_DESC(tx_ring, 0);
2565 }
2566
2567 budget--;
2568 } while (likely(budget));
2569
2570 i += tx_ring->count;
2571 tx_ring->next_to_clean = i;
2572
2573 /* re-enable interrupt if needed */
2574 ice_irq_dynamic_ena(&vsi->back->hw, vsi, vsi->q_vectors[0]);
2575}
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2018, Intel Corporation. */
3
4/* The driver transmit and receive code */
5
6#include <linux/mm.h>
7#include <linux/netdevice.h>
8#include <linux/prefetch.h>
9#include <linux/bpf_trace.h>
10#include <net/dsfield.h>
11#include <net/mpls.h>
12#include <net/xdp.h>
13#include "ice_txrx_lib.h"
14#include "ice_lib.h"
15#include "ice.h"
16#include "ice_trace.h"
17#include "ice_dcb_lib.h"
18#include "ice_xsk.h"
19#include "ice_eswitch.h"
20
21#define ICE_RX_HDR_SIZE 256
22
23#define FDIR_DESC_RXDID 0x40
24#define ICE_FDIR_CLEAN_DELAY 10
25
26/**
27 * ice_prgm_fdir_fltr - Program a Flow Director filter
28 * @vsi: VSI to send dummy packet
29 * @fdir_desc: flow director descriptor
30 * @raw_packet: allocated buffer for flow director
31 */
32int
33ice_prgm_fdir_fltr(struct ice_vsi *vsi, struct ice_fltr_desc *fdir_desc,
34 u8 *raw_packet)
35{
36 struct ice_tx_buf *tx_buf, *first;
37 struct ice_fltr_desc *f_desc;
38 struct ice_tx_desc *tx_desc;
39 struct ice_tx_ring *tx_ring;
40 struct device *dev;
41 dma_addr_t dma;
42 u32 td_cmd;
43 u16 i;
44
45 /* VSI and Tx ring */
46 if (!vsi)
47 return -ENOENT;
48 tx_ring = vsi->tx_rings[0];
49 if (!tx_ring || !tx_ring->desc)
50 return -ENOENT;
51 dev = tx_ring->dev;
52
53 /* we are using two descriptors to add/del a filter and we can wait */
54 for (i = ICE_FDIR_CLEAN_DELAY; ICE_DESC_UNUSED(tx_ring) < 2; i--) {
55 if (!i)
56 return -EAGAIN;
57 msleep_interruptible(1);
58 }
59
60 dma = dma_map_single(dev, raw_packet, ICE_FDIR_MAX_RAW_PKT_SIZE,
61 DMA_TO_DEVICE);
62
63 if (dma_mapping_error(dev, dma))
64 return -EINVAL;
65
66 /* grab the next descriptor */
67 i = tx_ring->next_to_use;
68 first = &tx_ring->tx_buf[i];
69 f_desc = ICE_TX_FDIRDESC(tx_ring, i);
70 memcpy(f_desc, fdir_desc, sizeof(*f_desc));
71
72 i++;
73 i = (i < tx_ring->count) ? i : 0;
74 tx_desc = ICE_TX_DESC(tx_ring, i);
75 tx_buf = &tx_ring->tx_buf[i];
76
77 i++;
78 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
79
80 memset(tx_buf, 0, sizeof(*tx_buf));
81 dma_unmap_len_set(tx_buf, len, ICE_FDIR_MAX_RAW_PKT_SIZE);
82 dma_unmap_addr_set(tx_buf, dma, dma);
83
84 tx_desc->buf_addr = cpu_to_le64(dma);
85 td_cmd = ICE_TXD_LAST_DESC_CMD | ICE_TX_DESC_CMD_DUMMY |
86 ICE_TX_DESC_CMD_RE;
87
88 tx_buf->tx_flags = ICE_TX_FLAGS_DUMMY_PKT;
89 tx_buf->raw_buf = raw_packet;
90
91 tx_desc->cmd_type_offset_bsz =
92 ice_build_ctob(td_cmd, 0, ICE_FDIR_MAX_RAW_PKT_SIZE, 0);
93
94 /* Force memory write to complete before letting h/w know
95 * there are new descriptors to fetch.
96 */
97 wmb();
98
99 /* mark the data descriptor to be watched */
100 first->next_to_watch = tx_desc;
101
102 writel(tx_ring->next_to_use, tx_ring->tail);
103
104 return 0;
105}
106
107/**
108 * ice_unmap_and_free_tx_buf - Release a Tx buffer
109 * @ring: the ring that owns the buffer
110 * @tx_buf: the buffer to free
111 */
112static void
113ice_unmap_and_free_tx_buf(struct ice_tx_ring *ring, struct ice_tx_buf *tx_buf)
114{
115 if (tx_buf->skb) {
116 if (tx_buf->tx_flags & ICE_TX_FLAGS_DUMMY_PKT)
117 devm_kfree(ring->dev, tx_buf->raw_buf);
118 else if (ice_ring_is_xdp(ring))
119 page_frag_free(tx_buf->raw_buf);
120 else
121 dev_kfree_skb_any(tx_buf->skb);
122 if (dma_unmap_len(tx_buf, len))
123 dma_unmap_single(ring->dev,
124 dma_unmap_addr(tx_buf, dma),
125 dma_unmap_len(tx_buf, len),
126 DMA_TO_DEVICE);
127 } else if (dma_unmap_len(tx_buf, len)) {
128 dma_unmap_page(ring->dev,
129 dma_unmap_addr(tx_buf, dma),
130 dma_unmap_len(tx_buf, len),
131 DMA_TO_DEVICE);
132 }
133
134 tx_buf->next_to_watch = NULL;
135 tx_buf->skb = NULL;
136 dma_unmap_len_set(tx_buf, len, 0);
137 /* tx_buf must be completely set up in the transmit path */
138}
139
140static struct netdev_queue *txring_txq(const struct ice_tx_ring *ring)
141{
142 return netdev_get_tx_queue(ring->netdev, ring->q_index);
143}
144
145/**
146 * ice_clean_tx_ring - Free any empty Tx buffers
147 * @tx_ring: ring to be cleaned
148 */
149void ice_clean_tx_ring(struct ice_tx_ring *tx_ring)
150{
151 u32 size;
152 u16 i;
153
154 if (ice_ring_is_xdp(tx_ring) && tx_ring->xsk_pool) {
155 ice_xsk_clean_xdp_ring(tx_ring);
156 goto tx_skip_free;
157 }
158
159 /* ring already cleared, nothing to do */
160 if (!tx_ring->tx_buf)
161 return;
162
163 /* Free all the Tx ring sk_buffs */
164 for (i = 0; i < tx_ring->count; i++)
165 ice_unmap_and_free_tx_buf(tx_ring, &tx_ring->tx_buf[i]);
166
167tx_skip_free:
168 memset(tx_ring->tx_buf, 0, sizeof(*tx_ring->tx_buf) * tx_ring->count);
169
170 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
171 PAGE_SIZE);
172 /* Zero out the descriptor ring */
173 memset(tx_ring->desc, 0, size);
174
175 tx_ring->next_to_use = 0;
176 tx_ring->next_to_clean = 0;
177 tx_ring->next_dd = ICE_RING_QUARTER(tx_ring) - 1;
178 tx_ring->next_rs = ICE_RING_QUARTER(tx_ring) - 1;
179
180 if (!tx_ring->netdev)
181 return;
182
183 /* cleanup Tx queue statistics */
184 netdev_tx_reset_queue(txring_txq(tx_ring));
185}
186
187/**
188 * ice_free_tx_ring - Free Tx resources per queue
189 * @tx_ring: Tx descriptor ring for a specific queue
190 *
191 * Free all transmit software resources
192 */
193void ice_free_tx_ring(struct ice_tx_ring *tx_ring)
194{
195 u32 size;
196
197 ice_clean_tx_ring(tx_ring);
198 devm_kfree(tx_ring->dev, tx_ring->tx_buf);
199 tx_ring->tx_buf = NULL;
200
201 if (tx_ring->desc) {
202 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
203 PAGE_SIZE);
204 dmam_free_coherent(tx_ring->dev, size,
205 tx_ring->desc, tx_ring->dma);
206 tx_ring->desc = NULL;
207 }
208}
209
210/**
211 * ice_clean_tx_irq - Reclaim resources after transmit completes
212 * @tx_ring: Tx ring to clean
213 * @napi_budget: Used to determine if we are in netpoll
214 *
215 * Returns true if there's any budget left (e.g. the clean is finished)
216 */
217static bool ice_clean_tx_irq(struct ice_tx_ring *tx_ring, int napi_budget)
218{
219 unsigned int total_bytes = 0, total_pkts = 0;
220 unsigned int budget = ICE_DFLT_IRQ_WORK;
221 struct ice_vsi *vsi = tx_ring->vsi;
222 s16 i = tx_ring->next_to_clean;
223 struct ice_tx_desc *tx_desc;
224 struct ice_tx_buf *tx_buf;
225
226 /* get the bql data ready */
227 netdev_txq_bql_complete_prefetchw(txring_txq(tx_ring));
228
229 tx_buf = &tx_ring->tx_buf[i];
230 tx_desc = ICE_TX_DESC(tx_ring, i);
231 i -= tx_ring->count;
232
233 prefetch(&vsi->state);
234
235 do {
236 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
237
238 /* if next_to_watch is not set then there is no work pending */
239 if (!eop_desc)
240 break;
241
242 /* follow the guidelines of other drivers */
243 prefetchw(&tx_buf->skb->users);
244
245 smp_rmb(); /* prevent any other reads prior to eop_desc */
246
247 ice_trace(clean_tx_irq, tx_ring, tx_desc, tx_buf);
248 /* if the descriptor isn't done, no work yet to do */
249 if (!(eop_desc->cmd_type_offset_bsz &
250 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
251 break;
252
253 /* clear next_to_watch to prevent false hangs */
254 tx_buf->next_to_watch = NULL;
255
256 /* update the statistics for this packet */
257 total_bytes += tx_buf->bytecount;
258 total_pkts += tx_buf->gso_segs;
259
260 /* free the skb */
261 napi_consume_skb(tx_buf->skb, napi_budget);
262
263 /* unmap skb header data */
264 dma_unmap_single(tx_ring->dev,
265 dma_unmap_addr(tx_buf, dma),
266 dma_unmap_len(tx_buf, len),
267 DMA_TO_DEVICE);
268
269 /* clear tx_buf data */
270 tx_buf->skb = NULL;
271 dma_unmap_len_set(tx_buf, len, 0);
272
273 /* unmap remaining buffers */
274 while (tx_desc != eop_desc) {
275 ice_trace(clean_tx_irq_unmap, tx_ring, tx_desc, tx_buf);
276 tx_buf++;
277 tx_desc++;
278 i++;
279 if (unlikely(!i)) {
280 i -= tx_ring->count;
281 tx_buf = tx_ring->tx_buf;
282 tx_desc = ICE_TX_DESC(tx_ring, 0);
283 }
284
285 /* unmap any remaining paged data */
286 if (dma_unmap_len(tx_buf, len)) {
287 dma_unmap_page(tx_ring->dev,
288 dma_unmap_addr(tx_buf, dma),
289 dma_unmap_len(tx_buf, len),
290 DMA_TO_DEVICE);
291 dma_unmap_len_set(tx_buf, len, 0);
292 }
293 }
294 ice_trace(clean_tx_irq_unmap_eop, tx_ring, tx_desc, tx_buf);
295
296 /* move us one more past the eop_desc for start of next pkt */
297 tx_buf++;
298 tx_desc++;
299 i++;
300 if (unlikely(!i)) {
301 i -= tx_ring->count;
302 tx_buf = tx_ring->tx_buf;
303 tx_desc = ICE_TX_DESC(tx_ring, 0);
304 }
305
306 prefetch(tx_desc);
307
308 /* update budget accounting */
309 budget--;
310 } while (likely(budget));
311
312 i += tx_ring->count;
313 tx_ring->next_to_clean = i;
314
315 ice_update_tx_ring_stats(tx_ring, total_pkts, total_bytes);
316 netdev_tx_completed_queue(txring_txq(tx_ring), total_pkts, total_bytes);
317
318#define TX_WAKE_THRESHOLD ((s16)(DESC_NEEDED * 2))
319 if (unlikely(total_pkts && netif_carrier_ok(tx_ring->netdev) &&
320 (ICE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
321 /* Make sure that anybody stopping the queue after this
322 * sees the new next_to_clean.
323 */
324 smp_mb();
325 if (netif_tx_queue_stopped(txring_txq(tx_ring)) &&
326 !test_bit(ICE_VSI_DOWN, vsi->state)) {
327 netif_tx_wake_queue(txring_txq(tx_ring));
328 ++tx_ring->ring_stats->tx_stats.restart_q;
329 }
330 }
331
332 return !!budget;
333}
334
335/**
336 * ice_setup_tx_ring - Allocate the Tx descriptors
337 * @tx_ring: the Tx ring to set up
338 *
339 * Return 0 on success, negative on error
340 */
341int ice_setup_tx_ring(struct ice_tx_ring *tx_ring)
342{
343 struct device *dev = tx_ring->dev;
344 u32 size;
345
346 if (!dev)
347 return -ENOMEM;
348
349 /* warn if we are about to overwrite the pointer */
350 WARN_ON(tx_ring->tx_buf);
351 tx_ring->tx_buf =
352 devm_kcalloc(dev, sizeof(*tx_ring->tx_buf), tx_ring->count,
353 GFP_KERNEL);
354 if (!tx_ring->tx_buf)
355 return -ENOMEM;
356
357 /* round up to nearest page */
358 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
359 PAGE_SIZE);
360 tx_ring->desc = dmam_alloc_coherent(dev, size, &tx_ring->dma,
361 GFP_KERNEL);
362 if (!tx_ring->desc) {
363 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
364 size);
365 goto err;
366 }
367
368 tx_ring->next_to_use = 0;
369 tx_ring->next_to_clean = 0;
370 tx_ring->ring_stats->tx_stats.prev_pkt = -1;
371 return 0;
372
373err:
374 devm_kfree(dev, tx_ring->tx_buf);
375 tx_ring->tx_buf = NULL;
376 return -ENOMEM;
377}
378
379/**
380 * ice_clean_rx_ring - Free Rx buffers
381 * @rx_ring: ring to be cleaned
382 */
383void ice_clean_rx_ring(struct ice_rx_ring *rx_ring)
384{
385 struct device *dev = rx_ring->dev;
386 u32 size;
387 u16 i;
388
389 /* ring already cleared, nothing to do */
390 if (!rx_ring->rx_buf)
391 return;
392
393 if (rx_ring->skb) {
394 dev_kfree_skb(rx_ring->skb);
395 rx_ring->skb = NULL;
396 }
397
398 if (rx_ring->xsk_pool) {
399 ice_xsk_clean_rx_ring(rx_ring);
400 goto rx_skip_free;
401 }
402
403 /* Free all the Rx ring sk_buffs */
404 for (i = 0; i < rx_ring->count; i++) {
405 struct ice_rx_buf *rx_buf = &rx_ring->rx_buf[i];
406
407 if (!rx_buf->page)
408 continue;
409
410 /* Invalidate cache lines that may have been written to by
411 * device so that we avoid corrupting memory.
412 */
413 dma_sync_single_range_for_cpu(dev, rx_buf->dma,
414 rx_buf->page_offset,
415 rx_ring->rx_buf_len,
416 DMA_FROM_DEVICE);
417
418 /* free resources associated with mapping */
419 dma_unmap_page_attrs(dev, rx_buf->dma, ice_rx_pg_size(rx_ring),
420 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
421 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
422
423 rx_buf->page = NULL;
424 rx_buf->page_offset = 0;
425 }
426
427rx_skip_free:
428 if (rx_ring->xsk_pool)
429 memset(rx_ring->xdp_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->xdp_buf)));
430 else
431 memset(rx_ring->rx_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->rx_buf)));
432
433 /* Zero out the descriptor ring */
434 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
435 PAGE_SIZE);
436 memset(rx_ring->desc, 0, size);
437
438 rx_ring->next_to_alloc = 0;
439 rx_ring->next_to_clean = 0;
440 rx_ring->next_to_use = 0;
441}
442
443/**
444 * ice_free_rx_ring - Free Rx resources
445 * @rx_ring: ring to clean the resources from
446 *
447 * Free all receive software resources
448 */
449void ice_free_rx_ring(struct ice_rx_ring *rx_ring)
450{
451 u32 size;
452
453 ice_clean_rx_ring(rx_ring);
454 if (rx_ring->vsi->type == ICE_VSI_PF)
455 if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
456 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
457 rx_ring->xdp_prog = NULL;
458 if (rx_ring->xsk_pool) {
459 kfree(rx_ring->xdp_buf);
460 rx_ring->xdp_buf = NULL;
461 } else {
462 kfree(rx_ring->rx_buf);
463 rx_ring->rx_buf = NULL;
464 }
465
466 if (rx_ring->desc) {
467 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
468 PAGE_SIZE);
469 dmam_free_coherent(rx_ring->dev, size,
470 rx_ring->desc, rx_ring->dma);
471 rx_ring->desc = NULL;
472 }
473}
474
475/**
476 * ice_setup_rx_ring - Allocate the Rx descriptors
477 * @rx_ring: the Rx ring to set up
478 *
479 * Return 0 on success, negative on error
480 */
481int ice_setup_rx_ring(struct ice_rx_ring *rx_ring)
482{
483 struct device *dev = rx_ring->dev;
484 u32 size;
485
486 if (!dev)
487 return -ENOMEM;
488
489 /* warn if we are about to overwrite the pointer */
490 WARN_ON(rx_ring->rx_buf);
491 rx_ring->rx_buf =
492 kcalloc(rx_ring->count, sizeof(*rx_ring->rx_buf), GFP_KERNEL);
493 if (!rx_ring->rx_buf)
494 return -ENOMEM;
495
496 /* round up to nearest page */
497 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
498 PAGE_SIZE);
499 rx_ring->desc = dmam_alloc_coherent(dev, size, &rx_ring->dma,
500 GFP_KERNEL);
501 if (!rx_ring->desc) {
502 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
503 size);
504 goto err;
505 }
506
507 rx_ring->next_to_use = 0;
508 rx_ring->next_to_clean = 0;
509
510 if (ice_is_xdp_ena_vsi(rx_ring->vsi))
511 WRITE_ONCE(rx_ring->xdp_prog, rx_ring->vsi->xdp_prog);
512
513 if (rx_ring->vsi->type == ICE_VSI_PF &&
514 !xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
515 if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
516 rx_ring->q_index, rx_ring->q_vector->napi.napi_id))
517 goto err;
518 return 0;
519
520err:
521 kfree(rx_ring->rx_buf);
522 rx_ring->rx_buf = NULL;
523 return -ENOMEM;
524}
525
526static unsigned int
527ice_rx_frame_truesize(struct ice_rx_ring *rx_ring, unsigned int __maybe_unused size)
528{
529 unsigned int truesize;
530
531#if (PAGE_SIZE < 8192)
532 truesize = ice_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
533#else
534 truesize = rx_ring->rx_offset ?
535 SKB_DATA_ALIGN(rx_ring->rx_offset + size) +
536 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
537 SKB_DATA_ALIGN(size);
538#endif
539 return truesize;
540}
541
542/**
543 * ice_run_xdp - Executes an XDP program on initialized xdp_buff
544 * @rx_ring: Rx ring
545 * @xdp: xdp_buff used as input to the XDP program
546 * @xdp_prog: XDP program to run
547 * @xdp_ring: ring to be used for XDP_TX action
548 *
549 * Returns any of ICE_XDP_{PASS, CONSUMED, TX, REDIR}
550 */
551static int
552ice_run_xdp(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
553 struct bpf_prog *xdp_prog, struct ice_tx_ring *xdp_ring)
554{
555 int err;
556 u32 act;
557
558 act = bpf_prog_run_xdp(xdp_prog, xdp);
559 switch (act) {
560 case XDP_PASS:
561 return ICE_XDP_PASS;
562 case XDP_TX:
563 if (static_branch_unlikely(&ice_xdp_locking_key))
564 spin_lock(&xdp_ring->tx_lock);
565 err = ice_xmit_xdp_ring(xdp->data, xdp->data_end - xdp->data, xdp_ring);
566 if (static_branch_unlikely(&ice_xdp_locking_key))
567 spin_unlock(&xdp_ring->tx_lock);
568 if (err == ICE_XDP_CONSUMED)
569 goto out_failure;
570 return err;
571 case XDP_REDIRECT:
572 err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog);
573 if (err)
574 goto out_failure;
575 return ICE_XDP_REDIR;
576 default:
577 bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act);
578 fallthrough;
579 case XDP_ABORTED:
580out_failure:
581 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
582 fallthrough;
583 case XDP_DROP:
584 return ICE_XDP_CONSUMED;
585 }
586}
587
588/**
589 * ice_xdp_xmit - submit packets to XDP ring for transmission
590 * @dev: netdev
591 * @n: number of XDP frames to be transmitted
592 * @frames: XDP frames to be transmitted
593 * @flags: transmit flags
594 *
595 * Returns number of frames successfully sent. Failed frames
596 * will be free'ed by XDP core.
597 * For error cases, a negative errno code is returned and no-frames
598 * are transmitted (caller must handle freeing frames).
599 */
600int
601ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
602 u32 flags)
603{
604 struct ice_netdev_priv *np = netdev_priv(dev);
605 unsigned int queue_index = smp_processor_id();
606 struct ice_vsi *vsi = np->vsi;
607 struct ice_tx_ring *xdp_ring;
608 int nxmit = 0, i;
609
610 if (test_bit(ICE_VSI_DOWN, vsi->state))
611 return -ENETDOWN;
612
613 if (!ice_is_xdp_ena_vsi(vsi))
614 return -ENXIO;
615
616 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
617 return -EINVAL;
618
619 if (static_branch_unlikely(&ice_xdp_locking_key)) {
620 queue_index %= vsi->num_xdp_txq;
621 xdp_ring = vsi->xdp_rings[queue_index];
622 spin_lock(&xdp_ring->tx_lock);
623 } else {
624 /* Generally, should not happen */
625 if (unlikely(queue_index >= vsi->num_xdp_txq))
626 return -ENXIO;
627 xdp_ring = vsi->xdp_rings[queue_index];
628 }
629
630 for (i = 0; i < n; i++) {
631 struct xdp_frame *xdpf = frames[i];
632 int err;
633
634 err = ice_xmit_xdp_ring(xdpf->data, xdpf->len, xdp_ring);
635 if (err != ICE_XDP_TX)
636 break;
637 nxmit++;
638 }
639
640 if (unlikely(flags & XDP_XMIT_FLUSH))
641 ice_xdp_ring_update_tail(xdp_ring);
642
643 if (static_branch_unlikely(&ice_xdp_locking_key))
644 spin_unlock(&xdp_ring->tx_lock);
645
646 return nxmit;
647}
648
649/**
650 * ice_alloc_mapped_page - recycle or make a new page
651 * @rx_ring: ring to use
652 * @bi: rx_buf struct to modify
653 *
654 * Returns true if the page was successfully allocated or
655 * reused.
656 */
657static bool
658ice_alloc_mapped_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *bi)
659{
660 struct page *page = bi->page;
661 dma_addr_t dma;
662
663 /* since we are recycling buffers we should seldom need to alloc */
664 if (likely(page))
665 return true;
666
667 /* alloc new page for storage */
668 page = dev_alloc_pages(ice_rx_pg_order(rx_ring));
669 if (unlikely(!page)) {
670 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
671 return false;
672 }
673
674 /* map page for use */
675 dma = dma_map_page_attrs(rx_ring->dev, page, 0, ice_rx_pg_size(rx_ring),
676 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
677
678 /* if mapping failed free memory back to system since
679 * there isn't much point in holding memory we can't use
680 */
681 if (dma_mapping_error(rx_ring->dev, dma)) {
682 __free_pages(page, ice_rx_pg_order(rx_ring));
683 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
684 return false;
685 }
686
687 bi->dma = dma;
688 bi->page = page;
689 bi->page_offset = rx_ring->rx_offset;
690 page_ref_add(page, USHRT_MAX - 1);
691 bi->pagecnt_bias = USHRT_MAX;
692
693 return true;
694}
695
696/**
697 * ice_alloc_rx_bufs - Replace used receive buffers
698 * @rx_ring: ring to place buffers on
699 * @cleaned_count: number of buffers to replace
700 *
701 * Returns false if all allocations were successful, true if any fail. Returning
702 * true signals to the caller that we didn't replace cleaned_count buffers and
703 * there is more work to do.
704 *
705 * First, try to clean "cleaned_count" Rx buffers. Then refill the cleaned Rx
706 * buffers. Then bump tail at most one time. Grouping like this lets us avoid
707 * multiple tail writes per call.
708 */
709bool ice_alloc_rx_bufs(struct ice_rx_ring *rx_ring, u16 cleaned_count)
710{
711 union ice_32b_rx_flex_desc *rx_desc;
712 u16 ntu = rx_ring->next_to_use;
713 struct ice_rx_buf *bi;
714
715 /* do nothing if no valid netdev defined */
716 if ((!rx_ring->netdev && rx_ring->vsi->type != ICE_VSI_CTRL) ||
717 !cleaned_count)
718 return false;
719
720 /* get the Rx descriptor and buffer based on next_to_use */
721 rx_desc = ICE_RX_DESC(rx_ring, ntu);
722 bi = &rx_ring->rx_buf[ntu];
723
724 do {
725 /* if we fail here, we have work remaining */
726 if (!ice_alloc_mapped_page(rx_ring, bi))
727 break;
728
729 /* sync the buffer for use by the device */
730 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
731 bi->page_offset,
732 rx_ring->rx_buf_len,
733 DMA_FROM_DEVICE);
734
735 /* Refresh the desc even if buffer_addrs didn't change
736 * because each write-back erases this info.
737 */
738 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
739
740 rx_desc++;
741 bi++;
742 ntu++;
743 if (unlikely(ntu == rx_ring->count)) {
744 rx_desc = ICE_RX_DESC(rx_ring, 0);
745 bi = rx_ring->rx_buf;
746 ntu = 0;
747 }
748
749 /* clear the status bits for the next_to_use descriptor */
750 rx_desc->wb.status_error0 = 0;
751
752 cleaned_count--;
753 } while (cleaned_count);
754
755 if (rx_ring->next_to_use != ntu)
756 ice_release_rx_desc(rx_ring, ntu);
757
758 return !!cleaned_count;
759}
760
761/**
762 * ice_rx_buf_adjust_pg_offset - Prepare Rx buffer for reuse
763 * @rx_buf: Rx buffer to adjust
764 * @size: Size of adjustment
765 *
766 * Update the offset within page so that Rx buf will be ready to be reused.
767 * For systems with PAGE_SIZE < 8192 this function will flip the page offset
768 * so the second half of page assigned to Rx buffer will be used, otherwise
769 * the offset is moved by "size" bytes
770 */
771static void
772ice_rx_buf_adjust_pg_offset(struct ice_rx_buf *rx_buf, unsigned int size)
773{
774#if (PAGE_SIZE < 8192)
775 /* flip page offset to other buffer */
776 rx_buf->page_offset ^= size;
777#else
778 /* move offset up to the next cache line */
779 rx_buf->page_offset += size;
780#endif
781}
782
783/**
784 * ice_can_reuse_rx_page - Determine if page can be reused for another Rx
785 * @rx_buf: buffer containing the page
786 * @rx_buf_pgcnt: rx_buf page refcount pre xdp_do_redirect() call
787 *
788 * If page is reusable, we have a green light for calling ice_reuse_rx_page,
789 * which will assign the current buffer to the buffer that next_to_alloc is
790 * pointing to; otherwise, the DMA mapping needs to be destroyed and
791 * page freed
792 */
793static bool
794ice_can_reuse_rx_page(struct ice_rx_buf *rx_buf, int rx_buf_pgcnt)
795{
796 unsigned int pagecnt_bias = rx_buf->pagecnt_bias;
797 struct page *page = rx_buf->page;
798
799 /* avoid re-using remote and pfmemalloc pages */
800 if (!dev_page_is_reusable(page))
801 return false;
802
803#if (PAGE_SIZE < 8192)
804 /* if we are only owner of page we can reuse it */
805 if (unlikely((rx_buf_pgcnt - pagecnt_bias) > 1))
806 return false;
807#else
808#define ICE_LAST_OFFSET \
809 (SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_2048)
810 if (rx_buf->page_offset > ICE_LAST_OFFSET)
811 return false;
812#endif /* PAGE_SIZE < 8192) */
813
814 /* If we have drained the page fragment pool we need to update
815 * the pagecnt_bias and page count so that we fully restock the
816 * number of references the driver holds.
817 */
818 if (unlikely(pagecnt_bias == 1)) {
819 page_ref_add(page, USHRT_MAX - 1);
820 rx_buf->pagecnt_bias = USHRT_MAX;
821 }
822
823 return true;
824}
825
826/**
827 * ice_add_rx_frag - Add contents of Rx buffer to sk_buff as a frag
828 * @rx_ring: Rx descriptor ring to transact packets on
829 * @rx_buf: buffer containing page to add
830 * @skb: sk_buff to place the data into
831 * @size: packet length from rx_desc
832 *
833 * This function will add the data contained in rx_buf->page to the skb.
834 * It will just attach the page as a frag to the skb.
835 * The function will then update the page offset.
836 */
837static void
838ice_add_rx_frag(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf,
839 struct sk_buff *skb, unsigned int size)
840{
841#if (PAGE_SIZE >= 8192)
842 unsigned int truesize = SKB_DATA_ALIGN(size + rx_ring->rx_offset);
843#else
844 unsigned int truesize = ice_rx_pg_size(rx_ring) / 2;
845#endif
846
847 if (!size)
848 return;
849 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buf->page,
850 rx_buf->page_offset, size, truesize);
851
852 /* page is being used so we must update the page offset */
853 ice_rx_buf_adjust_pg_offset(rx_buf, truesize);
854}
855
856/**
857 * ice_reuse_rx_page - page flip buffer and store it back on the ring
858 * @rx_ring: Rx descriptor ring to store buffers on
859 * @old_buf: donor buffer to have page reused
860 *
861 * Synchronizes page for reuse by the adapter
862 */
863static void
864ice_reuse_rx_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *old_buf)
865{
866 u16 nta = rx_ring->next_to_alloc;
867 struct ice_rx_buf *new_buf;
868
869 new_buf = &rx_ring->rx_buf[nta];
870
871 /* update, and store next to alloc */
872 nta++;
873 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
874
875 /* Transfer page from old buffer to new buffer.
876 * Move each member individually to avoid possible store
877 * forwarding stalls and unnecessary copy of skb.
878 */
879 new_buf->dma = old_buf->dma;
880 new_buf->page = old_buf->page;
881 new_buf->page_offset = old_buf->page_offset;
882 new_buf->pagecnt_bias = old_buf->pagecnt_bias;
883}
884
885/**
886 * ice_get_rx_buf - Fetch Rx buffer and synchronize data for use
887 * @rx_ring: Rx descriptor ring to transact packets on
888 * @size: size of buffer to add to skb
889 * @rx_buf_pgcnt: rx_buf page refcount
890 *
891 * This function will pull an Rx buffer from the ring and synchronize it
892 * for use by the CPU.
893 */
894static struct ice_rx_buf *
895ice_get_rx_buf(struct ice_rx_ring *rx_ring, const unsigned int size,
896 int *rx_buf_pgcnt)
897{
898 struct ice_rx_buf *rx_buf;
899
900 rx_buf = &rx_ring->rx_buf[rx_ring->next_to_clean];
901 *rx_buf_pgcnt =
902#if (PAGE_SIZE < 8192)
903 page_count(rx_buf->page);
904#else
905 0;
906#endif
907 prefetchw(rx_buf->page);
908
909 if (!size)
910 return rx_buf;
911 /* we are reusing so sync this buffer for CPU use */
912 dma_sync_single_range_for_cpu(rx_ring->dev, rx_buf->dma,
913 rx_buf->page_offset, size,
914 DMA_FROM_DEVICE);
915
916 /* We have pulled a buffer for use, so decrement pagecnt_bias */
917 rx_buf->pagecnt_bias--;
918
919 return rx_buf;
920}
921
922/**
923 * ice_build_skb - Build skb around an existing buffer
924 * @rx_ring: Rx descriptor ring to transact packets on
925 * @rx_buf: Rx buffer to pull data from
926 * @xdp: xdp_buff pointing to the data
927 *
928 * This function builds an skb around an existing Rx buffer, taking care
929 * to set up the skb correctly and avoid any memcpy overhead.
930 */
931static struct sk_buff *
932ice_build_skb(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf,
933 struct xdp_buff *xdp)
934{
935 u8 metasize = xdp->data - xdp->data_meta;
936#if (PAGE_SIZE < 8192)
937 unsigned int truesize = ice_rx_pg_size(rx_ring) / 2;
938#else
939 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
940 SKB_DATA_ALIGN(xdp->data_end -
941 xdp->data_hard_start);
942#endif
943 struct sk_buff *skb;
944
945 /* Prefetch first cache line of first page. If xdp->data_meta
946 * is unused, this points exactly as xdp->data, otherwise we
947 * likely have a consumer accessing first few bytes of meta
948 * data, and then actual data.
949 */
950 net_prefetch(xdp->data_meta);
951 /* build an skb around the page buffer */
952 skb = napi_build_skb(xdp->data_hard_start, truesize);
953 if (unlikely(!skb))
954 return NULL;
955
956 /* must to record Rx queue, otherwise OS features such as
957 * symmetric queue won't work
958 */
959 skb_record_rx_queue(skb, rx_ring->q_index);
960
961 /* update pointers within the skb to store the data */
962 skb_reserve(skb, xdp->data - xdp->data_hard_start);
963 __skb_put(skb, xdp->data_end - xdp->data);
964 if (metasize)
965 skb_metadata_set(skb, metasize);
966
967 /* buffer is used by skb, update page_offset */
968 ice_rx_buf_adjust_pg_offset(rx_buf, truesize);
969
970 return skb;
971}
972
973/**
974 * ice_construct_skb - Allocate skb and populate it
975 * @rx_ring: Rx descriptor ring to transact packets on
976 * @rx_buf: Rx buffer to pull data from
977 * @xdp: xdp_buff pointing to the data
978 *
979 * This function allocates an skb. It then populates it with the page
980 * data from the current receive descriptor, taking care to set up the
981 * skb correctly.
982 */
983static struct sk_buff *
984ice_construct_skb(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf,
985 struct xdp_buff *xdp)
986{
987 unsigned int metasize = xdp->data - xdp->data_meta;
988 unsigned int size = xdp->data_end - xdp->data;
989 unsigned int headlen;
990 struct sk_buff *skb;
991
992 /* prefetch first cache line of first page */
993 net_prefetch(xdp->data_meta);
994
995 /* allocate a skb to store the frags */
996 skb = __napi_alloc_skb(&rx_ring->q_vector->napi,
997 ICE_RX_HDR_SIZE + metasize,
998 GFP_ATOMIC | __GFP_NOWARN);
999 if (unlikely(!skb))
1000 return NULL;
1001
1002 skb_record_rx_queue(skb, rx_ring->q_index);
1003 /* Determine available headroom for copy */
1004 headlen = size;
1005 if (headlen > ICE_RX_HDR_SIZE)
1006 headlen = eth_get_headlen(skb->dev, xdp->data, ICE_RX_HDR_SIZE);
1007
1008 /* align pull length to size of long to optimize memcpy performance */
1009 memcpy(__skb_put(skb, headlen + metasize), xdp->data_meta,
1010 ALIGN(headlen + metasize, sizeof(long)));
1011
1012 if (metasize) {
1013 skb_metadata_set(skb, metasize);
1014 __skb_pull(skb, metasize);
1015 }
1016
1017 /* if we exhaust the linear part then add what is left as a frag */
1018 size -= headlen;
1019 if (size) {
1020#if (PAGE_SIZE >= 8192)
1021 unsigned int truesize = SKB_DATA_ALIGN(size);
1022#else
1023 unsigned int truesize = ice_rx_pg_size(rx_ring) / 2;
1024#endif
1025 skb_add_rx_frag(skb, 0, rx_buf->page,
1026 rx_buf->page_offset + headlen, size, truesize);
1027 /* buffer is used by skb, update page_offset */
1028 ice_rx_buf_adjust_pg_offset(rx_buf, truesize);
1029 } else {
1030 /* buffer is unused, reset bias back to rx_buf; data was copied
1031 * onto skb's linear part so there's no need for adjusting
1032 * page offset and we can reuse this buffer as-is
1033 */
1034 rx_buf->pagecnt_bias++;
1035 }
1036
1037 return skb;
1038}
1039
1040/**
1041 * ice_put_rx_buf - Clean up used buffer and either recycle or free
1042 * @rx_ring: Rx descriptor ring to transact packets on
1043 * @rx_buf: Rx buffer to pull data from
1044 * @rx_buf_pgcnt: Rx buffer page count pre xdp_do_redirect()
1045 *
1046 * This function will update next_to_clean and then clean up the contents
1047 * of the rx_buf. It will either recycle the buffer or unmap it and free
1048 * the associated resources.
1049 */
1050static void
1051ice_put_rx_buf(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf,
1052 int rx_buf_pgcnt)
1053{
1054 u16 ntc = rx_ring->next_to_clean + 1;
1055
1056 /* fetch, update, and store next to clean */
1057 ntc = (ntc < rx_ring->count) ? ntc : 0;
1058 rx_ring->next_to_clean = ntc;
1059
1060 if (!rx_buf)
1061 return;
1062
1063 if (ice_can_reuse_rx_page(rx_buf, rx_buf_pgcnt)) {
1064 /* hand second half of page back to the ring */
1065 ice_reuse_rx_page(rx_ring, rx_buf);
1066 } else {
1067 /* we are not reusing the buffer so unmap it */
1068 dma_unmap_page_attrs(rx_ring->dev, rx_buf->dma,
1069 ice_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
1070 ICE_RX_DMA_ATTR);
1071 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
1072 }
1073
1074 /* clear contents of buffer_info */
1075 rx_buf->page = NULL;
1076}
1077
1078/**
1079 * ice_is_non_eop - process handling of non-EOP buffers
1080 * @rx_ring: Rx ring being processed
1081 * @rx_desc: Rx descriptor for current buffer
1082 *
1083 * If the buffer is an EOP buffer, this function exits returning false,
1084 * otherwise return true indicating that this is in fact a non-EOP buffer.
1085 */
1086static bool
1087ice_is_non_eop(struct ice_rx_ring *rx_ring, union ice_32b_rx_flex_desc *rx_desc)
1088{
1089 /* if we are the last buffer then there is nothing else to do */
1090#define ICE_RXD_EOF BIT(ICE_RX_FLEX_DESC_STATUS0_EOF_S)
1091 if (likely(ice_test_staterr(rx_desc->wb.status_error0, ICE_RXD_EOF)))
1092 return false;
1093
1094 rx_ring->ring_stats->rx_stats.non_eop_descs++;
1095
1096 return true;
1097}
1098
1099/**
1100 * ice_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1101 * @rx_ring: Rx descriptor ring to transact packets on
1102 * @budget: Total limit on number of packets to process
1103 *
1104 * This function provides a "bounce buffer" approach to Rx interrupt
1105 * processing. The advantage to this is that on systems that have
1106 * expensive overhead for IOMMU access this provides a means of avoiding
1107 * it by maintaining the mapping of the page to the system.
1108 *
1109 * Returns amount of work completed
1110 */
1111int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget)
1112{
1113 unsigned int total_rx_bytes = 0, total_rx_pkts = 0, frame_sz = 0;
1114 u16 cleaned_count = ICE_DESC_UNUSED(rx_ring);
1115 unsigned int offset = rx_ring->rx_offset;
1116 struct ice_tx_ring *xdp_ring = NULL;
1117 unsigned int xdp_res, xdp_xmit = 0;
1118 struct sk_buff *skb = rx_ring->skb;
1119 struct bpf_prog *xdp_prog = NULL;
1120 struct xdp_buff xdp;
1121 bool failure;
1122
1123 /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
1124#if (PAGE_SIZE < 8192)
1125 frame_sz = ice_rx_frame_truesize(rx_ring, 0);
1126#endif
1127 xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
1128
1129 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1130 if (xdp_prog)
1131 xdp_ring = rx_ring->xdp_ring;
1132
1133 /* start the loop to process Rx packets bounded by 'budget' */
1134 while (likely(total_rx_pkts < (unsigned int)budget)) {
1135 union ice_32b_rx_flex_desc *rx_desc;
1136 struct ice_rx_buf *rx_buf;
1137 unsigned char *hard_start;
1138 unsigned int size;
1139 u16 stat_err_bits;
1140 int rx_buf_pgcnt;
1141 u16 vlan_tag = 0;
1142 u16 rx_ptype;
1143
1144 /* get the Rx desc from Rx ring based on 'next_to_clean' */
1145 rx_desc = ICE_RX_DESC(rx_ring, rx_ring->next_to_clean);
1146
1147 /* status_error_len will always be zero for unused descriptors
1148 * because it's cleared in cleanup, and overlaps with hdr_addr
1149 * which is always zero because packet split isn't used, if the
1150 * hardware wrote DD then it will be non-zero
1151 */
1152 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);
1153 if (!ice_test_staterr(rx_desc->wb.status_error0, stat_err_bits))
1154 break;
1155
1156 /* This memory barrier is needed to keep us from reading
1157 * any other fields out of the rx_desc until we know the
1158 * DD bit is set.
1159 */
1160 dma_rmb();
1161
1162 ice_trace(clean_rx_irq, rx_ring, rx_desc);
1163 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID || !rx_ring->netdev) {
1164 struct ice_vsi *ctrl_vsi = rx_ring->vsi;
1165
1166 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID &&
1167 ctrl_vsi->vf)
1168 ice_vc_fdir_irq_handler(ctrl_vsi, rx_desc);
1169 ice_put_rx_buf(rx_ring, NULL, 0);
1170 cleaned_count++;
1171 continue;
1172 }
1173
1174 size = le16_to_cpu(rx_desc->wb.pkt_len) &
1175 ICE_RX_FLX_DESC_PKT_LEN_M;
1176
1177 /* retrieve a buffer from the ring */
1178 rx_buf = ice_get_rx_buf(rx_ring, size, &rx_buf_pgcnt);
1179
1180 if (!size) {
1181 xdp.data = NULL;
1182 xdp.data_end = NULL;
1183 xdp.data_hard_start = NULL;
1184 xdp.data_meta = NULL;
1185 goto construct_skb;
1186 }
1187
1188 hard_start = page_address(rx_buf->page) + rx_buf->page_offset -
1189 offset;
1190 xdp_prepare_buff(&xdp, hard_start, offset, size, true);
1191#if (PAGE_SIZE > 4096)
1192 /* At larger PAGE_SIZE, frame_sz depend on len size */
1193 xdp.frame_sz = ice_rx_frame_truesize(rx_ring, size);
1194#endif
1195
1196 if (!xdp_prog)
1197 goto construct_skb;
1198
1199 xdp_res = ice_run_xdp(rx_ring, &xdp, xdp_prog, xdp_ring);
1200 if (!xdp_res)
1201 goto construct_skb;
1202 if (xdp_res & (ICE_XDP_TX | ICE_XDP_REDIR)) {
1203 xdp_xmit |= xdp_res;
1204 ice_rx_buf_adjust_pg_offset(rx_buf, xdp.frame_sz);
1205 } else {
1206 rx_buf->pagecnt_bias++;
1207 }
1208 total_rx_bytes += size;
1209 total_rx_pkts++;
1210
1211 cleaned_count++;
1212 ice_put_rx_buf(rx_ring, rx_buf, rx_buf_pgcnt);
1213 continue;
1214construct_skb:
1215 if (skb) {
1216 ice_add_rx_frag(rx_ring, rx_buf, skb, size);
1217 } else if (likely(xdp.data)) {
1218 if (ice_ring_uses_build_skb(rx_ring))
1219 skb = ice_build_skb(rx_ring, rx_buf, &xdp);
1220 else
1221 skb = ice_construct_skb(rx_ring, rx_buf, &xdp);
1222 }
1223 /* exit if we failed to retrieve a buffer */
1224 if (!skb) {
1225 rx_ring->ring_stats->rx_stats.alloc_buf_failed++;
1226 if (rx_buf)
1227 rx_buf->pagecnt_bias++;
1228 break;
1229 }
1230
1231 ice_put_rx_buf(rx_ring, rx_buf, rx_buf_pgcnt);
1232 cleaned_count++;
1233
1234 /* skip if it is NOP desc */
1235 if (ice_is_non_eop(rx_ring, rx_desc))
1236 continue;
1237
1238 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
1239 if (unlikely(ice_test_staterr(rx_desc->wb.status_error0,
1240 stat_err_bits))) {
1241 dev_kfree_skb_any(skb);
1242 continue;
1243 }
1244
1245 vlan_tag = ice_get_vlan_tag_from_rx_desc(rx_desc);
1246
1247 /* pad the skb if needed, to make a valid ethernet frame */
1248 if (eth_skb_pad(skb)) {
1249 skb = NULL;
1250 continue;
1251 }
1252
1253 /* probably a little skewed due to removing CRC */
1254 total_rx_bytes += skb->len;
1255
1256 /* populate checksum, VLAN, and protocol */
1257 rx_ptype = le16_to_cpu(rx_desc->wb.ptype_flex_flags0) &
1258 ICE_RX_FLEX_DESC_PTYPE_M;
1259
1260 ice_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);
1261
1262 ice_trace(clean_rx_irq_indicate, rx_ring, rx_desc, skb);
1263 /* send completed skb up the stack */
1264 ice_receive_skb(rx_ring, skb, vlan_tag);
1265 skb = NULL;
1266
1267 /* update budget accounting */
1268 total_rx_pkts++;
1269 }
1270
1271 /* return up to cleaned_count buffers to hardware */
1272 failure = ice_alloc_rx_bufs(rx_ring, cleaned_count);
1273
1274 if (xdp_prog)
1275 ice_finalize_xdp_rx(xdp_ring, xdp_xmit);
1276 rx_ring->skb = skb;
1277
1278 if (rx_ring->ring_stats)
1279 ice_update_rx_ring_stats(rx_ring, total_rx_pkts,
1280 total_rx_bytes);
1281
1282 /* guarantee a trip back through this routine if there was a failure */
1283 return failure ? budget : (int)total_rx_pkts;
1284}
1285
1286static void __ice_update_sample(struct ice_q_vector *q_vector,
1287 struct ice_ring_container *rc,
1288 struct dim_sample *sample,
1289 bool is_tx)
1290{
1291 u64 packets = 0, bytes = 0;
1292
1293 if (is_tx) {
1294 struct ice_tx_ring *tx_ring;
1295
1296 ice_for_each_tx_ring(tx_ring, *rc) {
1297 struct ice_ring_stats *ring_stats;
1298
1299 ring_stats = tx_ring->ring_stats;
1300 if (!ring_stats)
1301 continue;
1302 packets += ring_stats->stats.pkts;
1303 bytes += ring_stats->stats.bytes;
1304 }
1305 } else {
1306 struct ice_rx_ring *rx_ring;
1307
1308 ice_for_each_rx_ring(rx_ring, *rc) {
1309 struct ice_ring_stats *ring_stats;
1310
1311 ring_stats = rx_ring->ring_stats;
1312 if (!ring_stats)
1313 continue;
1314 packets += ring_stats->stats.pkts;
1315 bytes += ring_stats->stats.bytes;
1316 }
1317 }
1318
1319 dim_update_sample(q_vector->total_events, packets, bytes, sample);
1320 sample->comp_ctr = 0;
1321
1322 /* if dim settings get stale, like when not updated for 1
1323 * second or longer, force it to start again. This addresses the
1324 * frequent case of an idle queue being switched to by the
1325 * scheduler. The 1,000 here means 1,000 milliseconds.
1326 */
1327 if (ktime_ms_delta(sample->time, rc->dim.start_sample.time) >= 1000)
1328 rc->dim.state = DIM_START_MEASURE;
1329}
1330
1331/**
1332 * ice_net_dim - Update net DIM algorithm
1333 * @q_vector: the vector associated with the interrupt
1334 *
1335 * Create a DIM sample and notify net_dim() so that it can possibly decide
1336 * a new ITR value based on incoming packets, bytes, and interrupts.
1337 *
1338 * This function is a no-op if the ring is not configured to dynamic ITR.
1339 */
1340static void ice_net_dim(struct ice_q_vector *q_vector)
1341{
1342 struct ice_ring_container *tx = &q_vector->tx;
1343 struct ice_ring_container *rx = &q_vector->rx;
1344
1345 if (ITR_IS_DYNAMIC(tx)) {
1346 struct dim_sample dim_sample;
1347
1348 __ice_update_sample(q_vector, tx, &dim_sample, true);
1349 net_dim(&tx->dim, dim_sample);
1350 }
1351
1352 if (ITR_IS_DYNAMIC(rx)) {
1353 struct dim_sample dim_sample;
1354
1355 __ice_update_sample(q_vector, rx, &dim_sample, false);
1356 net_dim(&rx->dim, dim_sample);
1357 }
1358}
1359
1360/**
1361 * ice_buildreg_itr - build value for writing to the GLINT_DYN_CTL register
1362 * @itr_idx: interrupt throttling index
1363 * @itr: interrupt throttling value in usecs
1364 */
1365static u32 ice_buildreg_itr(u16 itr_idx, u16 itr)
1366{
1367 /* The ITR value is reported in microseconds, and the register value is
1368 * recorded in 2 microsecond units. For this reason we only need to
1369 * shift by the GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S to apply this
1370 * granularity as a shift instead of division. The mask makes sure the
1371 * ITR value is never odd so we don't accidentally write into the field
1372 * prior to the ITR field.
1373 */
1374 itr &= ICE_ITR_MASK;
1375
1376 return GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
1377 (itr_idx << GLINT_DYN_CTL_ITR_INDX_S) |
1378 (itr << (GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S));
1379}
1380
1381/**
1382 * ice_enable_interrupt - re-enable MSI-X interrupt
1383 * @q_vector: the vector associated with the interrupt to enable
1384 *
1385 * If the VSI is down, the interrupt will not be re-enabled. Also,
1386 * when enabling the interrupt always reset the wb_on_itr to false
1387 * and trigger a software interrupt to clean out internal state.
1388 */
1389static void ice_enable_interrupt(struct ice_q_vector *q_vector)
1390{
1391 struct ice_vsi *vsi = q_vector->vsi;
1392 bool wb_en = q_vector->wb_on_itr;
1393 u32 itr_val;
1394
1395 if (test_bit(ICE_DOWN, vsi->state))
1396 return;
1397
1398 /* trigger an ITR delayed software interrupt when exiting busy poll, to
1399 * make sure to catch any pending cleanups that might have been missed
1400 * due to interrupt state transition. If busy poll or poll isn't
1401 * enabled, then don't update ITR, and just enable the interrupt.
1402 */
1403 if (!wb_en) {
1404 itr_val = ice_buildreg_itr(ICE_ITR_NONE, 0);
1405 } else {
1406 q_vector->wb_on_itr = false;
1407
1408 /* do two things here with a single write. Set up the third ITR
1409 * index to be used for software interrupt moderation, and then
1410 * trigger a software interrupt with a rate limit of 20K on
1411 * software interrupts, this will help avoid high interrupt
1412 * loads due to frequently polling and exiting polling.
1413 */
1414 itr_val = ice_buildreg_itr(ICE_IDX_ITR2, ICE_ITR_20K);
1415 itr_val |= GLINT_DYN_CTL_SWINT_TRIG_M |
1416 ICE_IDX_ITR2 << GLINT_DYN_CTL_SW_ITR_INDX_S |
1417 GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;
1418 }
1419 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);
1420}
1421
1422/**
1423 * ice_set_wb_on_itr - set WB_ON_ITR for this q_vector
1424 * @q_vector: q_vector to set WB_ON_ITR on
1425 *
1426 * We need to tell hardware to write-back completed descriptors even when
1427 * interrupts are disabled. Descriptors will be written back on cache line
1428 * boundaries without WB_ON_ITR enabled, but if we don't enable WB_ON_ITR
1429 * descriptors may not be written back if they don't fill a cache line until
1430 * the next interrupt.
1431 *
1432 * This sets the write-back frequency to whatever was set previously for the
1433 * ITR indices. Also, set the INTENA_MSK bit to make sure hardware knows we
1434 * aren't meddling with the INTENA_M bit.
1435 */
1436static void ice_set_wb_on_itr(struct ice_q_vector *q_vector)
1437{
1438 struct ice_vsi *vsi = q_vector->vsi;
1439
1440 /* already in wb_on_itr mode no need to change it */
1441 if (q_vector->wb_on_itr)
1442 return;
1443
1444 /* use previously set ITR values for all of the ITR indices by
1445 * specifying ICE_ITR_NONE, which will vary in adaptive (AIM) mode and
1446 * be static in non-adaptive mode (user configured)
1447 */
1448 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),
1449 ((ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S) &
1450 GLINT_DYN_CTL_ITR_INDX_M) | GLINT_DYN_CTL_INTENA_MSK_M |
1451 GLINT_DYN_CTL_WB_ON_ITR_M);
1452
1453 q_vector->wb_on_itr = true;
1454}
1455
1456/**
1457 * ice_napi_poll - NAPI polling Rx/Tx cleanup routine
1458 * @napi: napi struct with our devices info in it
1459 * @budget: amount of work driver is allowed to do this pass, in packets
1460 *
1461 * This function will clean all queues associated with a q_vector.
1462 *
1463 * Returns the amount of work done
1464 */
1465int ice_napi_poll(struct napi_struct *napi, int budget)
1466{
1467 struct ice_q_vector *q_vector =
1468 container_of(napi, struct ice_q_vector, napi);
1469 struct ice_tx_ring *tx_ring;
1470 struct ice_rx_ring *rx_ring;
1471 bool clean_complete = true;
1472 int budget_per_ring;
1473 int work_done = 0;
1474
1475 /* Since the actual Tx work is minimal, we can give the Tx a larger
1476 * budget and be more aggressive about cleaning up the Tx descriptors.
1477 */
1478 ice_for_each_tx_ring(tx_ring, q_vector->tx) {
1479 bool wd;
1480
1481 if (tx_ring->xsk_pool)
1482 wd = ice_xmit_zc(tx_ring);
1483 else if (ice_ring_is_xdp(tx_ring))
1484 wd = true;
1485 else
1486 wd = ice_clean_tx_irq(tx_ring, budget);
1487
1488 if (!wd)
1489 clean_complete = false;
1490 }
1491
1492 /* Handle case where we are called by netpoll with a budget of 0 */
1493 if (unlikely(budget <= 0))
1494 return budget;
1495
1496 /* normally we have 1 Rx ring per q_vector */
1497 if (unlikely(q_vector->num_ring_rx > 1))
1498 /* We attempt to distribute budget to each Rx queue fairly, but
1499 * don't allow the budget to go below 1 because that would exit
1500 * polling early.
1501 */
1502 budget_per_ring = max_t(int, budget / q_vector->num_ring_rx, 1);
1503 else
1504 /* Max of 1 Rx ring in this q_vector so give it the budget */
1505 budget_per_ring = budget;
1506
1507 ice_for_each_rx_ring(rx_ring, q_vector->rx) {
1508 int cleaned;
1509
1510 /* A dedicated path for zero-copy allows making a single
1511 * comparison in the irq context instead of many inside the
1512 * ice_clean_rx_irq function and makes the codebase cleaner.
1513 */
1514 cleaned = rx_ring->xsk_pool ?
1515 ice_clean_rx_irq_zc(rx_ring, budget_per_ring) :
1516 ice_clean_rx_irq(rx_ring, budget_per_ring);
1517 work_done += cleaned;
1518 /* if we clean as many as budgeted, we must not be done */
1519 if (cleaned >= budget_per_ring)
1520 clean_complete = false;
1521 }
1522
1523 /* If work not completed, return budget and polling will return */
1524 if (!clean_complete) {
1525 /* Set the writeback on ITR so partial completions of
1526 * cache-lines will still continue even if we're polling.
1527 */
1528 ice_set_wb_on_itr(q_vector);
1529 return budget;
1530 }
1531
1532 /* Exit the polling mode, but don't re-enable interrupts if stack might
1533 * poll us due to busy-polling
1534 */
1535 if (napi_complete_done(napi, work_done)) {
1536 ice_net_dim(q_vector);
1537 ice_enable_interrupt(q_vector);
1538 } else {
1539 ice_set_wb_on_itr(q_vector);
1540 }
1541
1542 return min_t(int, work_done, budget - 1);
1543}
1544
1545/**
1546 * __ice_maybe_stop_tx - 2nd level check for Tx stop conditions
1547 * @tx_ring: the ring to be checked
1548 * @size: the size buffer we want to assure is available
1549 *
1550 * Returns -EBUSY if a stop is needed, else 0
1551 */
1552static int __ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1553{
1554 netif_tx_stop_queue(txring_txq(tx_ring));
1555 /* Memory barrier before checking head and tail */
1556 smp_mb();
1557
1558 /* Check again in a case another CPU has just made room available. */
1559 if (likely(ICE_DESC_UNUSED(tx_ring) < size))
1560 return -EBUSY;
1561
1562 /* A reprieve! - use start_queue because it doesn't call schedule */
1563 netif_tx_start_queue(txring_txq(tx_ring));
1564 ++tx_ring->ring_stats->tx_stats.restart_q;
1565 return 0;
1566}
1567
1568/**
1569 * ice_maybe_stop_tx - 1st level check for Tx stop conditions
1570 * @tx_ring: the ring to be checked
1571 * @size: the size buffer we want to assure is available
1572 *
1573 * Returns 0 if stop is not needed
1574 */
1575static int ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1576{
1577 if (likely(ICE_DESC_UNUSED(tx_ring) >= size))
1578 return 0;
1579
1580 return __ice_maybe_stop_tx(tx_ring, size);
1581}
1582
1583/**
1584 * ice_tx_map - Build the Tx descriptor
1585 * @tx_ring: ring to send buffer on
1586 * @first: first buffer info buffer to use
1587 * @off: pointer to struct that holds offload parameters
1588 *
1589 * This function loops over the skb data pointed to by *first
1590 * and gets a physical address for each memory location and programs
1591 * it and the length into the transmit descriptor.
1592 */
1593static void
1594ice_tx_map(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first,
1595 struct ice_tx_offload_params *off)
1596{
1597 u64 td_offset, td_tag, td_cmd;
1598 u16 i = tx_ring->next_to_use;
1599 unsigned int data_len, size;
1600 struct ice_tx_desc *tx_desc;
1601 struct ice_tx_buf *tx_buf;
1602 struct sk_buff *skb;
1603 skb_frag_t *frag;
1604 dma_addr_t dma;
1605 bool kick;
1606
1607 td_tag = off->td_l2tag1;
1608 td_cmd = off->td_cmd;
1609 td_offset = off->td_offset;
1610 skb = first->skb;
1611
1612 data_len = skb->data_len;
1613 size = skb_headlen(skb);
1614
1615 tx_desc = ICE_TX_DESC(tx_ring, i);
1616
1617 if (first->tx_flags & ICE_TX_FLAGS_HW_VLAN) {
1618 td_cmd |= (u64)ICE_TX_DESC_CMD_IL2TAG1;
1619 td_tag = (first->tx_flags & ICE_TX_FLAGS_VLAN_M) >>
1620 ICE_TX_FLAGS_VLAN_S;
1621 }
1622
1623 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
1624
1625 tx_buf = first;
1626
1627 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
1628 unsigned int max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1629
1630 if (dma_mapping_error(tx_ring->dev, dma))
1631 goto dma_error;
1632
1633 /* record length, and DMA address */
1634 dma_unmap_len_set(tx_buf, len, size);
1635 dma_unmap_addr_set(tx_buf, dma, dma);
1636
1637 /* align size to end of page */
1638 max_data += -dma & (ICE_MAX_READ_REQ_SIZE - 1);
1639 tx_desc->buf_addr = cpu_to_le64(dma);
1640
1641 /* account for data chunks larger than the hardware
1642 * can handle
1643 */
1644 while (unlikely(size > ICE_MAX_DATA_PER_TXD)) {
1645 tx_desc->cmd_type_offset_bsz =
1646 ice_build_ctob(td_cmd, td_offset, max_data,
1647 td_tag);
1648
1649 tx_desc++;
1650 i++;
1651
1652 if (i == tx_ring->count) {
1653 tx_desc = ICE_TX_DESC(tx_ring, 0);
1654 i = 0;
1655 }
1656
1657 dma += max_data;
1658 size -= max_data;
1659
1660 max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1661 tx_desc->buf_addr = cpu_to_le64(dma);
1662 }
1663
1664 if (likely(!data_len))
1665 break;
1666
1667 tx_desc->cmd_type_offset_bsz = ice_build_ctob(td_cmd, td_offset,
1668 size, td_tag);
1669
1670 tx_desc++;
1671 i++;
1672
1673 if (i == tx_ring->count) {
1674 tx_desc = ICE_TX_DESC(tx_ring, 0);
1675 i = 0;
1676 }
1677
1678 size = skb_frag_size(frag);
1679 data_len -= size;
1680
1681 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1682 DMA_TO_DEVICE);
1683
1684 tx_buf = &tx_ring->tx_buf[i];
1685 }
1686
1687 /* record SW timestamp if HW timestamp is not available */
1688 skb_tx_timestamp(first->skb);
1689
1690 i++;
1691 if (i == tx_ring->count)
1692 i = 0;
1693
1694 /* write last descriptor with RS and EOP bits */
1695 td_cmd |= (u64)ICE_TXD_LAST_DESC_CMD;
1696 tx_desc->cmd_type_offset_bsz =
1697 ice_build_ctob(td_cmd, td_offset, size, td_tag);
1698
1699 /* Force memory writes to complete before letting h/w know there
1700 * are new descriptors to fetch.
1701 *
1702 * We also use this memory barrier to make certain all of the
1703 * status bits have been updated before next_to_watch is written.
1704 */
1705 wmb();
1706
1707 /* set next_to_watch value indicating a packet is present */
1708 first->next_to_watch = tx_desc;
1709
1710 tx_ring->next_to_use = i;
1711
1712 ice_maybe_stop_tx(tx_ring, DESC_NEEDED);
1713
1714 /* notify HW of packet */
1715 kick = __netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount,
1716 netdev_xmit_more());
1717 if (kick)
1718 /* notify HW of packet */
1719 writel(i, tx_ring->tail);
1720
1721 return;
1722
1723dma_error:
1724 /* clear DMA mappings for failed tx_buf map */
1725 for (;;) {
1726 tx_buf = &tx_ring->tx_buf[i];
1727 ice_unmap_and_free_tx_buf(tx_ring, tx_buf);
1728 if (tx_buf == first)
1729 break;
1730 if (i == 0)
1731 i = tx_ring->count;
1732 i--;
1733 }
1734
1735 tx_ring->next_to_use = i;
1736}
1737
1738/**
1739 * ice_tx_csum - Enable Tx checksum offloads
1740 * @first: pointer to the first descriptor
1741 * @off: pointer to struct that holds offload parameters
1742 *
1743 * Returns 0 or error (negative) if checksum offload can't happen, 1 otherwise.
1744 */
1745static
1746int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1747{
1748 u32 l4_len = 0, l3_len = 0, l2_len = 0;
1749 struct sk_buff *skb = first->skb;
1750 union {
1751 struct iphdr *v4;
1752 struct ipv6hdr *v6;
1753 unsigned char *hdr;
1754 } ip;
1755 union {
1756 struct tcphdr *tcp;
1757 unsigned char *hdr;
1758 } l4;
1759 __be16 frag_off, protocol;
1760 unsigned char *exthdr;
1761 u32 offset, cmd = 0;
1762 u8 l4_proto = 0;
1763
1764 if (skb->ip_summed != CHECKSUM_PARTIAL)
1765 return 0;
1766
1767 protocol = vlan_get_protocol(skb);
1768
1769 if (eth_p_mpls(protocol)) {
1770 ip.hdr = skb_inner_network_header(skb);
1771 l4.hdr = skb_checksum_start(skb);
1772 } else {
1773 ip.hdr = skb_network_header(skb);
1774 l4.hdr = skb_transport_header(skb);
1775 }
1776
1777 /* compute outer L2 header size */
1778 l2_len = ip.hdr - skb->data;
1779 offset = (l2_len / 2) << ICE_TX_DESC_LEN_MACLEN_S;
1780
1781 /* set the tx_flags to indicate the IP protocol type. this is
1782 * required so that checksum header computation below is accurate.
1783 */
1784 if (ip.v4->version == 4)
1785 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1786 else if (ip.v6->version == 6)
1787 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1788
1789 if (skb->encapsulation) {
1790 bool gso_ena = false;
1791 u32 tunnel = 0;
1792
1793 /* define outer network header type */
1794 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1795 tunnel |= (first->tx_flags & ICE_TX_FLAGS_TSO) ?
1796 ICE_TX_CTX_EIPT_IPV4 :
1797 ICE_TX_CTX_EIPT_IPV4_NO_CSUM;
1798 l4_proto = ip.v4->protocol;
1799 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1800 int ret;
1801
1802 tunnel |= ICE_TX_CTX_EIPT_IPV6;
1803 exthdr = ip.hdr + sizeof(*ip.v6);
1804 l4_proto = ip.v6->nexthdr;
1805 ret = ipv6_skip_exthdr(skb, exthdr - skb->data,
1806 &l4_proto, &frag_off);
1807 if (ret < 0)
1808 return -1;
1809 }
1810
1811 /* define outer transport */
1812 switch (l4_proto) {
1813 case IPPROTO_UDP:
1814 tunnel |= ICE_TXD_CTX_UDP_TUNNELING;
1815 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1816 break;
1817 case IPPROTO_GRE:
1818 tunnel |= ICE_TXD_CTX_GRE_TUNNELING;
1819 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1820 break;
1821 case IPPROTO_IPIP:
1822 case IPPROTO_IPV6:
1823 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1824 l4.hdr = skb_inner_network_header(skb);
1825 break;
1826 default:
1827 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1828 return -1;
1829
1830 skb_checksum_help(skb);
1831 return 0;
1832 }
1833
1834 /* compute outer L3 header size */
1835 tunnel |= ((l4.hdr - ip.hdr) / 4) <<
1836 ICE_TXD_CTX_QW0_EIPLEN_S;
1837
1838 /* switch IP header pointer from outer to inner header */
1839 ip.hdr = skb_inner_network_header(skb);
1840
1841 /* compute tunnel header size */
1842 tunnel |= ((ip.hdr - l4.hdr) / 2) <<
1843 ICE_TXD_CTX_QW0_NATLEN_S;
1844
1845 gso_ena = skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL;
1846 /* indicate if we need to offload outer UDP header */
1847 if ((first->tx_flags & ICE_TX_FLAGS_TSO) && !gso_ena &&
1848 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM))
1849 tunnel |= ICE_TXD_CTX_QW0_L4T_CS_M;
1850
1851 /* record tunnel offload values */
1852 off->cd_tunnel_params |= tunnel;
1853
1854 /* set DTYP=1 to indicate that it's an Tx context descriptor
1855 * in IPsec tunnel mode with Tx offloads in Quad word 1
1856 */
1857 off->cd_qw1 |= (u64)ICE_TX_DESC_DTYPE_CTX;
1858
1859 /* switch L4 header pointer from outer to inner */
1860 l4.hdr = skb_inner_transport_header(skb);
1861 l4_proto = 0;
1862
1863 /* reset type as we transition from outer to inner headers */
1864 first->tx_flags &= ~(ICE_TX_FLAGS_IPV4 | ICE_TX_FLAGS_IPV6);
1865 if (ip.v4->version == 4)
1866 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1867 if (ip.v6->version == 6)
1868 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1869 }
1870
1871 /* Enable IP checksum offloads */
1872 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1873 l4_proto = ip.v4->protocol;
1874 /* the stack computes the IP header already, the only time we
1875 * need the hardware to recompute it is in the case of TSO.
1876 */
1877 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1878 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
1879 else
1880 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
1881
1882 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1883 cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
1884 exthdr = ip.hdr + sizeof(*ip.v6);
1885 l4_proto = ip.v6->nexthdr;
1886 if (l4.hdr != exthdr)
1887 ipv6_skip_exthdr(skb, exthdr - skb->data, &l4_proto,
1888 &frag_off);
1889 } else {
1890 return -1;
1891 }
1892
1893 /* compute inner L3 header size */
1894 l3_len = l4.hdr - ip.hdr;
1895 offset |= (l3_len / 4) << ICE_TX_DESC_LEN_IPLEN_S;
1896
1897 /* Enable L4 checksum offloads */
1898 switch (l4_proto) {
1899 case IPPROTO_TCP:
1900 /* enable checksum offloads */
1901 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_TCP;
1902 l4_len = l4.tcp->doff;
1903 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1904 break;
1905 case IPPROTO_UDP:
1906 /* enable UDP checksum offload */
1907 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_UDP;
1908 l4_len = (sizeof(struct udphdr) >> 2);
1909 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1910 break;
1911 case IPPROTO_SCTP:
1912 /* enable SCTP checksum offload */
1913 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_SCTP;
1914 l4_len = sizeof(struct sctphdr) >> 2;
1915 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1916 break;
1917
1918 default:
1919 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1920 return -1;
1921 skb_checksum_help(skb);
1922 return 0;
1923 }
1924
1925 off->td_cmd |= cmd;
1926 off->td_offset |= offset;
1927 return 1;
1928}
1929
1930/**
1931 * ice_tx_prepare_vlan_flags - prepare generic Tx VLAN tagging flags for HW
1932 * @tx_ring: ring to send buffer on
1933 * @first: pointer to struct ice_tx_buf
1934 *
1935 * Checks the skb and set up correspondingly several generic transmit flags
1936 * related to VLAN tagging for the HW, such as VLAN, DCB, etc.
1937 */
1938static void
1939ice_tx_prepare_vlan_flags(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first)
1940{
1941 struct sk_buff *skb = first->skb;
1942
1943 /* nothing left to do, software offloaded VLAN */
1944 if (!skb_vlan_tag_present(skb) && eth_type_vlan(skb->protocol))
1945 return;
1946
1947 /* the VLAN ethertype/tpid is determined by VSI configuration and netdev
1948 * feature flags, which the driver only allows either 802.1Q or 802.1ad
1949 * VLAN offloads exclusively so we only care about the VLAN ID here
1950 */
1951 if (skb_vlan_tag_present(skb)) {
1952 first->tx_flags |= skb_vlan_tag_get(skb) << ICE_TX_FLAGS_VLAN_S;
1953 if (tx_ring->flags & ICE_TX_FLAGS_RING_VLAN_L2TAG2)
1954 first->tx_flags |= ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN;
1955 else
1956 first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
1957 }
1958
1959 ice_tx_prepare_vlan_flags_dcb(tx_ring, first);
1960}
1961
1962/**
1963 * ice_tso - computes mss and TSO length to prepare for TSO
1964 * @first: pointer to struct ice_tx_buf
1965 * @off: pointer to struct that holds offload parameters
1966 *
1967 * Returns 0 or error (negative) if TSO can't happen, 1 otherwise.
1968 */
1969static
1970int ice_tso(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1971{
1972 struct sk_buff *skb = first->skb;
1973 union {
1974 struct iphdr *v4;
1975 struct ipv6hdr *v6;
1976 unsigned char *hdr;
1977 } ip;
1978 union {
1979 struct tcphdr *tcp;
1980 struct udphdr *udp;
1981 unsigned char *hdr;
1982 } l4;
1983 u64 cd_mss, cd_tso_len;
1984 __be16 protocol;
1985 u32 paylen;
1986 u8 l4_start;
1987 int err;
1988
1989 if (skb->ip_summed != CHECKSUM_PARTIAL)
1990 return 0;
1991
1992 if (!skb_is_gso(skb))
1993 return 0;
1994
1995 err = skb_cow_head(skb, 0);
1996 if (err < 0)
1997 return err;
1998
1999 /* cppcheck-suppress unreadVariable */
2000 protocol = vlan_get_protocol(skb);
2001
2002 if (eth_p_mpls(protocol))
2003 ip.hdr = skb_inner_network_header(skb);
2004 else
2005 ip.hdr = skb_network_header(skb);
2006 l4.hdr = skb_checksum_start(skb);
2007
2008 /* initialize outer IP header fields */
2009 if (ip.v4->version == 4) {
2010 ip.v4->tot_len = 0;
2011 ip.v4->check = 0;
2012 } else {
2013 ip.v6->payload_len = 0;
2014 }
2015
2016 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
2017 SKB_GSO_GRE_CSUM |
2018 SKB_GSO_IPXIP4 |
2019 SKB_GSO_IPXIP6 |
2020 SKB_GSO_UDP_TUNNEL |
2021 SKB_GSO_UDP_TUNNEL_CSUM)) {
2022 if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) &&
2023 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM)) {
2024 l4.udp->len = 0;
2025
2026 /* determine offset of outer transport header */
2027 l4_start = (u8)(l4.hdr - skb->data);
2028
2029 /* remove payload length from outer checksum */
2030 paylen = skb->len - l4_start;
2031 csum_replace_by_diff(&l4.udp->check,
2032 (__force __wsum)htonl(paylen));
2033 }
2034
2035 /* reset pointers to inner headers */
2036
2037 /* cppcheck-suppress unreadVariable */
2038 ip.hdr = skb_inner_network_header(skb);
2039 l4.hdr = skb_inner_transport_header(skb);
2040
2041 /* initialize inner IP header fields */
2042 if (ip.v4->version == 4) {
2043 ip.v4->tot_len = 0;
2044 ip.v4->check = 0;
2045 } else {
2046 ip.v6->payload_len = 0;
2047 }
2048 }
2049
2050 /* determine offset of transport header */
2051 l4_start = (u8)(l4.hdr - skb->data);
2052
2053 /* remove payload length from checksum */
2054 paylen = skb->len - l4_start;
2055
2056 if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) {
2057 csum_replace_by_diff(&l4.udp->check,
2058 (__force __wsum)htonl(paylen));
2059 /* compute length of UDP segmentation header */
2060 off->header_len = (u8)sizeof(l4.udp) + l4_start;
2061 } else {
2062 csum_replace_by_diff(&l4.tcp->check,
2063 (__force __wsum)htonl(paylen));
2064 /* compute length of TCP segmentation header */
2065 off->header_len = (u8)((l4.tcp->doff * 4) + l4_start);
2066 }
2067
2068 /* update gso_segs and bytecount */
2069 first->gso_segs = skb_shinfo(skb)->gso_segs;
2070 first->bytecount += (first->gso_segs - 1) * off->header_len;
2071
2072 cd_tso_len = skb->len - off->header_len;
2073 cd_mss = skb_shinfo(skb)->gso_size;
2074
2075 /* record cdesc_qw1 with TSO parameters */
2076 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2077 (ICE_TX_CTX_DESC_TSO << ICE_TXD_CTX_QW1_CMD_S) |
2078 (cd_tso_len << ICE_TXD_CTX_QW1_TSO_LEN_S) |
2079 (cd_mss << ICE_TXD_CTX_QW1_MSS_S));
2080 first->tx_flags |= ICE_TX_FLAGS_TSO;
2081 return 1;
2082}
2083
2084/**
2085 * ice_txd_use_count - estimate the number of descriptors needed for Tx
2086 * @size: transmit request size in bytes
2087 *
2088 * Due to hardware alignment restrictions (4K alignment), we need to
2089 * assume that we can have no more than 12K of data per descriptor, even
2090 * though each descriptor can take up to 16K - 1 bytes of aligned memory.
2091 * Thus, we need to divide by 12K. But division is slow! Instead,
2092 * we decompose the operation into shifts and one relatively cheap
2093 * multiply operation.
2094 *
2095 * To divide by 12K, we first divide by 4K, then divide by 3:
2096 * To divide by 4K, shift right by 12 bits
2097 * To divide by 3, multiply by 85, then divide by 256
2098 * (Divide by 256 is done by shifting right by 8 bits)
2099 * Finally, we add one to round up. Because 256 isn't an exact multiple of
2100 * 3, we'll underestimate near each multiple of 12K. This is actually more
2101 * accurate as we have 4K - 1 of wiggle room that we can fit into the last
2102 * segment. For our purposes this is accurate out to 1M which is orders of
2103 * magnitude greater than our largest possible GSO size.
2104 *
2105 * This would then be implemented as:
2106 * return (((size >> 12) * 85) >> 8) + ICE_DESCS_FOR_SKB_DATA_PTR;
2107 *
2108 * Since multiplication and division are commutative, we can reorder
2109 * operations into:
2110 * return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2111 */
2112static unsigned int ice_txd_use_count(unsigned int size)
2113{
2114 return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2115}
2116
2117/**
2118 * ice_xmit_desc_count - calculate number of Tx descriptors needed
2119 * @skb: send buffer
2120 *
2121 * Returns number of data descriptors needed for this skb.
2122 */
2123static unsigned int ice_xmit_desc_count(struct sk_buff *skb)
2124{
2125 const skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
2126 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2127 unsigned int count = 0, size = skb_headlen(skb);
2128
2129 for (;;) {
2130 count += ice_txd_use_count(size);
2131
2132 if (!nr_frags--)
2133 break;
2134
2135 size = skb_frag_size(frag++);
2136 }
2137
2138 return count;
2139}
2140
2141/**
2142 * __ice_chk_linearize - Check if there are more than 8 buffers per packet
2143 * @skb: send buffer
2144 *
2145 * Note: This HW can't DMA more than 8 buffers to build a packet on the wire
2146 * and so we need to figure out the cases where we need to linearize the skb.
2147 *
2148 * For TSO we need to count the TSO header and segment payload separately.
2149 * As such we need to check cases where we have 7 fragments or more as we
2150 * can potentially require 9 DMA transactions, 1 for the TSO header, 1 for
2151 * the segment payload in the first descriptor, and another 7 for the
2152 * fragments.
2153 */
2154static bool __ice_chk_linearize(struct sk_buff *skb)
2155{
2156 const skb_frag_t *frag, *stale;
2157 int nr_frags, sum;
2158
2159 /* no need to check if number of frags is less than 7 */
2160 nr_frags = skb_shinfo(skb)->nr_frags;
2161 if (nr_frags < (ICE_MAX_BUF_TXD - 1))
2162 return false;
2163
2164 /* We need to walk through the list and validate that each group
2165 * of 6 fragments totals at least gso_size.
2166 */
2167 nr_frags -= ICE_MAX_BUF_TXD - 2;
2168 frag = &skb_shinfo(skb)->frags[0];
2169
2170 /* Initialize size to the negative value of gso_size minus 1. We
2171 * use this as the worst case scenario in which the frag ahead
2172 * of us only provides one byte which is why we are limited to 6
2173 * descriptors for a single transmit as the header and previous
2174 * fragment are already consuming 2 descriptors.
2175 */
2176 sum = 1 - skb_shinfo(skb)->gso_size;
2177
2178 /* Add size of frags 0 through 4 to create our initial sum */
2179 sum += skb_frag_size(frag++);
2180 sum += skb_frag_size(frag++);
2181 sum += skb_frag_size(frag++);
2182 sum += skb_frag_size(frag++);
2183 sum += skb_frag_size(frag++);
2184
2185 /* Walk through fragments adding latest fragment, testing it, and
2186 * then removing stale fragments from the sum.
2187 */
2188 for (stale = &skb_shinfo(skb)->frags[0];; stale++) {
2189 int stale_size = skb_frag_size(stale);
2190
2191 sum += skb_frag_size(frag++);
2192
2193 /* The stale fragment may present us with a smaller
2194 * descriptor than the actual fragment size. To account
2195 * for that we need to remove all the data on the front and
2196 * figure out what the remainder would be in the last
2197 * descriptor associated with the fragment.
2198 */
2199 if (stale_size > ICE_MAX_DATA_PER_TXD) {
2200 int align_pad = -(skb_frag_off(stale)) &
2201 (ICE_MAX_READ_REQ_SIZE - 1);
2202
2203 sum -= align_pad;
2204 stale_size -= align_pad;
2205
2206 do {
2207 sum -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2208 stale_size -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2209 } while (stale_size > ICE_MAX_DATA_PER_TXD);
2210 }
2211
2212 /* if sum is negative we failed to make sufficient progress */
2213 if (sum < 0)
2214 return true;
2215
2216 if (!nr_frags--)
2217 break;
2218
2219 sum -= stale_size;
2220 }
2221
2222 return false;
2223}
2224
2225/**
2226 * ice_chk_linearize - Check if there are more than 8 fragments per packet
2227 * @skb: send buffer
2228 * @count: number of buffers used
2229 *
2230 * Note: Our HW can't scatter-gather more than 8 fragments to build
2231 * a packet on the wire and so we need to figure out the cases where we
2232 * need to linearize the skb.
2233 */
2234static bool ice_chk_linearize(struct sk_buff *skb, unsigned int count)
2235{
2236 /* Both TSO and single send will work if count is less than 8 */
2237 if (likely(count < ICE_MAX_BUF_TXD))
2238 return false;
2239
2240 if (skb_is_gso(skb))
2241 return __ice_chk_linearize(skb);
2242
2243 /* we can support up to 8 data buffers for a single send */
2244 return count != ICE_MAX_BUF_TXD;
2245}
2246
2247/**
2248 * ice_tstamp - set up context descriptor for hardware timestamp
2249 * @tx_ring: pointer to the Tx ring to send buffer on
2250 * @skb: pointer to the SKB we're sending
2251 * @first: Tx buffer
2252 * @off: Tx offload parameters
2253 */
2254static void
2255ice_tstamp(struct ice_tx_ring *tx_ring, struct sk_buff *skb,
2256 struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2257{
2258 s8 idx;
2259
2260 /* only timestamp the outbound packet if the user has requested it */
2261 if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
2262 return;
2263
2264 if (!tx_ring->ptp_tx)
2265 return;
2266
2267 /* Tx timestamps cannot be sampled when doing TSO */
2268 if (first->tx_flags & ICE_TX_FLAGS_TSO)
2269 return;
2270
2271 /* Grab an open timestamp slot */
2272 idx = ice_ptp_request_ts(tx_ring->tx_tstamps, skb);
2273 if (idx < 0) {
2274 tx_ring->vsi->back->ptp.tx_hwtstamp_skipped++;
2275 return;
2276 }
2277
2278 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2279 (ICE_TX_CTX_DESC_TSYN << ICE_TXD_CTX_QW1_CMD_S) |
2280 ((u64)idx << ICE_TXD_CTX_QW1_TSO_LEN_S));
2281 first->tx_flags |= ICE_TX_FLAGS_TSYN;
2282}
2283
2284/**
2285 * ice_xmit_frame_ring - Sends buffer on Tx ring
2286 * @skb: send buffer
2287 * @tx_ring: ring to send buffer on
2288 *
2289 * Returns NETDEV_TX_OK if sent, else an error code
2290 */
2291static netdev_tx_t
2292ice_xmit_frame_ring(struct sk_buff *skb, struct ice_tx_ring *tx_ring)
2293{
2294 struct ice_tx_offload_params offload = { 0 };
2295 struct ice_vsi *vsi = tx_ring->vsi;
2296 struct ice_tx_buf *first;
2297 struct ethhdr *eth;
2298 unsigned int count;
2299 int tso, csum;
2300
2301 ice_trace(xmit_frame_ring, tx_ring, skb);
2302
2303 count = ice_xmit_desc_count(skb);
2304 if (ice_chk_linearize(skb, count)) {
2305 if (__skb_linearize(skb))
2306 goto out_drop;
2307 count = ice_txd_use_count(skb->len);
2308 tx_ring->ring_stats->tx_stats.tx_linearize++;
2309 }
2310
2311 /* need: 1 descriptor per page * PAGE_SIZE/ICE_MAX_DATA_PER_TXD,
2312 * + 1 desc for skb_head_len/ICE_MAX_DATA_PER_TXD,
2313 * + 4 desc gap to avoid the cache line where head is,
2314 * + 1 desc for context descriptor,
2315 * otherwise try next time
2316 */
2317 if (ice_maybe_stop_tx(tx_ring, count + ICE_DESCS_PER_CACHE_LINE +
2318 ICE_DESCS_FOR_CTX_DESC)) {
2319 tx_ring->ring_stats->tx_stats.tx_busy++;
2320 return NETDEV_TX_BUSY;
2321 }
2322
2323 /* prefetch for bql data which is infrequently used */
2324 netdev_txq_bql_enqueue_prefetchw(txring_txq(tx_ring));
2325
2326 offload.tx_ring = tx_ring;
2327
2328 /* record the location of the first descriptor for this packet */
2329 first = &tx_ring->tx_buf[tx_ring->next_to_use];
2330 first->skb = skb;
2331 first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
2332 first->gso_segs = 1;
2333 first->tx_flags = 0;
2334
2335 /* prepare the VLAN tagging flags for Tx */
2336 ice_tx_prepare_vlan_flags(tx_ring, first);
2337 if (first->tx_flags & ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN) {
2338 offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2339 (ICE_TX_CTX_DESC_IL2TAG2 <<
2340 ICE_TXD_CTX_QW1_CMD_S));
2341 offload.cd_l2tag2 = (first->tx_flags & ICE_TX_FLAGS_VLAN_M) >>
2342 ICE_TX_FLAGS_VLAN_S;
2343 }
2344
2345 /* set up TSO offload */
2346 tso = ice_tso(first, &offload);
2347 if (tso < 0)
2348 goto out_drop;
2349
2350 /* always set up Tx checksum offload */
2351 csum = ice_tx_csum(first, &offload);
2352 if (csum < 0)
2353 goto out_drop;
2354
2355 /* allow CONTROL frames egress from main VSI if FW LLDP disabled */
2356 eth = (struct ethhdr *)skb_mac_header(skb);
2357 if (unlikely((skb->priority == TC_PRIO_CONTROL ||
2358 eth->h_proto == htons(ETH_P_LLDP)) &&
2359 vsi->type == ICE_VSI_PF &&
2360 vsi->port_info->qos_cfg.is_sw_lldp))
2361 offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2362 ICE_TX_CTX_DESC_SWTCH_UPLINK <<
2363 ICE_TXD_CTX_QW1_CMD_S);
2364
2365 ice_tstamp(tx_ring, skb, first, &offload);
2366 if (ice_is_switchdev_running(vsi->back))
2367 ice_eswitch_set_target_vsi(skb, &offload);
2368
2369 if (offload.cd_qw1 & ICE_TX_DESC_DTYPE_CTX) {
2370 struct ice_tx_ctx_desc *cdesc;
2371 u16 i = tx_ring->next_to_use;
2372
2373 /* grab the next descriptor */
2374 cdesc = ICE_TX_CTX_DESC(tx_ring, i);
2375 i++;
2376 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2377
2378 /* setup context descriptor */
2379 cdesc->tunneling_params = cpu_to_le32(offload.cd_tunnel_params);
2380 cdesc->l2tag2 = cpu_to_le16(offload.cd_l2tag2);
2381 cdesc->rsvd = cpu_to_le16(0);
2382 cdesc->qw1 = cpu_to_le64(offload.cd_qw1);
2383 }
2384
2385 ice_tx_map(tx_ring, first, &offload);
2386 return NETDEV_TX_OK;
2387
2388out_drop:
2389 ice_trace(xmit_frame_ring_drop, tx_ring, skb);
2390 dev_kfree_skb_any(skb);
2391 return NETDEV_TX_OK;
2392}
2393
2394/**
2395 * ice_start_xmit - Selects the correct VSI and Tx queue to send buffer
2396 * @skb: send buffer
2397 * @netdev: network interface device structure
2398 *
2399 * Returns NETDEV_TX_OK if sent, else an error code
2400 */
2401netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2402{
2403 struct ice_netdev_priv *np = netdev_priv(netdev);
2404 struct ice_vsi *vsi = np->vsi;
2405 struct ice_tx_ring *tx_ring;
2406
2407 tx_ring = vsi->tx_rings[skb->queue_mapping];
2408
2409 /* hardware can't handle really short frames, hardware padding works
2410 * beyond this point
2411 */
2412 if (skb_put_padto(skb, ICE_MIN_TX_LEN))
2413 return NETDEV_TX_OK;
2414
2415 return ice_xmit_frame_ring(skb, tx_ring);
2416}
2417
2418/**
2419 * ice_get_dscp_up - return the UP/TC value for a SKB
2420 * @dcbcfg: DCB config that contains DSCP to UP/TC mapping
2421 * @skb: SKB to query for info to determine UP/TC
2422 *
2423 * This function is to only be called when the PF is in L3 DSCP PFC mode
2424 */
2425static u8 ice_get_dscp_up(struct ice_dcbx_cfg *dcbcfg, struct sk_buff *skb)
2426{
2427 u8 dscp = 0;
2428
2429 if (skb->protocol == htons(ETH_P_IP))
2430 dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2;
2431 else if (skb->protocol == htons(ETH_P_IPV6))
2432 dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2;
2433
2434 return dcbcfg->dscp_map[dscp];
2435}
2436
2437u16
2438ice_select_queue(struct net_device *netdev, struct sk_buff *skb,
2439 struct net_device *sb_dev)
2440{
2441 struct ice_pf *pf = ice_netdev_to_pf(netdev);
2442 struct ice_dcbx_cfg *dcbcfg;
2443
2444 dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
2445 if (dcbcfg->pfc_mode == ICE_QOS_MODE_DSCP)
2446 skb->priority = ice_get_dscp_up(dcbcfg, skb);
2447
2448 return netdev_pick_tx(netdev, skb, sb_dev);
2449}
2450
2451/**
2452 * ice_clean_ctrl_tx_irq - interrupt handler for flow director Tx queue
2453 * @tx_ring: tx_ring to clean
2454 */
2455void ice_clean_ctrl_tx_irq(struct ice_tx_ring *tx_ring)
2456{
2457 struct ice_vsi *vsi = tx_ring->vsi;
2458 s16 i = tx_ring->next_to_clean;
2459 int budget = ICE_DFLT_IRQ_WORK;
2460 struct ice_tx_desc *tx_desc;
2461 struct ice_tx_buf *tx_buf;
2462
2463 tx_buf = &tx_ring->tx_buf[i];
2464 tx_desc = ICE_TX_DESC(tx_ring, i);
2465 i -= tx_ring->count;
2466
2467 do {
2468 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
2469
2470 /* if next_to_watch is not set then there is no pending work */
2471 if (!eop_desc)
2472 break;
2473
2474 /* prevent any other reads prior to eop_desc */
2475 smp_rmb();
2476
2477 /* if the descriptor isn't done, no work to do */
2478 if (!(eop_desc->cmd_type_offset_bsz &
2479 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
2480 break;
2481
2482 /* clear next_to_watch to prevent false hangs */
2483 tx_buf->next_to_watch = NULL;
2484 tx_desc->buf_addr = 0;
2485 tx_desc->cmd_type_offset_bsz = 0;
2486
2487 /* move past filter desc */
2488 tx_buf++;
2489 tx_desc++;
2490 i++;
2491 if (unlikely(!i)) {
2492 i -= tx_ring->count;
2493 tx_buf = tx_ring->tx_buf;
2494 tx_desc = ICE_TX_DESC(tx_ring, 0);
2495 }
2496
2497 /* unmap the data header */
2498 if (dma_unmap_len(tx_buf, len))
2499 dma_unmap_single(tx_ring->dev,
2500 dma_unmap_addr(tx_buf, dma),
2501 dma_unmap_len(tx_buf, len),
2502 DMA_TO_DEVICE);
2503 if (tx_buf->tx_flags & ICE_TX_FLAGS_DUMMY_PKT)
2504 devm_kfree(tx_ring->dev, tx_buf->raw_buf);
2505
2506 /* clear next_to_watch to prevent false hangs */
2507 tx_buf->raw_buf = NULL;
2508 tx_buf->tx_flags = 0;
2509 tx_buf->next_to_watch = NULL;
2510 dma_unmap_len_set(tx_buf, len, 0);
2511 tx_desc->buf_addr = 0;
2512 tx_desc->cmd_type_offset_bsz = 0;
2513
2514 /* move past eop_desc for start of next FD desc */
2515 tx_buf++;
2516 tx_desc++;
2517 i++;
2518 if (unlikely(!i)) {
2519 i -= tx_ring->count;
2520 tx_buf = tx_ring->tx_buf;
2521 tx_desc = ICE_TX_DESC(tx_ring, 0);
2522 }
2523
2524 budget--;
2525 } while (likely(budget));
2526
2527 i += tx_ring->count;
2528 tx_ring->next_to_clean = i;
2529
2530 /* re-enable interrupt if needed */
2531 ice_irq_dynamic_ena(&vsi->back->hw, vsi, vsi->q_vectors[0]);
2532}