Loading...
1/*
2 * Copyright 2018 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef __SOC15_IH_CLIENTID_H__
25#define __SOC15_IH_CLIENTID_H__
26
27/*
28 * Vega10+ IH clients
29 * Whenever this structure is updated, which should not happen, make sure
30 * soc15_ih_clientid_name in the below is also updated accordingly.
31 */
32enum soc15_ih_clientid {
33 SOC15_IH_CLIENTID_IH = 0x00,
34 SOC15_IH_CLIENTID_ACP = 0x01,
35 SOC15_IH_CLIENTID_ATHUB = 0x02,
36 SOC15_IH_CLIENTID_BIF = 0x03,
37 SOC15_IH_CLIENTID_DCE = 0x04,
38 SOC15_IH_CLIENTID_ISP = 0x05,
39 SOC15_IH_CLIENTID_PCIE0 = 0x06,
40 SOC15_IH_CLIENTID_RLC = 0x07,
41 SOC15_IH_CLIENTID_SDMA0 = 0x08,
42 SOC15_IH_CLIENTID_SDMA1 = 0x09,
43 SOC15_IH_CLIENTID_SE0SH = 0x0a,
44 SOC15_IH_CLIENTID_SE1SH = 0x0b,
45 SOC15_IH_CLIENTID_SE2SH = 0x0c,
46 SOC15_IH_CLIENTID_SE3SH = 0x0d,
47 SOC15_IH_CLIENTID_UVD1 = 0x0e,
48 SOC15_IH_CLIENTID_THM = 0x0f,
49 SOC15_IH_CLIENTID_UVD = 0x10,
50 SOC15_IH_CLIENTID_VCE0 = 0x11,
51 SOC15_IH_CLIENTID_VMC = 0x12,
52 SOC15_IH_CLIENTID_XDMA = 0x13,
53 SOC15_IH_CLIENTID_GRBM_CP = 0x14,
54 SOC15_IH_CLIENTID_ATS = 0x15,
55 SOC15_IH_CLIENTID_ROM_SMUIO = 0x16,
56 SOC15_IH_CLIENTID_DF = 0x17,
57 SOC15_IH_CLIENTID_VCE1 = 0x18,
58 SOC15_IH_CLIENTID_PWR = 0x19,
59 SOC15_IH_CLIENTID_RESERVED = 0x1a,
60 SOC15_IH_CLIENTID_UTCL2 = 0x1b,
61 SOC15_IH_CLIENTID_EA = 0x1c,
62 SOC15_IH_CLIENTID_UTCL2LOG = 0x1d,
63 SOC15_IH_CLIENTID_MP0 = 0x1e,
64 SOC15_IH_CLIENTID_MP1 = 0x1f,
65
66 SOC15_IH_CLIENTID_MAX,
67
68 SOC15_IH_CLIENTID_VCN = SOC15_IH_CLIENTID_UVD,
69 SOC15_IH_CLIENTID_VCN1 = SOC15_IH_CLIENTID_UVD1,
70 SOC15_IH_CLIENTID_SDMA2 = SOC15_IH_CLIENTID_ACP,
71 SOC15_IH_CLIENTID_SDMA3 = SOC15_IH_CLIENTID_DCE,
72 SOC15_IH_CLIENTID_SDMA3_Sienna_Cichlid = SOC15_IH_CLIENTID_ISP,
73 SOC15_IH_CLIENTID_SDMA4 = SOC15_IH_CLIENTID_ISP,
74 SOC15_IH_CLIENTID_SDMA5 = SOC15_IH_CLIENTID_VCE0,
75 SOC15_IH_CLIENTID_SDMA6 = SOC15_IH_CLIENTID_XDMA,
76 SOC15_IH_CLIENTID_SDMA7 = SOC15_IH_CLIENTID_VCE1,
77 SOC15_IH_CLIENTID_VMC1 = SOC15_IH_CLIENTID_PCIE0,
78};
79
80extern const char *soc15_ih_clientid_name[];
81
82/*
83 * soc21 IH clients
84 */
85enum soc21_ih_clientid {
86 SOC21_IH_CLIENTID_IH = 0x00,
87 SOC21_IH_CLIENTID_ATHUB = 0x02,
88 SOC21_IH_CLIENTID_BIF = 0x03,
89 SOC21_IH_CLIENTID_DCN = 0x04,
90 SOC21_IH_CLIENTID_ISP = 0x05,
91 SOC21_IH_CLIENTID_MP3 = 0x06,
92 SOC21_IH_CLIENTID_RLC = 0x07,
93 SOC21_IH_CLIENTID_GFX = 0x0a,
94 SOC21_IH_CLIENTID_IMU = 0x0b,
95 SOC21_IH_CLIENTID_VCN1 = 0x0e,
96 SOC21_IH_CLIENTID_THM = 0x0f,
97 SOC21_IH_CLIENTID_VCN = 0x10,
98 SOC21_IH_CLIENTID_VPE1 = 0x11,
99 SOC21_IH_CLIENTID_VMC = 0x12,
100 SOC21_IH_CLIENTID_GRBM_CP = 0x14,
101 SOC21_IH_CLIENTID_ROM_SMUIO = 0x16,
102 SOC21_IH_CLIENTID_DF = 0x17,
103 SOC21_IH_CLIENTID_VPE = 0x18,
104 SOC21_IH_CLIENTID_PWR = 0x19,
105 SOC21_IH_CLIENTID_LSDMA = 0x1a,
106 SOC21_IH_CLIENTID_MP0 = 0x1e,
107 SOC21_IH_CLIENTID_MP1 = 0x1f,
108 SOC21_IH_CLIENTID_MAX,
109};
110
111#endif
112
113
1/*
2 * Copyright 2018 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef __SOC15_IH_CLIENTID_H__
25#define __SOC15_IH_CLIENTID_H__
26
27/*
28 * Vega10+ IH clients
29 * Whenever this structure is updated, which should not happen, make sure
30 * soc15_ih_clientid_name in the below is also updated accordingly.
31 */
32enum soc15_ih_clientid {
33 SOC15_IH_CLIENTID_IH = 0x00,
34 SOC15_IH_CLIENTID_ACP = 0x01,
35 SOC15_IH_CLIENTID_ATHUB = 0x02,
36 SOC15_IH_CLIENTID_BIF = 0x03,
37 SOC15_IH_CLIENTID_DCE = 0x04,
38 SOC15_IH_CLIENTID_ISP = 0x05,
39 SOC15_IH_CLIENTID_PCIE0 = 0x06,
40 SOC15_IH_CLIENTID_RLC = 0x07,
41 SOC15_IH_CLIENTID_SDMA0 = 0x08,
42 SOC15_IH_CLIENTID_SDMA1 = 0x09,
43 SOC15_IH_CLIENTID_SE0SH = 0x0a,
44 SOC15_IH_CLIENTID_SE1SH = 0x0b,
45 SOC15_IH_CLIENTID_SE2SH = 0x0c,
46 SOC15_IH_CLIENTID_SE3SH = 0x0d,
47 SOC15_IH_CLIENTID_UVD1 = 0x0e,
48 SOC15_IH_CLIENTID_THM = 0x0f,
49 SOC15_IH_CLIENTID_UVD = 0x10,
50 SOC15_IH_CLIENTID_VCE0 = 0x11,
51 SOC15_IH_CLIENTID_VMC = 0x12,
52 SOC15_IH_CLIENTID_XDMA = 0x13,
53 SOC15_IH_CLIENTID_GRBM_CP = 0x14,
54 SOC15_IH_CLIENTID_ATS = 0x15,
55 SOC15_IH_CLIENTID_ROM_SMUIO = 0x16,
56 SOC15_IH_CLIENTID_DF = 0x17,
57 SOC15_IH_CLIENTID_VCE1 = 0x18,
58 SOC15_IH_CLIENTID_PWR = 0x19,
59 SOC15_IH_CLIENTID_RESERVED = 0x1a,
60 SOC15_IH_CLIENTID_UTCL2 = 0x1b,
61 SOC15_IH_CLIENTID_EA = 0x1c,
62 SOC15_IH_CLIENTID_UTCL2LOG = 0x1d,
63 SOC15_IH_CLIENTID_MP0 = 0x1e,
64 SOC15_IH_CLIENTID_MP1 = 0x1f,
65
66 SOC15_IH_CLIENTID_MAX,
67
68 SOC15_IH_CLIENTID_VCN = SOC15_IH_CLIENTID_UVD,
69 SOC15_IH_CLIENTID_VCN1 = SOC15_IH_CLIENTID_UVD1,
70 SOC15_IH_CLIENTID_SDMA2 = SOC15_IH_CLIENTID_ACP,
71 SOC15_IH_CLIENTID_SDMA3 = SOC15_IH_CLIENTID_DCE,
72 SOC15_IH_CLIENTID_SDMA3_Sienna_Cichlid = SOC15_IH_CLIENTID_ISP,
73 SOC15_IH_CLIENTID_SDMA4 = SOC15_IH_CLIENTID_ISP,
74 SOC15_IH_CLIENTID_SDMA5 = SOC15_IH_CLIENTID_VCE0,
75 SOC15_IH_CLIENTID_SDMA6 = SOC15_IH_CLIENTID_XDMA,
76 SOC15_IH_CLIENTID_SDMA7 = SOC15_IH_CLIENTID_VCE1,
77 SOC15_IH_CLIENTID_VMC1 = SOC15_IH_CLIENTID_PCIE0,
78};
79
80extern const char *soc15_ih_clientid_name[];
81
82/*
83 * soc21 IH clients
84 */
85enum soc21_ih_clientid {
86 SOC21_IH_CLIENTID_IH = 0x00,
87 SOC21_IH_CLIENTID_ATHUB = 0x02,
88 SOC21_IH_CLIENTID_BIF = 0x03,
89 SOC21_IH_CLIENTID_DCN = 0x04,
90 SOC21_IH_CLIENTID_ISP = 0x05,
91 SOC21_IH_CLIENTID_MP3 = 0x06,
92 SOC21_IH_CLIENTID_RLC = 0x07,
93 SOC21_IH_CLIENTID_GFX = 0x0a,
94 SOC21_IH_CLIENTID_IMU = 0x0b,
95 SOC21_IH_CLIENTID_VCN1 = 0x0e,
96 SOC21_IH_CLIENTID_THM = 0x0f,
97 SOC21_IH_CLIENTID_VCN = 0x10,
98 SOC21_IH_CLIENTID_VMC = 0x12,
99 SOC21_IH_CLIENTID_GRBM_CP = 0x14,
100 SOC21_IH_CLIENTID_ROM_SMUIO = 0x16,
101 SOC21_IH_CLIENTID_DF = 0x17,
102 SOC21_IH_CLIENTID_PWR = 0x19,
103 SOC21_IH_CLIENTID_LSDMA = 0x1a,
104 SOC21_IH_CLIENTID_MP0 = 0x1e,
105 SOC21_IH_CLIENTID_MP1 = 0x1f,
106 SOC21_IH_CLIENTID_MAX,
107};
108
109#endif
110
111