1/* SPDX-License-Identifier: MIT */
  2/*
  3 * Copyright 2021 Advanced Micro Devices, Inc.
  4 *
  5 * Permission is hereby granted, free of charge, to any person obtaining a
  6 * copy of this software and associated documentation files (the "Software"),
  7 * to deal in the Software without restriction, including without limitation
  8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9 * and/or sell copies of the Software, and to permit persons to whom the
 10 * Software is furnished to do so, subject to the following conditions:
 11 *
 12 * The above copyright notice and this permission notice shall be included in
 13 * all copies or substantial portions of the Software.
 14 *
 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 21 * OTHER DEALINGS IN THE SOFTWARE.
 22 *
 23 * Authors: AMD
 24 *
 25 */
 26
 27#ifndef __DC_LINK_DPIA_H__
 28#define __DC_LINK_DPIA_H__
 29
 30/* This module implements functionality for training DPIA links. */
 31
 32struct dc_link;
 33struct dc_link_settings;
 34
 35/* The approximate time (us) it takes to transmit 9 USB4 DP clock sync packets. */
 36#define DPIA_CLK_SYNC_DELAY 16000
 37
 38/* Extend interval between training status checks for manual testing. */
 39#define DPIA_DEBUG_EXTENDED_AUX_RD_INTERVAL_US 60000000
 40
 41/** @note Can remove once DP tunneling registers in upstream include/drm/drm_dp_helper.h */
 42/* DPCD DP Tunneling over USB4 */
 43#define DP_TUNNELING_CAPABILITIES_SUPPORT 0xe000d
 44#define DP_IN_ADAPTER_INFO                0xe000e
 45#define DP_USB4_DRIVER_ID                 0xe000f
 46#define DP_USB4_ROUTER_TOPOLOGY_ID        0xe001b
 47
 48/* SET_CONFIG message types sent by driver. */
 49enum dpia_set_config_type {
 50	DPIA_SET_CFG_SET_LINK = 0x01,
 51	DPIA_SET_CFG_SET_PHY_TEST_MODE = 0x05,
 52	DPIA_SET_CFG_SET_TRAINING = 0x18,
 53	DPIA_SET_CFG_SET_VSPE = 0x19
 54};
 55
 56/* Training stages (TS) in SET_CONFIG(SET_TRAINING) message. */
 57enum dpia_set_config_ts {
 58	DPIA_TS_DPRX_DONE = 0x00, /* Done training DPRX. */
 59	DPIA_TS_TPS1 = 0x01,
 60	DPIA_TS_TPS2 = 0x02,
 61	DPIA_TS_TPS3 = 0x03,
 62	DPIA_TS_TPS4 = 0x07,
 63	DPIA_TS_UFP_DONE = 0xff /* Done training DPTX-to-DPIA hop. */
 64};
 65
 66/* SET_CONFIG message data associated with messages sent by driver. */
 67union dpia_set_config_data {
 68	struct {
 69		uint8_t mode : 1;
 70		uint8_t reserved : 7;
 71	} set_link;
 72	struct {
 73		uint8_t stage;
 74	} set_training;
 75	struct {
 76		uint8_t swing : 2;
 77		uint8_t max_swing_reached : 1;
 78		uint8_t pre_emph : 2;
 79		uint8_t max_pre_emph_reached : 1;
 80		uint8_t reserved : 2;
 81	} set_vspe;
 82	uint8_t raw;
 83};
 84
 85/* Read tunneling device capability from DPCD and update link capability
 86 * accordingly.
 87 */
 88enum dc_status dpcd_get_tunneling_device_data(struct dc_link *link);
 89
 90/* Query hot plug status of USB4 DP tunnel.
 91 * Returns true if HPD high.
 92 */
 93bool dc_link_dpia_query_hpd_status(struct dc_link *link);
 94
 95/* Train DP tunneling link for USB4 DPIA display endpoint.
 96 * DPIA equivalent of dc_link_dp_perfrorm_link_training.
 97 * Aborts link training upon detection of sink unplug.
 98 */
 99enum link_training_result dc_link_dpia_perform_link_training(
100	struct dc_link *link,
101	const struct link_resource *link_res,
102	const struct dc_link_settings *link_setting,
103	bool skip_video_pattern);
104
105#endif /* __DC_LINK_DPIA_H__ */