Loading...
Note: File does not exist in v6.9.4.
1/*
2 * Copyright 2012-14 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef DC_LINK_H_
27#define DC_LINK_H_
28
29#include "dc.h"
30#include "dc_types.h"
31#include "grph_object_defs.h"
32
33struct link_resource;
34
35enum dc_link_fec_state {
36 dc_link_fec_not_ready,
37 dc_link_fec_ready,
38 dc_link_fec_enabled
39};
40
41struct dc_link_status {
42 bool link_active;
43 struct dpcd_caps *dpcd_caps;
44};
45
46struct dprx_states {
47 bool cable_id_written;
48};
49
50/* DP MST stream allocation (payload bandwidth number) */
51struct link_mst_stream_allocation {
52 /* DIG front */
53 const struct stream_encoder *stream_enc;
54 /* HPO DP Stream Encoder */
55 const struct hpo_dp_stream_encoder *hpo_dp_stream_enc;
56 /* associate DRM payload table with DC stream encoder */
57 uint8_t vcp_id;
58 /* number of slots required for the DP stream in transport packet */
59 uint8_t slot_count;
60};
61
62/* DP MST stream allocation table */
63struct link_mst_stream_allocation_table {
64 /* number of DP video streams */
65 int stream_count;
66 /* array of stream allocations */
67 struct link_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM];
68};
69
70struct edp_trace_power_timestamps {
71 uint64_t poweroff;
72 uint64_t poweron;
73};
74
75struct dp_trace_lt_counts {
76 unsigned int total;
77 unsigned int fail;
78};
79
80struct dp_trace_lt {
81 struct dp_trace_lt_counts counts;
82 struct dp_trace_timestamps {
83 unsigned long long start;
84 unsigned long long end;
85 } timestamps;
86 enum link_training_result result;
87 bool is_logged;
88};
89
90struct dp_trace {
91 struct dp_trace_lt detect_lt_trace;
92 struct dp_trace_lt commit_lt_trace;
93 unsigned int link_loss_count;
94 bool is_initialized;
95 struct edp_trace_power_timestamps edp_trace_power_timestamps;
96};
97
98/* PSR feature flags */
99struct psr_settings {
100 bool psr_feature_enabled; // PSR is supported by sink
101 bool psr_allow_active; // PSR is currently active
102 enum dc_psr_version psr_version; // Internal PSR version, determined based on DPCD
103 bool psr_vtotal_control_support; // Vtotal control is supported by sink
104
105 /* These parameters are calculated in Driver,
106 * based on display timing and Sink capabilities.
107 * If VBLANK region is too small and Sink takes a long time
108 * to set up RFB, it may take an extra frame to enter PSR state.
109 */
110 bool psr_frame_capture_indication_req;
111 unsigned int psr_sdp_transmit_line_num_deadline;
112 uint8_t force_ffu_mode;
113 unsigned int psr_power_opt;
114};
115
116/* To split out "global" and "per-panel" config settings.
117 * Add a struct dc_panel_config under dc_link
118 */
119struct dc_panel_config {
120 /* extra panel power sequence parameters */
121 struct pps {
122 unsigned int extra_t3_ms;
123 unsigned int extra_t7_ms;
124 unsigned int extra_delay_backlight_off;
125 unsigned int extra_post_t7_ms;
126 unsigned int extra_pre_t11_ms;
127 unsigned int extra_t12_ms;
128 unsigned int extra_post_OUI_ms;
129 } pps;
130 /* PSR */
131 struct psr {
132 bool disable_psr;
133 bool disallow_psrsu;
134 bool rc_disable;
135 bool rc_allow_static_screen;
136 bool rc_allow_fullscreen_VPB;
137 } psr;
138 /* ABM */
139 struct varib {
140 unsigned int varibright_feature_enable;
141 unsigned int def_varibright_level;
142 unsigned int abm_config_setting;
143 } varib;
144 /* edp DSC */
145 struct dsc {
146 bool disable_dsc_edp;
147 unsigned int force_dsc_edp_policy;
148 } dsc;
149 /* eDP ILR */
150 struct ilr {
151 bool optimize_edp_link_rate; /* eDP ILR */
152 } ilr;
153};
154
155/*
156 * USB4 DPIA BW ALLOCATION STRUCTS
157 */
158struct dc_dpia_bw_alloc {
159 int sink_verified_bw; // The Verified BW that sink can allocated and use that has been verified already
160 int sink_allocated_bw; // The Actual Allocated BW that sink currently allocated
161 int padding_bw; // The Padding "Un-used" BW allocated by CM for padding reasons
162 int sink_max_bw; // The Max BW that sink can require/support
163 int estimated_bw; // The estimated available BW for this DPIA
164 int bw_granularity; // BW Granularity
165 bool bw_alloc_enabled; // The BW Alloc Mode Support is turned ON for all 3: DP-Tx & Dpia & CM
166};
167
168/*
169 * A link contains one or more sinks and their connected status.
170 * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
171 */
172struct dc_link {
173 struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
174 unsigned int sink_count;
175 struct dc_sink *local_sink;
176 unsigned int link_index;
177 enum dc_connection_type type;
178 enum signal_type connector_signal;
179 enum dc_irq_source irq_source_hpd;
180 enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse */
181 bool is_hpd_filter_disabled;
182 bool dp_ss_off;
183
184 /**
185 * @link_state_valid:
186 *
187 * If there is no link and local sink, this variable should be set to
188 * false. Otherwise, it should be set to true; usually, the function
189 * core_link_enable_stream sets this field to true.
190 */
191 bool link_state_valid;
192 bool aux_access_disabled;
193 bool sync_lt_in_progress;
194 bool is_internal_display;
195
196 /* TODO: Rename. Flag an endpoint as having a programmable mapping to a
197 * DIG encoder. */
198 bool is_dig_mapping_flexible;
199 bool hpd_status; /* HPD status of link without physical HPD pin. */
200 bool is_hpd_pending; /* Indicates a new received hpd */
201 bool is_automated; /* Indicates automated testing */
202
203 bool edp_sink_present;
204
205 struct dp_trace dp_trace;
206
207 /* caps is the same as reported_link_cap. link_traing use
208 * reported_link_cap. Will clean up. TODO
209 */
210 struct dc_link_settings reported_link_cap;
211 struct dc_link_settings verified_link_cap;
212 struct dc_link_settings cur_link_settings;
213 struct dc_lane_settings cur_lane_setting[LANE_COUNT_DP_MAX];
214 struct dc_link_settings preferred_link_setting;
215 /* preferred_training_settings are override values that
216 * come from DM. DM is responsible for the memory
217 * management of the override pointers.
218 */
219 struct dc_link_training_overrides preferred_training_settings;
220 struct dp_audio_test_data audio_test_data;
221
222 uint8_t ddc_hw_inst;
223
224 uint8_t hpd_src;
225
226 uint8_t link_enc_hw_inst;
227 /* DIG link encoder ID. Used as index in link encoder resource pool.
228 * For links with fixed mapping to DIG, this is not changed after dc_link
229 * object creation.
230 */
231 enum engine_id eng_id;
232
233 bool test_pattern_enabled;
234 union compliance_test_state compliance_test_state;
235
236 void *priv;
237
238 struct ddc_service *ddc;
239
240 bool aux_mode;
241
242 /* Private to DC core */
243
244 const struct dc *dc;
245
246 struct dc_context *ctx;
247
248 struct panel_cntl *panel_cntl;
249 struct link_encoder *link_enc;
250 struct graphics_object_id link_id;
251 /* Endpoint type distinguishes display endpoints which do not have entries
252 * in the BIOS connector table from those that do. Helps when tracking link
253 * encoder to display endpoint assignments.
254 */
255 enum display_endpoint_type ep_type;
256 union ddi_channel_mapping ddi_channel_mapping;
257 struct connector_device_tag_info device_tag;
258 struct dpcd_caps dpcd_caps;
259 uint32_t dongle_max_pix_clk;
260 unsigned short chip_caps;
261 unsigned int dpcd_sink_count;
262#if defined(CONFIG_DRM_AMD_DC_HDCP)
263 struct hdcp_caps hdcp_caps;
264#endif
265 enum edp_revision edp_revision;
266 union dpcd_sink_ext_caps dpcd_sink_ext_caps;
267
268 struct psr_settings psr_settings;
269
270 /* Drive settings read from integrated info table */
271 struct dc_lane_settings bios_forced_drive_settings;
272
273 /* Vendor specific LTTPR workaround variables */
274 uint8_t vendor_specific_lttpr_link_rate_wa;
275 bool apply_vendor_specific_lttpr_link_rate_wa;
276
277 /* MST record stream using this link */
278 struct link_flags {
279 bool dp_keep_receiver_powered;
280 bool dp_skip_DID2;
281 bool dp_skip_reset_segment;
282 bool dp_mot_reset_segment;
283 /* Some USB4 docks do not handle turning off MST DSC once it has been enabled. */
284 bool dpia_mst_dsc_always_on;
285 /* Forced DPIA into TBT3 compatibility mode. */
286 bool dpia_forced_tbt3_mode;
287 bool dongle_mode_timing_override;
288 } wa_flags;
289 struct link_mst_stream_allocation_table mst_stream_alloc_table;
290
291 struct dc_link_status link_status;
292 struct dprx_states dprx_states;
293
294 struct gpio *hpd_gpio;
295 enum dc_link_fec_state fec_state;
296 struct dc_panel_config panel_config;
297 struct phy_state phy_state;
298};
299
300const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
301
302/**
303 * dc_get_link_at_index() - Return an enumerated dc_link.
304 *
305 * dc_link order is constant and determined at
306 * boot time. They cannot be created or destroyed.
307 * Use dc_get_caps() to get number of links.
308 */
309static inline struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index)
310{
311 return dc->links[link_index];
312}
313
314static inline void get_edp_links(const struct dc *dc,
315 struct dc_link **edp_links,
316 int *edp_num)
317{
318 int i;
319
320 *edp_num = 0;
321 for (i = 0; i < dc->link_count; i++) {
322 // report any eDP links, even unconnected DDI's
323 if (!dc->links[i])
324 continue;
325 if (dc->links[i]->connector_signal == SIGNAL_TYPE_EDP) {
326 edp_links[*edp_num] = dc->links[i];
327 if (++(*edp_num) == MAX_NUM_EDP)
328 return;
329 }
330 }
331}
332
333static inline bool dc_get_edp_link_panel_inst(const struct dc *dc,
334 const struct dc_link *link,
335 unsigned int *inst_out)
336{
337 struct dc_link *edp_links[MAX_NUM_EDP];
338 int edp_num;
339
340 if (link->connector_signal != SIGNAL_TYPE_EDP)
341 return false;
342 get_edp_links(dc, edp_links, &edp_num);
343 if ((edp_num > 1) && (link->link_index > edp_links[0]->link_index))
344 *inst_out = 1;
345 else
346 *inst_out = 0;
347 return true;
348}
349
350/* Set backlight level of an embedded panel (eDP, LVDS).
351 * backlight_pwm_u16_16 is unsigned 32 bit with 16 bit integer
352 * and 16 bit fractional, where 1.0 is max backlight value.
353 */
354bool dc_link_set_backlight_level(const struct dc_link *dc_link,
355 uint32_t backlight_pwm_u16_16,
356 uint32_t frame_ramp);
357
358/* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
359bool dc_link_set_backlight_level_nits(struct dc_link *link,
360 bool isHDR,
361 uint32_t backlight_millinits,
362 uint32_t transition_time_in_ms);
363
364bool dc_link_get_backlight_level_nits(struct dc_link *link,
365 uint32_t *backlight_millinits,
366 uint32_t *backlight_millinits_peak);
367
368bool dc_link_backlight_enable_aux(struct dc_link *link, bool enable);
369
370bool dc_link_read_default_bl_aux(struct dc_link *link, uint32_t *backlight_millinits);
371bool dc_link_set_default_brightness_aux(struct dc_link *link);
372
373int dc_link_get_backlight_level(const struct dc_link *dc_link);
374
375int dc_link_get_target_backlight_pwm(const struct dc_link *link);
376
377bool dc_link_set_psr_allow_active(struct dc_link *dc_link, const bool *enable,
378 bool wait, bool force_static, const unsigned int *power_opts);
379
380bool dc_link_get_psr_state(const struct dc_link *dc_link, enum dc_psr_state *state);
381
382bool dc_link_setup_psr(struct dc_link *dc_link,
383 const struct dc_stream_state *stream, struct psr_config *psr_config,
384 struct psr_context *psr_context);
385
386bool dc_power_alpm_dpcd_enable(struct dc_link *link, bool enable);
387
388void dc_link_get_psr_residency(const struct dc_link *link, uint32_t *residency);
389
390void dc_link_blank_all_dp_displays(struct dc *dc);
391void dc_link_blank_all_edp_displays(struct dc *dc);
392
393void dc_link_blank_dp_stream(struct dc_link *link, bool hw_init);
394bool dc_link_set_sink_vtotal_in_psr_active(const struct dc_link *link,
395 uint16_t psr_vtotal_idle, uint16_t psr_vtotal_su);
396
397/* Request DC to detect if there is a Panel connected.
398 * boot - If this call is during initial boot.
399 * Return false for any type of detection failure or MST detection
400 * true otherwise. True meaning further action is required (status update
401 * and OS notification).
402 */
403enum dc_detect_reason {
404 DETECT_REASON_BOOT,
405 DETECT_REASON_RESUMEFROMS3S4,
406 DETECT_REASON_HPD,
407 DETECT_REASON_HPDRX,
408 DETECT_REASON_FALLBACK,
409 DETECT_REASON_RETRAIN,
410 DETECT_REASON_TDR,
411};
412
413bool dc_link_detect(struct dc_link *dc_link, enum dc_detect_reason reason);
414bool dc_link_get_hpd_state(struct dc_link *dc_link);
415enum dc_status dc_link_allocate_mst_payload(struct pipe_ctx *pipe_ctx);
416enum dc_status dc_link_reduce_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
417enum dc_status dc_link_increase_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
418
419/* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
420 * Return:
421 * true - Downstream port status changed. DM should call DC to do the
422 * detection.
423 * false - no change in Downstream port status. No further action required
424 * from DM. */
425bool dc_link_handle_hpd_rx_irq(struct dc_link *dc_link,
426 union hpd_irq_data *hpd_irq_dpcd_data, bool *out_link_loss,
427 bool defer_handling, bool *has_left_work);
428
429/*
430 * On eDP links this function call will stall until T12 has elapsed.
431 * If the panel is not in power off state, this function will return
432 * immediately.
433 */
434bool dc_link_wait_for_t12(struct dc_link *link);
435
436void dc_link_dp_handle_automated_test(struct dc_link *link);
437void dc_link_dp_handle_link_loss(struct dc_link *link);
438bool dc_link_dp_allow_hpd_rx_irq(const struct dc_link *link);
439
440struct dc_sink_init_data;
441
442struct dc_sink *dc_link_add_remote_sink(
443 struct dc_link *dc_link,
444 const uint8_t *edid,
445 int len,
446 struct dc_sink_init_data *init_data);
447
448void dc_link_remove_remote_sink(
449 struct dc_link *link,
450 struct dc_sink *sink);
451
452/* Used by diagnostics for virtual link at the moment */
453
454void dc_link_dp_set_drive_settings(
455 struct dc_link *link,
456 const struct link_resource *link_res,
457 struct link_training_settings *lt_settings);
458
459bool dc_link_dp_perform_link_training_skip_aux(
460 struct dc_link *link,
461 const struct link_resource *link_res,
462 const struct dc_link_settings *link_setting);
463
464enum link_training_result dc_link_dp_perform_link_training(
465 struct dc_link *link,
466 const struct link_resource *link_res,
467 const struct dc_link_settings *link_settings,
468 bool skip_video_pattern);
469
470bool dc_link_dp_sync_lt_begin(struct dc_link *link);
471
472enum link_training_result dc_link_dp_sync_lt_attempt(
473 struct dc_link *link,
474 const struct link_resource *link_res,
475 struct dc_link_settings *link_setting,
476 struct dc_link_training_overrides *lt_settings);
477
478bool dc_link_dp_sync_lt_end(struct dc_link *link, bool link_down);
479
480void dc_link_dp_enable_hpd(const struct dc_link *link);
481
482void dc_link_dp_disable_hpd(const struct dc_link *link);
483
484bool dc_link_dp_set_test_pattern(
485 struct dc_link *link,
486 enum dp_test_pattern test_pattern,
487 enum dp_test_pattern_color_space test_pattern_color_space,
488 const struct link_training_settings *p_link_settings,
489 const unsigned char *p_custom_pattern,
490 unsigned int cust_pattern_size);
491
492bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct dc_link_settings *max_link_enc_cap);
493
494void dc_link_enable_hpd_filter(struct dc_link *link, bool enable);
495
496bool dc_link_is_dp_sink_present(struct dc_link *link);
497
498bool dc_link_detect_sink(struct dc_link *link, enum dc_connection_type *type);
499/*
500 * DPCD access interfaces
501 */
502
503#ifdef CONFIG_DRM_AMD_DC_HDCP
504bool dc_link_is_hdcp14(struct dc_link *link, enum signal_type signal);
505bool dc_link_is_hdcp22(struct dc_link *link, enum signal_type signal);
506#endif
507void dc_link_set_drive_settings(struct dc *dc,
508 struct link_training_settings *lt_settings,
509 const struct dc_link *link);
510void dc_link_set_preferred_link_settings(struct dc *dc,
511 struct dc_link_settings *link_setting,
512 struct dc_link *link);
513void dc_link_set_preferred_training_settings(struct dc *dc,
514 struct dc_link_settings *link_setting,
515 struct dc_link_training_overrides *lt_overrides,
516 struct dc_link *link,
517 bool skip_immediate_retrain);
518void dc_link_enable_hpd(const struct dc_link *link);
519void dc_link_disable_hpd(const struct dc_link *link);
520void dc_link_set_test_pattern(struct dc_link *link,
521 enum dp_test_pattern test_pattern,
522 enum dp_test_pattern_color_space test_pattern_color_space,
523 const struct link_training_settings *p_link_settings,
524 const unsigned char *p_custom_pattern,
525 unsigned int cust_pattern_size);
526uint32_t dc_link_bandwidth_kbps(
527 const struct dc_link *link,
528 const struct dc_link_settings *link_setting);
529
530const struct dc_link_settings *dc_link_get_link_cap(
531 const struct dc_link *link);
532
533void dc_link_overwrite_extended_receiver_cap(
534 struct dc_link *link);
535
536bool dc_is_oem_i2c_device_present(
537 struct dc *dc,
538 size_t slave_address
539);
540
541bool dc_submit_i2c(
542 struct dc *dc,
543 uint32_t link_index,
544 struct i2c_command *cmd);
545
546bool dc_submit_i2c_oem(
547 struct dc *dc,
548 struct i2c_command *cmd);
549
550uint32_t dc_bandwidth_in_kbps_from_timing(
551 const struct dc_crtc_timing *timing);
552
553bool dc_link_is_fec_supported(const struct dc_link *link);
554bool dc_link_should_enable_fec(const struct dc_link *link);
555
556uint32_t dc_link_bw_kbps_from_raw_frl_link_rate_data(uint8_t bw);
557enum dp_link_encoding dc_link_dp_mst_decide_link_encoding_format(const struct dc_link *link);
558
559void dc_link_get_cur_link_res(const struct dc_link *link,
560 struct link_resource *link_res);
561/* take a snapshot of current link resource allocation state */
562void dc_get_cur_link_res_map(const struct dc *dc, uint32_t *map);
563/* restore link resource allocation state from a snapshot */
564void dc_restore_link_res_map(const struct dc *dc, uint32_t *map);
565void dc_link_clear_dprx_states(struct dc_link *link);
566struct gpio *get_hpd_gpio(struct dc_bios *dcb,
567 struct graphics_object_id link_id,
568 struct gpio_service *gpio_service);
569void dp_trace_reset(struct dc_link *link);
570bool dc_dp_trace_is_initialized(struct dc_link *link);
571unsigned long long dc_dp_trace_get_lt_end_timestamp(struct dc_link *link,
572 bool in_detection);
573void dc_dp_trace_set_is_logged_flag(struct dc_link *link,
574 bool in_detection,
575 bool is_logged);
576bool dc_dp_trace_is_logged(struct dc_link *link,
577 bool in_detection);
578struct dp_trace_lt_counts *dc_dp_trace_get_lt_counts(struct dc_link *link,
579 bool in_detection);
580unsigned int dc_dp_trace_get_link_loss_count(struct dc_link *link);
581
582/* Destruct the mst topology of the link and reset the allocated payload table */
583bool reset_cur_dp_mst_topology(struct dc_link *link);
584#endif /* DC_LINK_H_ */