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v6.9.4
  1/*
  2 * Copyright 2020 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 */
 23
 24#ifndef __MMSCH_V3_0_H__
 25#define __MMSCH_V3_0_H__
 26
 27#include "amdgpu_vcn.h"
 28
 29#define MMSCH_VERSION_MAJOR	3
 30#define MMSCH_VERSION_MINOR	0
 31#define MMSCH_VERSION	(MMSCH_VERSION_MAJOR << 16 | MMSCH_VERSION_MINOR)
 32
 33#define MMSCH_V3_0_VCN_INSTANCES 0x2
 34
 35enum mmsch_v3_0_command_type {
 36	MMSCH_COMMAND__DIRECT_REG_WRITE = 0,
 37	MMSCH_COMMAND__DIRECT_REG_POLLING = 2,
 38	MMSCH_COMMAND__DIRECT_REG_READ_MODIFY_WRITE = 3,
 39	MMSCH_COMMAND__INDIRECT_REG_WRITE = 8,
 40	MMSCH_COMMAND__END = 0xf
 41};
 42
 43struct mmsch_v3_0_table_info {
 44	uint32_t init_status;
 45	uint32_t table_offset;
 46	uint32_t table_size;
 47};
 48
 49struct mmsch_v3_0_init_header {
 50	uint32_t version;
 51	uint32_t total_size;
 52	struct mmsch_v3_0_table_info inst[MMSCH_V3_0_VCN_INSTANCES];
 53};
 54
 55struct mmsch_v3_0_cmd_direct_reg_header {
 56	uint32_t reg_offset   : 28;
 57	uint32_t command_type : 4;
 58};
 59
 60struct mmsch_v3_0_cmd_indirect_reg_header {
 61	uint32_t reg_offset    : 20;
 62	uint32_t reg_idx_space : 8;
 63	uint32_t command_type  : 4;
 64};
 65
 66struct mmsch_v3_0_cmd_direct_write {
 67	struct mmsch_v3_0_cmd_direct_reg_header cmd_header;
 68	uint32_t reg_value;
 69};
 70
 71struct mmsch_v3_0_cmd_direct_read_modify_write {
 72	struct mmsch_v3_0_cmd_direct_reg_header cmd_header;
 73	uint32_t write_data;
 74	uint32_t mask_value;
 75};
 76
 77struct mmsch_v3_0_cmd_direct_polling {
 78	struct mmsch_v3_0_cmd_direct_reg_header cmd_header;
 79	uint32_t mask_value;
 80	uint32_t wait_value;
 81};
 82
 83struct mmsch_v3_0_cmd_end {
 84	struct mmsch_v3_0_cmd_direct_reg_header cmd_header;
 85};
 86
 87struct mmsch_v3_0_cmd_indirect_write {
 88	struct mmsch_v3_0_cmd_indirect_reg_header cmd_header;
 89	uint32_t reg_value;
 90};
 91
 92#define MMSCH_V3_0_INSERT_DIRECT_RD_MOD_WT(reg, mask, data) { \
 93	size = sizeof(struct mmsch_v3_0_cmd_direct_read_modify_write); \
 94	size_dw = size / 4; \
 95	direct_rd_mod_wt.cmd_header.reg_offset = reg; \
 96	direct_rd_mod_wt.mask_value = mask; \
 97	direct_rd_mod_wt.write_data = data; \
 98	memcpy((void *)table_loc, &direct_rd_mod_wt, size); \
 99	table_loc += size_dw; \
100	table_size += size_dw; \
101}
102
103#define MMSCH_V3_0_INSERT_DIRECT_WT(reg, value) { \
104	size = sizeof(struct mmsch_v3_0_cmd_direct_write); \
105	size_dw = size / 4; \
106	direct_wt.cmd_header.reg_offset = reg; \
107	direct_wt.reg_value = value; \
108	memcpy((void *)table_loc, &direct_wt, size); \
109	table_loc += size_dw; \
110	table_size += size_dw; \
111}
112
113#define MMSCH_V3_0_INSERT_DIRECT_POLL(reg, mask, wait) { \
114	size = sizeof(struct mmsch_v3_0_cmd_direct_polling); \
115	size_dw = size / 4; \
116	direct_poll.cmd_header.reg_offset = reg; \
117	direct_poll.mask_value = mask; \
118	direct_poll.wait_value = wait; \
119	memcpy((void *)table_loc, &direct_poll, size); \
120	table_loc += size_dw; \
121	table_size += size_dw; \
122}
123
124#define MMSCH_V3_0_INSERT_END() { \
125	size = sizeof(struct mmsch_v3_0_cmd_end); \
126	size_dw = size / 4; \
127	memcpy((void *)table_loc, &end, size); \
128	table_loc += size_dw; \
129	table_size += size_dw; \
130}
131
132#endif
v6.2
  1/*
  2 * Copyright 2020 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 */
 23
 24#ifndef __MMSCH_V3_0_H__
 25#define __MMSCH_V3_0_H__
 26
 27#include "amdgpu_vcn.h"
 28
 29#define MMSCH_VERSION_MAJOR	3
 30#define MMSCH_VERSION_MINOR	0
 31#define MMSCH_VERSION	(MMSCH_VERSION_MAJOR << 16 | MMSCH_VERSION_MINOR)
 32
 
 
 33enum mmsch_v3_0_command_type {
 34	MMSCH_COMMAND__DIRECT_REG_WRITE = 0,
 35	MMSCH_COMMAND__DIRECT_REG_POLLING = 2,
 36	MMSCH_COMMAND__DIRECT_REG_READ_MODIFY_WRITE = 3,
 37	MMSCH_COMMAND__INDIRECT_REG_WRITE = 8,
 38	MMSCH_COMMAND__END = 0xf
 39};
 40
 41struct mmsch_v3_0_table_info {
 42	uint32_t init_status;
 43	uint32_t table_offset;
 44	uint32_t table_size;
 45};
 46
 47struct mmsch_v3_0_init_header {
 48	uint32_t version;
 49	uint32_t total_size;
 50	struct mmsch_v3_0_table_info inst[AMDGPU_MAX_VCN_INSTANCES];
 51};
 52
 53struct mmsch_v3_0_cmd_direct_reg_header {
 54	uint32_t reg_offset   : 28;
 55	uint32_t command_type : 4;
 56};
 57
 58struct mmsch_v3_0_cmd_indirect_reg_header {
 59	uint32_t reg_offset    : 20;
 60	uint32_t reg_idx_space : 8;
 61	uint32_t command_type  : 4;
 62};
 63
 64struct mmsch_v3_0_cmd_direct_write {
 65	struct mmsch_v3_0_cmd_direct_reg_header cmd_header;
 66	uint32_t reg_value;
 67};
 68
 69struct mmsch_v3_0_cmd_direct_read_modify_write {
 70	struct mmsch_v3_0_cmd_direct_reg_header cmd_header;
 71	uint32_t write_data;
 72	uint32_t mask_value;
 73};
 74
 75struct mmsch_v3_0_cmd_direct_polling {
 76	struct mmsch_v3_0_cmd_direct_reg_header cmd_header;
 77	uint32_t mask_value;
 78	uint32_t wait_value;
 79};
 80
 81struct mmsch_v3_0_cmd_end {
 82	struct mmsch_v3_0_cmd_direct_reg_header cmd_header;
 83};
 84
 85struct mmsch_v3_0_cmd_indirect_write {
 86	struct mmsch_v3_0_cmd_indirect_reg_header cmd_header;
 87	uint32_t reg_value;
 88};
 89
 90#define MMSCH_V3_0_INSERT_DIRECT_RD_MOD_WT(reg, mask, data) { \
 91	size = sizeof(struct mmsch_v3_0_cmd_direct_read_modify_write); \
 92	size_dw = size / 4; \
 93	direct_rd_mod_wt.cmd_header.reg_offset = reg; \
 94	direct_rd_mod_wt.mask_value = mask; \
 95	direct_rd_mod_wt.write_data = data; \
 96	memcpy((void *)table_loc, &direct_rd_mod_wt, size); \
 97	table_loc += size_dw; \
 98	table_size += size_dw; \
 99}
100
101#define MMSCH_V3_0_INSERT_DIRECT_WT(reg, value) { \
102	size = sizeof(struct mmsch_v3_0_cmd_direct_write); \
103	size_dw = size / 4; \
104	direct_wt.cmd_header.reg_offset = reg; \
105	direct_wt.reg_value = value; \
106	memcpy((void *)table_loc, &direct_wt, size); \
107	table_loc += size_dw; \
108	table_size += size_dw; \
109}
110
111#define MMSCH_V3_0_INSERT_DIRECT_POLL(reg, mask, wait) { \
112	size = sizeof(struct mmsch_v3_0_cmd_direct_polling); \
113	size_dw = size / 4; \
114	direct_poll.cmd_header.reg_offset = reg; \
115	direct_poll.mask_value = mask; \
116	direct_poll.wait_value = wait; \
117	memcpy((void *)table_loc, &direct_poll, size); \
118	table_loc += size_dw; \
119	table_size += size_dw; \
120}
121
122#define MMSCH_V3_0_INSERT_END() { \
123	size = sizeof(struct mmsch_v3_0_cmd_end); \
124	size_dw = size / 4; \
125	memcpy((void *)table_loc, &end, size); \
126	table_loc += size_dw; \
127	table_size += size_dw; \
128}
129
130#endif