1/*
 2 * Copyright 2022 Advanced Micro Devices, Inc.
 3 *
 4 * Permission is hereby granted, free of charge, to any person obtaining a
 5 * copy of this software and associated documentation files (the "Software"),
 6 * to deal in the Software without restriction, including without limitation
 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 8 * and/or sell copies of the Software, and to permit persons to whom the
 9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23#ifndef __AMDGPU_CS_H__
24#define __AMDGPU_CS_H__
25
26#include <linux/ww_mutex.h>
27#include <drm/drm_exec.h>
28
29#include "amdgpu_job.h"
30#include "amdgpu_bo_list.h"
31#include "amdgpu_ring.h"
32
33#define AMDGPU_CS_GANG_SIZE	4
34
35struct amdgpu_bo_va_mapping;
36
37struct amdgpu_cs_chunk {
38	uint32_t		chunk_id;
39	uint32_t		length_dw;
40	void			*kdata;
41};
42
43struct amdgpu_cs_post_dep {
44	struct drm_syncobj *syncobj;
45	struct dma_fence_chain *chain;
46	u64 point;
47};
48
49struct amdgpu_cs_parser {
50	struct amdgpu_device	*adev;
51	struct drm_file		*filp;
52	struct amdgpu_ctx	*ctx;
53
54	/* chunks */
55	unsigned		nchunks;
56	struct amdgpu_cs_chunk	*chunks;
57
58	/* scheduler job objects */
59	unsigned int		gang_size;
60	unsigned int		gang_leader_idx;
61	struct drm_sched_entity	*entities[AMDGPU_CS_GANG_SIZE];
62	struct amdgpu_job	*jobs[AMDGPU_CS_GANG_SIZE];
63	struct amdgpu_job	*gang_leader;
64
65	/* buffer objects */
66	struct drm_exec			exec;
67	struct amdgpu_bo_list		*bo_list;
68	struct amdgpu_mn		*mn;
 
 
69	struct dma_fence		*fence;
70	uint64_t			bytes_moved_threshold;
71	uint64_t			bytes_moved_vis_threshold;
72	uint64_t			bytes_moved;
73	uint64_t			bytes_moved_vis;
74
75	/* user fence */
76	struct amdgpu_bo		*uf_bo;
77
78	unsigned			num_post_deps;
79	struct amdgpu_cs_post_dep	*post_deps;
80
81	struct amdgpu_sync		sync;
82};
83
84int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
85			   uint64_t addr, struct amdgpu_bo **bo,
86			   struct amdgpu_bo_va_mapping **mapping);
87
88#endif

 1/*
 2 * Copyright 2022 Advanced Micro Devices, Inc.
 3 *
 4 * Permission is hereby granted, free of charge, to any person obtaining a
 5 * copy of this software and associated documentation files (the "Software"),
 6 * to deal in the Software without restriction, including without limitation
 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 8 * and/or sell copies of the Software, and to permit persons to whom the
 9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23#ifndef __AMDGPU_CS_H__
24#define __AMDGPU_CS_H__
25
 
 
 
26#include "amdgpu_job.h"
27#include "amdgpu_bo_list.h"
28#include "amdgpu_ring.h"
29
30#define AMDGPU_CS_GANG_SIZE	4
31
32struct amdgpu_bo_va_mapping;
33
34struct amdgpu_cs_chunk {
35	uint32_t		chunk_id;
36	uint32_t		length_dw;
37	void			*kdata;
38};
39
40struct amdgpu_cs_post_dep {
41	struct drm_syncobj *syncobj;
42	struct dma_fence_chain *chain;
43	u64 point;
44};
45
46struct amdgpu_cs_parser {
47	struct amdgpu_device	*adev;
48	struct drm_file		*filp;
49	struct amdgpu_ctx	*ctx;
50
51	/* chunks */
52	unsigned		nchunks;
53	struct amdgpu_cs_chunk	*chunks;
54
55	/* scheduler job objects */
56	unsigned int		gang_size;
57	unsigned int		gang_leader_idx;
58	struct drm_sched_entity	*entities[AMDGPU_CS_GANG_SIZE];
59	struct amdgpu_job	*jobs[AMDGPU_CS_GANG_SIZE];
60	struct amdgpu_job	*gang_leader;
61
62	/* buffer objects */
63	struct ww_acquire_ctx		ticket;
64	struct amdgpu_bo_list		*bo_list;
65	struct amdgpu_mn		*mn;
66	struct amdgpu_bo_list_entry	vm_pd;
67	struct list_head		validated;
68	struct dma_fence		*fence;
69	uint64_t			bytes_moved_threshold;
70	uint64_t			bytes_moved_vis_threshold;
71	uint64_t			bytes_moved;
72	uint64_t			bytes_moved_vis;
73
74	/* user fence */
75	struct amdgpu_bo_list_entry	uf_entry;
76
77	unsigned			num_post_deps;
78	struct amdgpu_cs_post_dep	*post_deps;
79
80	struct amdgpu_sync		sync;
81};
82
83int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
84			   uint64_t addr, struct amdgpu_bo **bo,
85			   struct amdgpu_bo_va_mapping **mapping);
86
87#endif