1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 * EFI entry point.
 4 *
 5 * Copyright (C) 2013, 2014 Red Hat, Inc.
 6 * Author: Mark Salter <msalter@redhat.com>
 7 */
 8#include <linux/linkage.h>
 9#include <asm/assembler.h>
10
11	/*
12	 * The entrypoint of a arm64 bare metal image is at offset #0 of the
13	 * image, so this is a reasonable default for primary_entry_offset.
14	 * Only when the EFI stub is integrated into the core kernel, it is not
15	 * guaranteed that the PE/COFF header has been copied to memory too, so
16	 * in this case, primary_entry_offset should be overridden by the
17	 * linker and point to primary_entry() directly.
18	 */
19	.weak	primary_entry_offset
20
21SYM_CODE_START(efi_enter_kernel)
22	/*
23	 * efi_pe_entry() will have copied the kernel image if necessary and we
24	 * end up here with device tree address in x1 and the kernel entry
25	 * point stored in x0. Save those values in registers which are
26	 * callee preserved.
27	 */
28	ldr	w2, =primary_entry_offset
29	add	x19, x0, x2		// relocated Image entrypoint
30
31	mov	x0, x1			// DTB address
32	mov	x1, xzr
33	mov	x2, xzr
34	mov	x3, xzr
35
36	/*
37	 * Clean the remainder of this routine to the PoC
38	 * so that we can safely disable the MMU and caches.
39	 */
40	adr	x4, 1f
41	dc	civac, x4
42	dsb	sy
43
44	/* Turn off Dcache and MMU */
45	mrs	x4, CurrentEL
46	cmp	x4, #CurrentEL_EL2
47	mrs	x4, sctlr_el1
48	b.ne	0f
49	mrs	x4, sctlr_el2
500:	bic	x4, x4, #SCTLR_ELx_M
51	bic	x4, x4, #SCTLR_ELx_C
52	b.eq	1f
53	b	2f
54
55	.balign	32
561:	pre_disable_mmu_workaround
57	msr	sctlr_el2, x4
58	isb
59	br	x19		// jump to kernel entrypoint
60
612:	pre_disable_mmu_workaround
62	msr	sctlr_el1, x4
63	isb
64	br	x19		// jump to kernel entrypoint
65
66	.org	1b + 32
67SYM_CODE_END(efi_enter_kernel)