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v6.9.4
  1/* SPDX-License-Identifier: GPL-2.0-or-later */
  2#ifndef _ASM_POWERPC_CODE_PATCHING_H
  3#define _ASM_POWERPC_CODE_PATCHING_H
  4
  5/*
  6 * Copyright 2008, Michael Ellerman, IBM Corporation.
  7 */
  8
  9#include <asm/types.h>
 10#include <asm/ppc-opcode.h>
 11#include <linux/string.h>
 12#include <linux/kallsyms.h>
 13#include <asm/asm-compat.h>
 14#include <asm/inst.h>
 15
 16/* Flags for create_branch:
 17 * "b"   == create_branch(addr, target, 0);
 18 * "ba"  == create_branch(addr, target, BRANCH_ABSOLUTE);
 19 * "bl"  == create_branch(addr, target, BRANCH_SET_LINK);
 20 * "bla" == create_branch(addr, target, BRANCH_ABSOLUTE | BRANCH_SET_LINK);
 21 */
 22#define BRANCH_SET_LINK	0x1
 23#define BRANCH_ABSOLUTE	0x2
 24
 25/*
 26 * Powerpc branch instruction is :
 27 *
 28 *  0         6                 30   31
 29 *  +---------+----------------+---+---+
 30 *  | opcode  |     LI         |AA |LK |
 31 *  +---------+----------------+---+---+
 32 *  Where AA = 0 and LK = 0
 33 *
 34 * LI is a signed 24 bits integer. The real branch offset is computed
 35 * by: imm32 = SignExtend(LI:'0b00', 32);
 36 *
 37 * So the maximum forward branch should be:
 38 *   (0x007fffff << 2) = 0x01fffffc =  0x1fffffc
 39 * The maximum backward branch should be:
 40 *   (0xff800000 << 2) = 0xfe000000 = -0x2000000
 41 */
 42static inline bool is_offset_in_branch_range(long offset)
 43{
 44	return (offset >= -0x2000000 && offset <= 0x1fffffc && !(offset & 0x3));
 45}
 46
 47static inline bool is_offset_in_cond_branch_range(long offset)
 48{
 49	return offset >= -0x8000 && offset <= 0x7fff && !(offset & 0x3);
 50}
 51
 52static inline int create_branch(ppc_inst_t *instr, const u32 *addr,
 53				unsigned long target, int flags)
 54{
 55	long offset;
 56
 57	*instr = ppc_inst(0);
 58	offset = target;
 59	if (! (flags & BRANCH_ABSOLUTE))
 60		offset = offset - (unsigned long)addr;
 61
 62	/* Check we can represent the target in the instruction format */
 63	if (!is_offset_in_branch_range(offset))
 64		return 1;
 65
 66	/* Mask out the flags and target, so they don't step on each other. */
 67	*instr = ppc_inst(0x48000000 | (flags & 0x3) | (offset & 0x03FFFFFC));
 68
 69	return 0;
 70}
 71
 72int create_cond_branch(ppc_inst_t *instr, const u32 *addr,
 73		       unsigned long target, int flags);
 74int patch_branch(u32 *addr, unsigned long target, int flags);
 75int patch_instruction(u32 *addr, ppc_inst_t instr);
 76int raw_patch_instruction(u32 *addr, ppc_inst_t instr);
 77int patch_instructions(u32 *addr, u32 *code, size_t len, bool repeat_instr);
 78
 79static inline unsigned long patch_site_addr(s32 *site)
 80{
 81	return (unsigned long)site + *site;
 82}
 83
 84static inline int patch_instruction_site(s32 *site, ppc_inst_t instr)
 85{
 86	return patch_instruction((u32 *)patch_site_addr(site), instr);
 87}
 88
 89static inline int patch_branch_site(s32 *site, unsigned long target, int flags)
 90{
 91	return patch_branch((u32 *)patch_site_addr(site), target, flags);
 92}
 93
 94static inline int modify_instruction(unsigned int *addr, unsigned int clr,
 95				     unsigned int set)
 96{
 97	return patch_instruction(addr, ppc_inst((*addr & ~clr) | set));
 98}
 99
100static inline int modify_instruction_site(s32 *site, unsigned int clr, unsigned int set)
101{
102	return modify_instruction((unsigned int *)patch_site_addr(site), clr, set);
103}
104
105static inline unsigned int branch_opcode(ppc_inst_t instr)
106{
107	return ppc_inst_primary_opcode(instr) & 0x3F;
108}
109
110static inline int instr_is_branch_iform(ppc_inst_t instr)
111{
112	return branch_opcode(instr) == 18;
113}
114
115static inline int instr_is_branch_bform(ppc_inst_t instr)
116{
117	return branch_opcode(instr) == 16;
118}
119
120int instr_is_relative_branch(ppc_inst_t instr);
121int instr_is_relative_link_branch(ppc_inst_t instr);
122unsigned long branch_target(const u32 *instr);
123int translate_branch(ppc_inst_t *instr, const u32 *dest, const u32 *src);
124bool is_conditional_branch(ppc_inst_t instr);
125
126#define OP_RT_RA_MASK	0xffff0000UL
127#define LIS_R2		(PPC_RAW_LIS(_R2, 0))
128#define ADDIS_R2_R12	(PPC_RAW_ADDIS(_R2, _R12, 0))
129#define ADDI_R2_R2	(PPC_RAW_ADDI(_R2, _R2, 0))
130
131
132static inline unsigned long ppc_function_entry(void *func)
133{
134#ifdef CONFIG_PPC64_ELF_ABI_V2
135	u32 *insn = func;
136
137	/*
138	 * A PPC64 ABIv2 function may have a local and a global entry
139	 * point. We need to use the local entry point when patching
140	 * functions, so identify and step over the global entry point
141	 * sequence.
142	 *
143	 * The global entry point sequence is always of the form:
144	 *
145	 * addis r2,r12,XXXX
146	 * addi  r2,r2,XXXX
147	 *
148	 * A linker optimisation may convert the addis to lis:
149	 *
150	 * lis   r2,XXXX
151	 * addi  r2,r2,XXXX
152	 */
153	if ((((*insn & OP_RT_RA_MASK) == ADDIS_R2_R12) ||
154	     ((*insn & OP_RT_RA_MASK) == LIS_R2)) &&
155	    ((*(insn+1) & OP_RT_RA_MASK) == ADDI_R2_R2))
156		return (unsigned long)(insn + 2);
157	else
158		return (unsigned long)func;
159#elif defined(CONFIG_PPC64_ELF_ABI_V1)
160	/*
161	 * On PPC64 ABIv1 the function pointer actually points to the
162	 * function's descriptor. The first entry in the descriptor is the
163	 * address of the function text.
164	 */
165	return ((struct func_desc *)func)->addr;
166#else
167	return (unsigned long)func;
168#endif
169}
170
171static inline unsigned long ppc_global_function_entry(void *func)
172{
173#ifdef CONFIG_PPC64_ELF_ABI_V2
174	/* PPC64 ABIv2 the global entry point is at the address */
175	return (unsigned long)func;
176#else
177	/* All other cases there is no change vs ppc_function_entry() */
178	return ppc_function_entry(func);
179#endif
180}
181
182/*
183 * Wrapper around kallsyms_lookup() to return function entry address:
184 * - For ABIv1, we lookup the dot variant.
185 * - For ABIv2, we return the local entry point.
186 */
187static inline unsigned long ppc_kallsyms_lookup_name(const char *name)
188{
189	unsigned long addr;
190#ifdef CONFIG_PPC64_ELF_ABI_V1
191	/* check for dot variant */
192	char dot_name[1 + KSYM_NAME_LEN];
193	bool dot_appended = false;
194
195	if (strnlen(name, KSYM_NAME_LEN) >= KSYM_NAME_LEN)
196		return 0;
197
198	if (name[0] != '.') {
199		dot_name[0] = '.';
200		dot_name[1] = '\0';
201		strlcat(dot_name, name, sizeof(dot_name));
202		dot_appended = true;
203	} else {
204		dot_name[0] = '\0';
205		strlcat(dot_name, name, sizeof(dot_name));
206	}
207	addr = kallsyms_lookup_name(dot_name);
208	if (!addr && dot_appended)
209		/* Let's try the original non-dot symbol lookup	*/
210		addr = kallsyms_lookup_name(name);
211#elif defined(CONFIG_PPC64_ELF_ABI_V2)
212	addr = kallsyms_lookup_name(name);
213	if (addr)
214		addr = ppc_function_entry((void *)addr);
215#else
216	addr = kallsyms_lookup_name(name);
217#endif
218	return addr;
219}
220
221/*
222 * Some instruction encodings commonly used in dynamic ftracing
223 * and function live patching.
224 */
225
226/* This must match the definition of STK_GOT in <asm/ppc_asm.h> */
227#ifdef CONFIG_PPC64_ELF_ABI_V2
228#define R2_STACK_OFFSET         24
229#else
230#define R2_STACK_OFFSET         40
231#endif
232
233#define PPC_INST_LD_TOC		PPC_RAW_LD(_R2, _R1, R2_STACK_OFFSET)
234
235/* usually preceded by a mflr r0 */
236#define PPC_INST_STD_LR		PPC_RAW_STD(_R0, _R1, PPC_LR_STKOFF)
237
238#endif /* _ASM_POWERPC_CODE_PATCHING_H */
v6.2
  1/* SPDX-License-Identifier: GPL-2.0-or-later */
  2#ifndef _ASM_POWERPC_CODE_PATCHING_H
  3#define _ASM_POWERPC_CODE_PATCHING_H
  4
  5/*
  6 * Copyright 2008, Michael Ellerman, IBM Corporation.
  7 */
  8
  9#include <asm/types.h>
 10#include <asm/ppc-opcode.h>
 11#include <linux/string.h>
 12#include <linux/kallsyms.h>
 13#include <asm/asm-compat.h>
 14#include <asm/inst.h>
 15
 16/* Flags for create_branch:
 17 * "b"   == create_branch(addr, target, 0);
 18 * "ba"  == create_branch(addr, target, BRANCH_ABSOLUTE);
 19 * "bl"  == create_branch(addr, target, BRANCH_SET_LINK);
 20 * "bla" == create_branch(addr, target, BRANCH_ABSOLUTE | BRANCH_SET_LINK);
 21 */
 22#define BRANCH_SET_LINK	0x1
 23#define BRANCH_ABSOLUTE	0x2
 24
 25/*
 26 * Powerpc branch instruction is :
 27 *
 28 *  0         6                 30   31
 29 *  +---------+----------------+---+---+
 30 *  | opcode  |     LI         |AA |LK |
 31 *  +---------+----------------+---+---+
 32 *  Where AA = 0 and LK = 0
 33 *
 34 * LI is a signed 24 bits integer. The real branch offset is computed
 35 * by: imm32 = SignExtend(LI:'0b00', 32);
 36 *
 37 * So the maximum forward branch should be:
 38 *   (0x007fffff << 2) = 0x01fffffc =  0x1fffffc
 39 * The maximum backward branch should be:
 40 *   (0xff800000 << 2) = 0xfe000000 = -0x2000000
 41 */
 42static inline bool is_offset_in_branch_range(long offset)
 43{
 44	return (offset >= -0x2000000 && offset <= 0x1fffffc && !(offset & 0x3));
 45}
 46
 47static inline bool is_offset_in_cond_branch_range(long offset)
 48{
 49	return offset >= -0x8000 && offset <= 0x7fff && !(offset & 0x3);
 50}
 51
 52static inline int create_branch(ppc_inst_t *instr, const u32 *addr,
 53				unsigned long target, int flags)
 54{
 55	long offset;
 56
 57	*instr = ppc_inst(0);
 58	offset = target;
 59	if (! (flags & BRANCH_ABSOLUTE))
 60		offset = offset - (unsigned long)addr;
 61
 62	/* Check we can represent the target in the instruction format */
 63	if (!is_offset_in_branch_range(offset))
 64		return 1;
 65
 66	/* Mask out the flags and target, so they don't step on each other. */
 67	*instr = ppc_inst(0x48000000 | (flags & 0x3) | (offset & 0x03FFFFFC));
 68
 69	return 0;
 70}
 71
 72int create_cond_branch(ppc_inst_t *instr, const u32 *addr,
 73		       unsigned long target, int flags);
 74int patch_branch(u32 *addr, unsigned long target, int flags);
 75int patch_instruction(u32 *addr, ppc_inst_t instr);
 76int raw_patch_instruction(u32 *addr, ppc_inst_t instr);
 
 77
 78static inline unsigned long patch_site_addr(s32 *site)
 79{
 80	return (unsigned long)site + *site;
 81}
 82
 83static inline int patch_instruction_site(s32 *site, ppc_inst_t instr)
 84{
 85	return patch_instruction((u32 *)patch_site_addr(site), instr);
 86}
 87
 88static inline int patch_branch_site(s32 *site, unsigned long target, int flags)
 89{
 90	return patch_branch((u32 *)patch_site_addr(site), target, flags);
 91}
 92
 93static inline int modify_instruction(unsigned int *addr, unsigned int clr,
 94				     unsigned int set)
 95{
 96	return patch_instruction(addr, ppc_inst((*addr & ~clr) | set));
 97}
 98
 99static inline int modify_instruction_site(s32 *site, unsigned int clr, unsigned int set)
100{
101	return modify_instruction((unsigned int *)patch_site_addr(site), clr, set);
102}
103
104static inline unsigned int branch_opcode(ppc_inst_t instr)
105{
106	return ppc_inst_primary_opcode(instr) & 0x3F;
107}
108
109static inline int instr_is_branch_iform(ppc_inst_t instr)
110{
111	return branch_opcode(instr) == 18;
112}
113
114static inline int instr_is_branch_bform(ppc_inst_t instr)
115{
116	return branch_opcode(instr) == 16;
117}
118
119int instr_is_relative_branch(ppc_inst_t instr);
120int instr_is_relative_link_branch(ppc_inst_t instr);
121unsigned long branch_target(const u32 *instr);
122int translate_branch(ppc_inst_t *instr, const u32 *dest, const u32 *src);
123bool is_conditional_branch(ppc_inst_t instr);
124
125#define OP_RT_RA_MASK	0xffff0000UL
126#define LIS_R2		(PPC_RAW_LIS(_R2, 0))
127#define ADDIS_R2_R12	(PPC_RAW_ADDIS(_R2, _R12, 0))
128#define ADDI_R2_R2	(PPC_RAW_ADDI(_R2, _R2, 0))
129
130
131static inline unsigned long ppc_function_entry(void *func)
132{
133#ifdef CONFIG_PPC64_ELF_ABI_V2
134	u32 *insn = func;
135
136	/*
137	 * A PPC64 ABIv2 function may have a local and a global entry
138	 * point. We need to use the local entry point when patching
139	 * functions, so identify and step over the global entry point
140	 * sequence.
141	 *
142	 * The global entry point sequence is always of the form:
143	 *
144	 * addis r2,r12,XXXX
145	 * addi  r2,r2,XXXX
146	 *
147	 * A linker optimisation may convert the addis to lis:
148	 *
149	 * lis   r2,XXXX
150	 * addi  r2,r2,XXXX
151	 */
152	if ((((*insn & OP_RT_RA_MASK) == ADDIS_R2_R12) ||
153	     ((*insn & OP_RT_RA_MASK) == LIS_R2)) &&
154	    ((*(insn+1) & OP_RT_RA_MASK) == ADDI_R2_R2))
155		return (unsigned long)(insn + 2);
156	else
157		return (unsigned long)func;
158#elif defined(CONFIG_PPC64_ELF_ABI_V1)
159	/*
160	 * On PPC64 ABIv1 the function pointer actually points to the
161	 * function's descriptor. The first entry in the descriptor is the
162	 * address of the function text.
163	 */
164	return ((struct func_desc *)func)->addr;
165#else
166	return (unsigned long)func;
167#endif
168}
169
170static inline unsigned long ppc_global_function_entry(void *func)
171{
172#ifdef CONFIG_PPC64_ELF_ABI_V2
173	/* PPC64 ABIv2 the global entry point is at the address */
174	return (unsigned long)func;
175#else
176	/* All other cases there is no change vs ppc_function_entry() */
177	return ppc_function_entry(func);
178#endif
179}
180
181/*
182 * Wrapper around kallsyms_lookup() to return function entry address:
183 * - For ABIv1, we lookup the dot variant.
184 * - For ABIv2, we return the local entry point.
185 */
186static inline unsigned long ppc_kallsyms_lookup_name(const char *name)
187{
188	unsigned long addr;
189#ifdef CONFIG_PPC64_ELF_ABI_V1
190	/* check for dot variant */
191	char dot_name[1 + KSYM_NAME_LEN];
192	bool dot_appended = false;
193
194	if (strnlen(name, KSYM_NAME_LEN) >= KSYM_NAME_LEN)
195		return 0;
196
197	if (name[0] != '.') {
198		dot_name[0] = '.';
199		dot_name[1] = '\0';
200		strlcat(dot_name, name, sizeof(dot_name));
201		dot_appended = true;
202	} else {
203		dot_name[0] = '\0';
204		strlcat(dot_name, name, sizeof(dot_name));
205	}
206	addr = kallsyms_lookup_name(dot_name);
207	if (!addr && dot_appended)
208		/* Let's try the original non-dot symbol lookup	*/
209		addr = kallsyms_lookup_name(name);
210#elif defined(CONFIG_PPC64_ELF_ABI_V2)
211	addr = kallsyms_lookup_name(name);
212	if (addr)
213		addr = ppc_function_entry((void *)addr);
214#else
215	addr = kallsyms_lookup_name(name);
216#endif
217	return addr;
218}
219
220/*
221 * Some instruction encodings commonly used in dynamic ftracing
222 * and function live patching.
223 */
224
225/* This must match the definition of STK_GOT in <asm/ppc_asm.h> */
226#ifdef CONFIG_PPC64_ELF_ABI_V2
227#define R2_STACK_OFFSET         24
228#else
229#define R2_STACK_OFFSET         40
230#endif
231
232#define PPC_INST_LD_TOC		PPC_RAW_LD(_R2, _R1, R2_STACK_OFFSET)
233
234/* usually preceded by a mflr r0 */
235#define PPC_INST_STD_LR		PPC_RAW_STD(_R0, _R1, PPC_LR_STKOFF)
236
237#endif /* _ASM_POWERPC_CODE_PATCHING_H */