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1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2023 Intel Corporation
4 */
5
6#ifndef __INTEL_LINK_BW_H__
7#define __INTEL_LINK_BW_H__
8
9#include <linux/types.h>
10
11#include "intel_display_limits.h"
12
13struct drm_i915_private;
14
15struct intel_atomic_state;
16struct intel_crtc_state;
17
18struct intel_link_bw_limits {
19 u8 force_fec_pipes;
20 u8 bpp_limit_reached_pipes;
21 /* in 1/16 bpp units */
22 int max_bpp_x16[I915_MAX_PIPES];
23};
24
25void intel_link_bw_init_limits(struct intel_atomic_state *state,
26 struct intel_link_bw_limits *limits);
27int intel_link_bw_reduce_bpp(struct intel_atomic_state *state,
28 struct intel_link_bw_limits *limits,
29 u8 pipe_mask,
30 const char *reason);
31bool intel_link_bw_set_bpp_limit_for_pipe(struct intel_atomic_state *state,
32 const struct intel_link_bw_limits *old_limits,
33 struct intel_link_bw_limits *new_limits,
34 enum pipe pipe);
35int intel_link_bw_atomic_check(struct intel_atomic_state *state,
36 struct intel_link_bw_limits *new_limits);
37
38#endif
1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2023 Intel Corporation
4 */
5
6#ifndef __INTEL_LINK_BW_H__
7#define __INTEL_LINK_BW_H__
8
9#include <linux/types.h>
10
11#include "intel_display_limits.h"
12
13struct intel_atomic_state;
14struct intel_crtc_state;
15
16struct intel_link_bw_limits {
17 u8 force_fec_pipes;
18 u8 bpp_limit_reached_pipes;
19 /* in 1/16 bpp units */
20 int max_bpp_x16[I915_MAX_PIPES];
21};
22
23void intel_link_bw_init_limits(struct intel_atomic_state *state,
24 struct intel_link_bw_limits *limits);
25int intel_link_bw_reduce_bpp(struct intel_atomic_state *state,
26 struct intel_link_bw_limits *limits,
27 u8 pipe_mask,
28 const char *reason);
29bool intel_link_bw_set_bpp_limit_for_pipe(struct intel_atomic_state *state,
30 const struct intel_link_bw_limits *old_limits,
31 struct intel_link_bw_limits *new_limits,
32 enum pipe pipe);
33int intel_link_bw_atomic_check(struct intel_atomic_state *state,
34 struct intel_link_bw_limits *new_limits);
35
36#endif