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v6.9.4
  1/**************************************************************************
  2
  3Copyright © 2006 Dave Airlie
  4
  5All Rights Reserved.
  6
  7Permission is hereby granted, free of charge, to any person obtaining a
  8copy of this software and associated documentation files (the
  9"Software"), to deal in the Software without restriction, including
 10without limitation the rights to use, copy, modify, merge, publish,
 11distribute, sub license, and/or sell copies of the Software, and to
 12permit persons to whom the Software is furnished to do so, subject to
 13the following conditions:
 14
 15The above copyright notice and this permission notice (including the
 16next paragraph) shall be included in all copies or substantial portions
 17of the Software.
 18
 19THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 20OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 21MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
 22IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 23ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
 24TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 25SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 26
 27**************************************************************************/
 28
 29#include "intel_display_types.h"
 30#include "intel_dvo_dev.h"
 31
 32#define SIL164_VID 0x0001
 33#define SIL164_DID 0x0006
 34
 35#define SIL164_VID_LO 0x00
 36#define SIL164_VID_HI 0x01
 37#define SIL164_DID_LO 0x02
 38#define SIL164_DID_HI 0x03
 39#define SIL164_REV    0x04
 40#define SIL164_RSVD   0x05
 41#define SIL164_FREQ_LO 0x06
 42#define SIL164_FREQ_HI 0x07
 43
 44#define SIL164_REG8 0x08
 45#define SIL164_8_VEN (1<<5)
 46#define SIL164_8_HEN (1<<4)
 47#define SIL164_8_DSEL (1<<3)
 48#define SIL164_8_BSEL (1<<2)
 49#define SIL164_8_EDGE (1<<1)
 50#define SIL164_8_PD   (1<<0)
 51
 52#define SIL164_REG9 0x09
 53#define SIL164_9_VLOW (1<<7)
 54#define SIL164_9_MSEL_MASK (0x7<<4)
 55#define SIL164_9_TSEL (1<<3)
 56#define SIL164_9_RSEN (1<<2)
 57#define SIL164_9_HTPLG (1<<1)
 58#define SIL164_9_MDI (1<<0)
 59
 60#define SIL164_REGC 0x0c
 61#define SIL164_C_SCNT (1<<7)
 62#define SIL164_C_PLLF_MASK (0xf<<1)
 63#define SIL164_C_PLLF_REC (4<<1)
 64#define SIL164_C_PFEN (1<<0)
 65
 66struct sil164_priv {
 67	//I2CDevRec d;
 68	bool quiet;
 69};
 70
 71#define SILPTR(d) ((SIL164Ptr)(d->DriverPrivate.ptr))
 72
 73static bool sil164_readb(struct intel_dvo_device *dvo, int addr, u8 *ch)
 74{
 75	struct sil164_priv *sil = dvo->dev_priv;
 76	struct i2c_adapter *adapter = dvo->i2c_bus;
 77	u8 out_buf[2];
 78	u8 in_buf[2];
 79
 80	struct i2c_msg msgs[] = {
 81		{
 82			.addr = dvo->slave_addr,
 83			.flags = 0,
 84			.len = 1,
 85			.buf = out_buf,
 86		},
 87		{
 88			.addr = dvo->slave_addr,
 89			.flags = I2C_M_RD,
 90			.len = 1,
 91			.buf = in_buf,
 92		}
 93	};
 94
 95	out_buf[0] = addr;
 96	out_buf[1] = 0;
 97
 98	if (i2c_transfer(adapter, msgs, 2) == 2) {
 99		*ch = in_buf[0];
100		return true;
101	}
102
103	if (!sil->quiet) {
104		DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
105			  addr, adapter->name, dvo->slave_addr);
106	}
107	return false;
108}
109
110static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, u8 ch)
111{
112	struct sil164_priv *sil = dvo->dev_priv;
113	struct i2c_adapter *adapter = dvo->i2c_bus;
114	u8 out_buf[2];
115	struct i2c_msg msg = {
116		.addr = dvo->slave_addr,
117		.flags = 0,
118		.len = 2,
119		.buf = out_buf,
120	};
121
122	out_buf[0] = addr;
123	out_buf[1] = ch;
124
125	if (i2c_transfer(adapter, &msg, 1) == 1)
126		return true;
127
128	if (!sil->quiet) {
129		DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
130			  addr, adapter->name, dvo->slave_addr);
131	}
132
133	return false;
134}
135
136/* Silicon Image 164 driver for chip on i2c bus */
137static bool sil164_init(struct intel_dvo_device *dvo,
138			struct i2c_adapter *adapter)
139{
140	/* this will detect the SIL164 chip on the specified i2c bus */
141	struct sil164_priv *sil;
142	unsigned char ch;
143
144	sil = kzalloc(sizeof(*sil), GFP_KERNEL);
145	if (sil == NULL)
146		return false;
147
148	dvo->i2c_bus = adapter;
149	dvo->dev_priv = sil;
150	sil->quiet = true;
151
152	if (!sil164_readb(dvo, SIL164_VID_LO, &ch))
153		goto out;
154
155	if (ch != (SIL164_VID & 0xff)) {
156		DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
157			  ch, adapter->name, dvo->slave_addr);
158		goto out;
159	}
160
161	if (!sil164_readb(dvo, SIL164_DID_LO, &ch))
162		goto out;
163
164	if (ch != (SIL164_DID & 0xff)) {
165		DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
166			  ch, adapter->name, dvo->slave_addr);
167		goto out;
168	}
169	sil->quiet = false;
170
171	DRM_DEBUG_KMS("init sil164 dvo controller successfully!\n");
172	return true;
173
174out:
175	kfree(sil);
176	return false;
177}
178
179static enum drm_connector_status sil164_detect(struct intel_dvo_device *dvo)
180{
181	u8 reg9;
182
183	sil164_readb(dvo, SIL164_REG9, &reg9);
184
185	if (reg9 & SIL164_9_HTPLG)
186		return connector_status_connected;
187	else
188		return connector_status_disconnected;
189}
190
191static enum drm_mode_status sil164_mode_valid(struct intel_dvo_device *dvo,
192					      struct drm_display_mode *mode)
193{
194	return MODE_OK;
195}
196
197static void sil164_mode_set(struct intel_dvo_device *dvo,
198			    const struct drm_display_mode *mode,
199			    const struct drm_display_mode *adjusted_mode)
200{
201	/* As long as the basics are set up, since we don't have clock
202	 * dependencies in the mode setup, we can just leave the
203	 * registers alone and everything will work fine.
204	 */
205	/* recommended programming sequence from doc */
206	/*sil164_writeb(sil, 0x08, 0x30);
207	  sil164_writeb(sil, 0x09, 0x00);
208	  sil164_writeb(sil, 0x0a, 0x90);
209	  sil164_writeb(sil, 0x0c, 0x89);
210	  sil164_writeb(sil, 0x08, 0x31);*/
211	/* don't do much */
212
213	sil164_writeb(dvo, SIL164_REG8,
214		      SIL164_8_VEN | SIL164_8_HEN);
215	sil164_writeb(dvo, SIL164_REG9,
216		      SIL164_9_TSEL);
217	sil164_writeb(dvo, SIL164_REGC,
218		      SIL164_C_PLLF_REC | SIL164_C_PFEN);
219}
220
221/* set the SIL164 power state */
222static void sil164_dpms(struct intel_dvo_device *dvo, bool enable)
223{
224	int ret;
225	unsigned char ch;
226
227	ret = sil164_readb(dvo, SIL164_REG8, &ch);
228	if (ret == false)
229		return;
230
231	if (enable)
232		ch |= SIL164_8_PD;
233	else
234		ch &= ~SIL164_8_PD;
235
236	sil164_writeb(dvo, SIL164_REG8, ch);
 
237}
238
239static bool sil164_get_hw_state(struct intel_dvo_device *dvo)
240{
241	int ret;
242	unsigned char ch;
243
244	ret = sil164_readb(dvo, SIL164_REG8, &ch);
245	if (ret == false)
246		return false;
247
248	if (ch & SIL164_8_PD)
249		return true;
250	else
251		return false;
252}
253
254static void sil164_dump_regs(struct intel_dvo_device *dvo)
255{
256	u8 val;
257
258	sil164_readb(dvo, SIL164_FREQ_LO, &val);
259	DRM_DEBUG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
260	sil164_readb(dvo, SIL164_FREQ_HI, &val);
261	DRM_DEBUG_KMS("SIL164_FREQ_HI: 0x%02x\n", val);
262	sil164_readb(dvo, SIL164_REG8, &val);
263	DRM_DEBUG_KMS("SIL164_REG8: 0x%02x\n", val);
264	sil164_readb(dvo, SIL164_REG9, &val);
265	DRM_DEBUG_KMS("SIL164_REG9: 0x%02x\n", val);
266	sil164_readb(dvo, SIL164_REGC, &val);
267	DRM_DEBUG_KMS("SIL164_REGC: 0x%02x\n", val);
268}
269
270static void sil164_destroy(struct intel_dvo_device *dvo)
271{
272	struct sil164_priv *sil = dvo->dev_priv;
273
274	if (sil) {
275		kfree(sil);
276		dvo->dev_priv = NULL;
277	}
278}
279
280const struct intel_dvo_dev_ops sil164_ops = {
281	.init = sil164_init,
282	.detect = sil164_detect,
283	.mode_valid = sil164_mode_valid,
284	.mode_set = sil164_mode_set,
285	.dpms = sil164_dpms,
286	.get_hw_state = sil164_get_hw_state,
287	.dump_regs = sil164_dump_regs,
288	.destroy = sil164_destroy,
289};
v5.9
  1/**************************************************************************
  2
  3Copyright © 2006 Dave Airlie
  4
  5All Rights Reserved.
  6
  7Permission is hereby granted, free of charge, to any person obtaining a
  8copy of this software and associated documentation files (the
  9"Software"), to deal in the Software without restriction, including
 10without limitation the rights to use, copy, modify, merge, publish,
 11distribute, sub license, and/or sell copies of the Software, and to
 12permit persons to whom the Software is furnished to do so, subject to
 13the following conditions:
 14
 15The above copyright notice and this permission notice (including the
 16next paragraph) shall be included in all copies or substantial portions
 17of the Software.
 18
 19THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 20OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 21MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
 22IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 23ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
 24TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 25SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 26
 27**************************************************************************/
 28
 29#include "intel_display_types.h"
 30#include "intel_dvo_dev.h"
 31
 32#define SIL164_VID 0x0001
 33#define SIL164_DID 0x0006
 34
 35#define SIL164_VID_LO 0x00
 36#define SIL164_VID_HI 0x01
 37#define SIL164_DID_LO 0x02
 38#define SIL164_DID_HI 0x03
 39#define SIL164_REV    0x04
 40#define SIL164_RSVD   0x05
 41#define SIL164_FREQ_LO 0x06
 42#define SIL164_FREQ_HI 0x07
 43
 44#define SIL164_REG8 0x08
 45#define SIL164_8_VEN (1<<5)
 46#define SIL164_8_HEN (1<<4)
 47#define SIL164_8_DSEL (1<<3)
 48#define SIL164_8_BSEL (1<<2)
 49#define SIL164_8_EDGE (1<<1)
 50#define SIL164_8_PD   (1<<0)
 51
 52#define SIL164_REG9 0x09
 53#define SIL164_9_VLOW (1<<7)
 54#define SIL164_9_MSEL_MASK (0x7<<4)
 55#define SIL164_9_TSEL (1<<3)
 56#define SIL164_9_RSEN (1<<2)
 57#define SIL164_9_HTPLG (1<<1)
 58#define SIL164_9_MDI (1<<0)
 59
 60#define SIL164_REGC 0x0c
 
 
 
 
 61
 62struct sil164_priv {
 63	//I2CDevRec d;
 64	bool quiet;
 65};
 66
 67#define SILPTR(d) ((SIL164Ptr)(d->DriverPrivate.ptr))
 68
 69static bool sil164_readb(struct intel_dvo_device *dvo, int addr, u8 *ch)
 70{
 71	struct sil164_priv *sil = dvo->dev_priv;
 72	struct i2c_adapter *adapter = dvo->i2c_bus;
 73	u8 out_buf[2];
 74	u8 in_buf[2];
 75
 76	struct i2c_msg msgs[] = {
 77		{
 78			.addr = dvo->slave_addr,
 79			.flags = 0,
 80			.len = 1,
 81			.buf = out_buf,
 82		},
 83		{
 84			.addr = dvo->slave_addr,
 85			.flags = I2C_M_RD,
 86			.len = 1,
 87			.buf = in_buf,
 88		}
 89	};
 90
 91	out_buf[0] = addr;
 92	out_buf[1] = 0;
 93
 94	if (i2c_transfer(adapter, msgs, 2) == 2) {
 95		*ch = in_buf[0];
 96		return true;
 97	}
 98
 99	if (!sil->quiet) {
100		DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
101			  addr, adapter->name, dvo->slave_addr);
102	}
103	return false;
104}
105
106static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, u8 ch)
107{
108	struct sil164_priv *sil = dvo->dev_priv;
109	struct i2c_adapter *adapter = dvo->i2c_bus;
110	u8 out_buf[2];
111	struct i2c_msg msg = {
112		.addr = dvo->slave_addr,
113		.flags = 0,
114		.len = 2,
115		.buf = out_buf,
116	};
117
118	out_buf[0] = addr;
119	out_buf[1] = ch;
120
121	if (i2c_transfer(adapter, &msg, 1) == 1)
122		return true;
123
124	if (!sil->quiet) {
125		DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
126			  addr, adapter->name, dvo->slave_addr);
127	}
128
129	return false;
130}
131
132/* Silicon Image 164 driver for chip on i2c bus */
133static bool sil164_init(struct intel_dvo_device *dvo,
134			struct i2c_adapter *adapter)
135{
136	/* this will detect the SIL164 chip on the specified i2c bus */
137	struct sil164_priv *sil;
138	unsigned char ch;
139
140	sil = kzalloc(sizeof(struct sil164_priv), GFP_KERNEL);
141	if (sil == NULL)
142		return false;
143
144	dvo->i2c_bus = adapter;
145	dvo->dev_priv = sil;
146	sil->quiet = true;
147
148	if (!sil164_readb(dvo, SIL164_VID_LO, &ch))
149		goto out;
150
151	if (ch != (SIL164_VID & 0xff)) {
152		DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
153			  ch, adapter->name, dvo->slave_addr);
154		goto out;
155	}
156
157	if (!sil164_readb(dvo, SIL164_DID_LO, &ch))
158		goto out;
159
160	if (ch != (SIL164_DID & 0xff)) {
161		DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
162			  ch, adapter->name, dvo->slave_addr);
163		goto out;
164	}
165	sil->quiet = false;
166
167	DRM_DEBUG_KMS("init sil164 dvo controller successfully!\n");
168	return true;
169
170out:
171	kfree(sil);
172	return false;
173}
174
175static enum drm_connector_status sil164_detect(struct intel_dvo_device *dvo)
176{
177	u8 reg9;
178
179	sil164_readb(dvo, SIL164_REG9, &reg9);
180
181	if (reg9 & SIL164_9_HTPLG)
182		return connector_status_connected;
183	else
184		return connector_status_disconnected;
185}
186
187static enum drm_mode_status sil164_mode_valid(struct intel_dvo_device *dvo,
188					      struct drm_display_mode *mode)
189{
190	return MODE_OK;
191}
192
193static void sil164_mode_set(struct intel_dvo_device *dvo,
194			    const struct drm_display_mode *mode,
195			    const struct drm_display_mode *adjusted_mode)
196{
197	/* As long as the basics are set up, since we don't have clock
198	 * dependencies in the mode setup, we can just leave the
199	 * registers alone and everything will work fine.
200	 */
201	/* recommended programming sequence from doc */
202	/*sil164_writeb(sil, 0x08, 0x30);
203	  sil164_writeb(sil, 0x09, 0x00);
204	  sil164_writeb(sil, 0x0a, 0x90);
205	  sil164_writeb(sil, 0x0c, 0x89);
206	  sil164_writeb(sil, 0x08, 0x31);*/
207	/* don't do much */
208	return;
 
 
 
 
 
 
209}
210
211/* set the SIL164 power state */
212static void sil164_dpms(struct intel_dvo_device *dvo, bool enable)
213{
214	int ret;
215	unsigned char ch;
216
217	ret = sil164_readb(dvo, SIL164_REG8, &ch);
218	if (ret == false)
219		return;
220
221	if (enable)
222		ch |= SIL164_8_PD;
223	else
224		ch &= ~SIL164_8_PD;
225
226	sil164_writeb(dvo, SIL164_REG8, ch);
227	return;
228}
229
230static bool sil164_get_hw_state(struct intel_dvo_device *dvo)
231{
232	int ret;
233	unsigned char ch;
234
235	ret = sil164_readb(dvo, SIL164_REG8, &ch);
236	if (ret == false)
237		return false;
238
239	if (ch & SIL164_8_PD)
240		return true;
241	else
242		return false;
243}
244
245static void sil164_dump_regs(struct intel_dvo_device *dvo)
246{
247	u8 val;
248
249	sil164_readb(dvo, SIL164_FREQ_LO, &val);
250	DRM_DEBUG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
251	sil164_readb(dvo, SIL164_FREQ_HI, &val);
252	DRM_DEBUG_KMS("SIL164_FREQ_HI: 0x%02x\n", val);
253	sil164_readb(dvo, SIL164_REG8, &val);
254	DRM_DEBUG_KMS("SIL164_REG8: 0x%02x\n", val);
255	sil164_readb(dvo, SIL164_REG9, &val);
256	DRM_DEBUG_KMS("SIL164_REG9: 0x%02x\n", val);
257	sil164_readb(dvo, SIL164_REGC, &val);
258	DRM_DEBUG_KMS("SIL164_REGC: 0x%02x\n", val);
259}
260
261static void sil164_destroy(struct intel_dvo_device *dvo)
262{
263	struct sil164_priv *sil = dvo->dev_priv;
264
265	if (sil) {
266		kfree(sil);
267		dvo->dev_priv = NULL;
268	}
269}
270
271const struct intel_dvo_dev_ops sil164_ops = {
272	.init = sil164_init,
273	.detect = sil164_detect,
274	.mode_valid = sil164_mode_valid,
275	.mode_set = sil164_mode_set,
276	.dpms = sil164_dpms,
277	.get_hw_state = sil164_get_hw_state,
278	.dump_regs = sil164_dump_regs,
279	.destroy = sil164_destroy,
280};