1/*
 2 * Copyright 2014 Advanced Micro Devices, Inc.
 3 *
 4 * Permission is hereby granted, free of charge, to any person obtaining a
 5 * copy of this software and associated documentation files (the "Software"),
 6 * to deal in the Software without restriction, including without limitation
 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 8 * and/or sell copies of the Software, and to permit persons to whom the
 9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef __AMDGPU_PM_H__
25#define __AMDGPU_PM_H__
26
27struct cg_flag_name {
28	u64 flag;
29	const char *name;
30};
31
32enum amdgpu_device_attr_flags {
33	ATTR_FLAG_BASIC = (1 << 0),
34	ATTR_FLAG_ONEVF = (1 << 16),
35};
36
37#define ATTR_FLAG_TYPE_MASK	(0x0000ffff)
38#define ATTR_FLAG_MODE_MASK	(0xffff0000)
39#define ATTR_FLAG_MASK_ALL	(0xffffffff)
40
41enum amdgpu_device_attr_states {
42	ATTR_STATE_UNSUPPORTED = 0,
43	ATTR_STATE_SUPPORTED,
44};
45
46struct amdgpu_device_attr {
47	struct device_attribute dev_attr;
48	enum amdgpu_device_attr_flags flags;
49	int (*attr_update)(struct amdgpu_device *adev, struct amdgpu_device_attr *attr,
50			   uint32_t mask, enum amdgpu_device_attr_states *states);
51
52};
53
54struct amdgpu_device_attr_entry {
55	struct list_head entry;
56	struct amdgpu_device_attr *attr;
57};
58
59#define to_amdgpu_device_attr(_dev_attr) \
60	container_of(_dev_attr, struct amdgpu_device_attr, dev_attr)
61
62#define __AMDGPU_DEVICE_ATTR(_name, _mode, _show, _store, _flags, ...)	\
63	{ .dev_attr = __ATTR(_name, _mode, _show, _store),		\
64	  .flags = _flags,						\
65	  ##__VA_ARGS__, }
66
67#define AMDGPU_DEVICE_ATTR(_name, _mode, _flags, ...)			\
68	__AMDGPU_DEVICE_ATTR(_name, _mode,				\
69			     amdgpu_get_##_name, amdgpu_set_##_name,	\
70			     _flags, ##__VA_ARGS__)
71
72#define AMDGPU_DEVICE_ATTR_RW(_name, _flags, ...)			\
73	AMDGPU_DEVICE_ATTR(_name, S_IRUGO | S_IWUSR,			\
74			   _flags, ##__VA_ARGS__)
75
76#define AMDGPU_DEVICE_ATTR_RO(_name, _flags, ...)			\
77	__AMDGPU_DEVICE_ATTR(_name, S_IRUGO,				\
78			     amdgpu_get_##_name, NULL,			\
79			     _flags, ##__VA_ARGS__)
80
81int amdgpu_pm_sysfs_init(struct amdgpu_device *adev);
82int amdgpu_pm_virt_sysfs_init(struct amdgpu_device *adev);
83void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev);
84void amdgpu_pm_virt_sysfs_fini(struct amdgpu_device *adev);
85
86void amdgpu_debugfs_pm_init(struct amdgpu_device *adev);
87
88#endif