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1/*
2 * Copyright 2012-14 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef DC_LINK_H_
27#define DC_LINK_H_
28
29#include "dc.h"
30#include "dc_types.h"
31#include "grph_object_defs.h"
32
33enum dc_link_fec_state {
34 dc_link_fec_not_ready,
35 dc_link_fec_ready,
36 dc_link_fec_enabled
37};
38struct dc_link_status {
39 bool link_active;
40 struct dpcd_caps *dpcd_caps;
41};
42
43/* DP MST stream allocation (payload bandwidth number) */
44struct link_mst_stream_allocation {
45 /* DIG front */
46 const struct stream_encoder *stream_enc;
47 /* associate DRM payload table with DC stream encoder */
48 uint8_t vcp_id;
49 /* number of slots required for the DP stream in transport packet */
50 uint8_t slot_count;
51};
52
53/* DP MST stream allocation table */
54struct link_mst_stream_allocation_table {
55 /* number of DP video streams */
56 int stream_count;
57 /* array of stream allocations */
58 struct link_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM];
59};
60
61struct time_stamp {
62 uint64_t edp_poweroff;
63 uint64_t edp_poweron;
64};
65
66struct link_trace {
67 struct time_stamp time_stamp;
68};
69
70/* PSR feature flags */
71struct psr_settings {
72 bool psr_feature_enabled; // PSR is supported by sink
73 bool psr_allow_active; // PSR is currently active
74 enum dc_psr_version psr_version; // Internal PSR version, determined based on DPCD
75
76 /* These parameters are calculated in Driver,
77 * based on display timing and Sink capabilities.
78 * If VBLANK region is too small and Sink takes a long time
79 * to set up RFB, it may take an extra frame to enter PSR state.
80 */
81 bool psr_frame_capture_indication_req;
82 unsigned int psr_sdp_transmit_line_num_deadline;
83};
84
85/*
86 * A link contains one or more sinks and their connected status.
87 * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
88 */
89struct dc_link {
90 struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
91 unsigned int sink_count;
92 struct dc_sink *local_sink;
93 unsigned int link_index;
94 enum dc_connection_type type;
95 enum signal_type connector_signal;
96 enum dc_irq_source irq_source_hpd;
97 enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse */
98 bool is_hpd_filter_disabled;
99 bool dp_ss_off;
100 bool link_state_valid;
101 bool aux_access_disabled;
102 bool sync_lt_in_progress;
103 bool lttpr_non_transparent_mode;
104
105 /* caps is the same as reported_link_cap. link_traing use
106 * reported_link_cap. Will clean up. TODO
107 */
108 struct dc_link_settings reported_link_cap;
109 struct dc_link_settings verified_link_cap;
110 struct dc_link_settings cur_link_settings;
111 struct dc_lane_settings cur_lane_setting;
112 struct dc_link_settings preferred_link_setting;
113 struct dc_link_training_overrides preferred_training_settings;
114 struct dp_audio_test_data audio_test_data;
115
116 uint8_t ddc_hw_inst;
117
118 uint8_t hpd_src;
119
120 uint8_t link_enc_hw_inst;
121
122 bool test_pattern_enabled;
123 union compliance_test_state compliance_test_state;
124
125 void *priv;
126
127 struct ddc_service *ddc;
128
129 bool aux_mode;
130
131 /* Private to DC core */
132
133 const struct dc *dc;
134
135 struct dc_context *ctx;
136
137 struct panel_cntl *panel_cntl;
138 struct link_encoder *link_enc;
139 struct graphics_object_id link_id;
140 union ddi_channel_mapping ddi_channel_mapping;
141 struct connector_device_tag_info device_tag;
142 struct dpcd_caps dpcd_caps;
143 uint32_t dongle_max_pix_clk;
144 unsigned short chip_caps;
145 unsigned int dpcd_sink_count;
146#if defined(CONFIG_DRM_AMD_DC_HDCP)
147 struct hdcp_caps hdcp_caps;
148#endif
149 enum edp_revision edp_revision;
150 union dpcd_sink_ext_caps dpcd_sink_ext_caps;
151
152 struct psr_settings psr_settings;
153
154 /* MST record stream using this link */
155 struct link_flags {
156 bool dp_keep_receiver_powered;
157 bool dp_skip_DID2;
158 bool dp_skip_reset_segment;
159 } wa_flags;
160 struct link_mst_stream_allocation_table mst_stream_alloc_table;
161
162 struct dc_link_status link_status;
163
164 struct link_trace link_trace;
165 struct gpio *hpd_gpio;
166 enum dc_link_fec_state fec_state;
167};
168
169const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
170
171/**
172 * dc_get_link_at_index() - Return an enumerated dc_link.
173 *
174 * dc_link order is constant and determined at
175 * boot time. They cannot be created or destroyed.
176 * Use dc_get_caps() to get number of links.
177 */
178static inline struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index)
179{
180 return dc->links[link_index];
181}
182
183static inline struct dc_link *get_edp_link(const struct dc *dc)
184{
185 int i;
186
187 // report any eDP links, even unconnected DDI's
188 for (i = 0; i < dc->link_count; i++) {
189 if (dc->links[i]->connector_signal == SIGNAL_TYPE_EDP)
190 return dc->links[i];
191 }
192 return NULL;
193}
194
195/* Set backlight level of an embedded panel (eDP, LVDS).
196 * backlight_pwm_u16_16 is unsigned 32 bit with 16 bit integer
197 * and 16 bit fractional, where 1.0 is max backlight value.
198 */
199bool dc_link_set_backlight_level(const struct dc_link *dc_link,
200 uint32_t backlight_pwm_u16_16,
201 uint32_t frame_ramp);
202
203/* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
204bool dc_link_set_backlight_level_nits(struct dc_link *link,
205 bool isHDR,
206 uint32_t backlight_millinits,
207 uint32_t transition_time_in_ms);
208
209bool dc_link_get_backlight_level_nits(struct dc_link *link,
210 uint32_t *backlight_millinits,
211 uint32_t *backlight_millinits_peak);
212
213bool dc_link_backlight_enable_aux(struct dc_link *link, bool enable);
214
215bool dc_link_read_default_bl_aux(struct dc_link *link, uint32_t *backlight_millinits);
216bool dc_link_set_default_brightness_aux(struct dc_link *link);
217
218int dc_link_get_backlight_level(const struct dc_link *dc_link);
219
220int dc_link_get_target_backlight_pwm(const struct dc_link *link);
221
222bool dc_link_set_psr_allow_active(struct dc_link *dc_link, bool enable, bool wait);
223
224bool dc_link_get_psr_state(const struct dc_link *dc_link, uint32_t *psr_state);
225
226bool dc_link_setup_psr(struct dc_link *dc_link,
227 const struct dc_stream_state *stream, struct psr_config *psr_config,
228 struct psr_context *psr_context);
229
230/* Request DC to detect if there is a Panel connected.
231 * boot - If this call is during initial boot.
232 * Return false for any type of detection failure or MST detection
233 * true otherwise. True meaning further action is required (status update
234 * and OS notification).
235 */
236enum dc_detect_reason {
237 DETECT_REASON_BOOT,
238 DETECT_REASON_HPD,
239 DETECT_REASON_HPDRX,
240};
241
242bool dc_link_detect(struct dc_link *dc_link, enum dc_detect_reason reason);
243bool dc_link_get_hpd_state(struct dc_link *dc_link);
244enum dc_status dc_link_allocate_mst_payload(struct pipe_ctx *pipe_ctx);
245enum dc_status dc_link_reallocate_mst_payload(struct dc_link *link);
246
247/* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
248 * Return:
249 * true - Downstream port status changed. DM should call DC to do the
250 * detection.
251 * false - no change in Downstream port status. No further action required
252 * from DM. */
253bool dc_link_handle_hpd_rx_irq(struct dc_link *dc_link,
254 union hpd_irq_data *hpd_irq_dpcd_data, bool *out_link_loss);
255
256struct dc_sink_init_data;
257
258struct dc_sink *dc_link_add_remote_sink(
259 struct dc_link *dc_link,
260 const uint8_t *edid,
261 int len,
262 struct dc_sink_init_data *init_data);
263
264void dc_link_remove_remote_sink(
265 struct dc_link *link,
266 struct dc_sink *sink);
267
268/* Used by diagnostics for virtual link at the moment */
269
270void dc_link_dp_set_drive_settings(
271 struct dc_link *link,
272 struct link_training_settings *lt_settings);
273
274bool dc_link_dp_perform_link_training_skip_aux(
275 struct dc_link *link,
276 const struct dc_link_settings *link_setting);
277
278enum link_training_result dc_link_dp_perform_link_training(
279 struct dc_link *link,
280 const struct dc_link_settings *link_setting,
281 bool skip_video_pattern);
282
283bool dc_link_dp_sync_lt_begin(struct dc_link *link);
284
285enum link_training_result dc_link_dp_sync_lt_attempt(
286 struct dc_link *link,
287 struct dc_link_settings *link_setting,
288 struct dc_link_training_overrides *lt_settings);
289
290bool dc_link_dp_sync_lt_end(struct dc_link *link, bool link_down);
291
292void dc_link_dp_enable_hpd(const struct dc_link *link);
293
294void dc_link_dp_disable_hpd(const struct dc_link *link);
295
296bool dc_link_dp_set_test_pattern(
297 struct dc_link *link,
298 enum dp_test_pattern test_pattern,
299 enum dp_test_pattern_color_space test_pattern_color_space,
300 const struct link_training_settings *p_link_settings,
301 const unsigned char *p_custom_pattern,
302 unsigned int cust_pattern_size);
303
304void dc_link_enable_hpd_filter(struct dc_link *link, bool enable);
305
306bool dc_link_is_dp_sink_present(struct dc_link *link);
307
308bool dc_link_detect_sink(struct dc_link *link, enum dc_connection_type *type);
309/*
310 * DPCD access interfaces
311 */
312
313#ifdef CONFIG_DRM_AMD_DC_HDCP
314bool dc_link_is_hdcp14(struct dc_link *link, enum signal_type signal);
315bool dc_link_is_hdcp22(struct dc_link *link, enum signal_type signal);
316#endif
317void dc_link_set_drive_settings(struct dc *dc,
318 struct link_training_settings *lt_settings,
319 const struct dc_link *link);
320void dc_link_perform_link_training(struct dc *dc,
321 struct dc_link_settings *link_setting,
322 bool skip_video_pattern);
323void dc_link_set_preferred_link_settings(struct dc *dc,
324 struct dc_link_settings *link_setting,
325 struct dc_link *link);
326void dc_link_set_preferred_training_settings(struct dc *dc,
327 struct dc_link_settings *link_setting,
328 struct dc_link_training_overrides *lt_overrides,
329 struct dc_link *link,
330 bool skip_immediate_retrain);
331void dc_link_enable_hpd(const struct dc_link *link);
332void dc_link_disable_hpd(const struct dc_link *link);
333void dc_link_set_test_pattern(struct dc_link *link,
334 enum dp_test_pattern test_pattern,
335 enum dp_test_pattern_color_space test_pattern_color_space,
336 const struct link_training_settings *p_link_settings,
337 const unsigned char *p_custom_pattern,
338 unsigned int cust_pattern_size);
339uint32_t dc_link_bandwidth_kbps(
340 const struct dc_link *link,
341 const struct dc_link_settings *link_setting);
342
343const struct dc_link_settings *dc_link_get_link_cap(
344 const struct dc_link *link);
345
346void dc_link_overwrite_extended_receiver_cap(
347 struct dc_link *link);
348
349bool dc_submit_i2c(
350 struct dc *dc,
351 uint32_t link_index,
352 struct i2c_command *cmd);
353
354bool dc_submit_i2c_oem(
355 struct dc *dc,
356 struct i2c_command *cmd);
357
358uint32_t dc_bandwidth_in_kbps_from_timing(
359 const struct dc_crtc_timing *timing);
360
361bool dc_link_is_fec_supported(const struct dc_link *link);
362
363#endif /* DC_LINK_H_ */