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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Broadcom STB generic reset controller for SW_INIT style reset controller
4 *
5 * Author: Florian Fainelli <f.fainelli@gmail.com>
6 * Copyright (C) 2018 Broadcom
7 */
8#include <linux/delay.h>
9#include <linux/device.h>
10#include <linux/io.h>
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/platform_device.h>
14#include <linux/reset-controller.h>
15#include <linux/types.h>
16
17struct brcmstb_reset {
18 void __iomem *base;
19 struct reset_controller_dev rcdev;
20};
21
22#define SW_INIT_SET 0x00
23#define SW_INIT_CLEAR 0x04
24#define SW_INIT_STATUS 0x08
25
26#define SW_INIT_BIT(id) BIT((id) & 0x1f)
27#define SW_INIT_BANK(id) ((id) >> 5)
28
29/* A full bank contains extra registers that we are not utilizing but still
30 * qualify as a single bank.
31 */
32#define SW_INIT_BANK_SIZE 0x18
33
34static inline
35struct brcmstb_reset *to_brcmstb(struct reset_controller_dev *rcdev)
36{
37 return container_of(rcdev, struct brcmstb_reset, rcdev);
38}
39
40static int brcmstb_reset_assert(struct reset_controller_dev *rcdev,
41 unsigned long id)
42{
43 unsigned int off = SW_INIT_BANK(id) * SW_INIT_BANK_SIZE;
44 struct brcmstb_reset *priv = to_brcmstb(rcdev);
45
46 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_SET);
47
48 return 0;
49}
50
51static int brcmstb_reset_deassert(struct reset_controller_dev *rcdev,
52 unsigned long id)
53{
54 unsigned int off = SW_INIT_BANK(id) * SW_INIT_BANK_SIZE;
55 struct brcmstb_reset *priv = to_brcmstb(rcdev);
56
57 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_CLEAR);
58 /* Maximum reset delay after de-asserting a line and seeing block
59 * operation is typically 14us for the worst case, build some slack
60 * here.
61 */
62 usleep_range(100, 200);
63
64 return 0;
65}
66
67static int brcmstb_reset_status(struct reset_controller_dev *rcdev,
68 unsigned long id)
69{
70 unsigned int off = SW_INIT_BANK(id) * SW_INIT_BANK_SIZE;
71 struct brcmstb_reset *priv = to_brcmstb(rcdev);
72
73 return readl_relaxed(priv->base + off + SW_INIT_STATUS) &
74 SW_INIT_BIT(id);
75}
76
77static const struct reset_control_ops brcmstb_reset_ops = {
78 .assert = brcmstb_reset_assert,
79 .deassert = brcmstb_reset_deassert,
80 .status = brcmstb_reset_status,
81};
82
83static int brcmstb_reset_probe(struct platform_device *pdev)
84{
85 struct device *kdev = &pdev->dev;
86 struct brcmstb_reset *priv;
87 struct resource *res;
88
89 priv = devm_kzalloc(kdev, sizeof(*priv), GFP_KERNEL);
90 if (!priv)
91 return -ENOMEM;
92
93 priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
94 if (IS_ERR(priv->base))
95 return PTR_ERR(priv->base);
96
97 dev_set_drvdata(kdev, priv);
98
99 priv->rcdev.owner = THIS_MODULE;
100 priv->rcdev.nr_resets = DIV_ROUND_DOWN_ULL(resource_size(res),
101 SW_INIT_BANK_SIZE) * 32;
102 priv->rcdev.ops = &brcmstb_reset_ops;
103 priv->rcdev.of_node = kdev->of_node;
104 /* Use defaults: 1 cell and simple xlate function */
105
106 return devm_reset_controller_register(kdev, &priv->rcdev);
107}
108
109static const struct of_device_id brcmstb_reset_of_match[] = {
110 { .compatible = "brcm,brcmstb-reset" },
111 { /* sentinel */ }
112};
113MODULE_DEVICE_TABLE(of, brcmstb_reset_of_match);
114
115static struct platform_driver brcmstb_reset_driver = {
116 .probe = brcmstb_reset_probe,
117 .driver = {
118 .name = "brcmstb-reset",
119 .of_match_table = brcmstb_reset_of_match,
120 },
121};
122module_platform_driver(brcmstb_reset_driver);
123
124MODULE_AUTHOR("Broadcom");
125MODULE_DESCRIPTION("Broadcom STB reset controller");
126MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Broadcom STB generic reset controller for SW_INIT style reset controller
4 *
5 * Author: Florian Fainelli <f.fainelli@gmail.com>
6 * Copyright (C) 2018 Broadcom
7 */
8#include <linux/delay.h>
9#include <linux/device.h>
10#include <linux/io.h>
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/platform_device.h>
14#include <linux/reset-controller.h>
15#include <linux/types.h>
16
17struct brcmstb_reset {
18 void __iomem *base;
19 struct reset_controller_dev rcdev;
20};
21
22#define SW_INIT_SET 0x00
23#define SW_INIT_CLEAR 0x04
24#define SW_INIT_STATUS 0x08
25
26#define SW_INIT_BIT(id) BIT((id) & 0x1f)
27#define SW_INIT_BANK(id) ((id) >> 5)
28
29/* A full bank contains extra registers that we are not utilizing but still
30 * qualify as a single bank.
31 */
32#define SW_INIT_BANK_SIZE 0x18
33
34static inline
35struct brcmstb_reset *to_brcmstb(struct reset_controller_dev *rcdev)
36{
37 return container_of(rcdev, struct brcmstb_reset, rcdev);
38}
39
40static int brcmstb_reset_assert(struct reset_controller_dev *rcdev,
41 unsigned long id)
42{
43 unsigned int off = SW_INIT_BANK(id) * SW_INIT_BANK_SIZE;
44 struct brcmstb_reset *priv = to_brcmstb(rcdev);
45
46 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_SET);
47
48 return 0;
49}
50
51static int brcmstb_reset_deassert(struct reset_controller_dev *rcdev,
52 unsigned long id)
53{
54 unsigned int off = SW_INIT_BANK(id) * SW_INIT_BANK_SIZE;
55 struct brcmstb_reset *priv = to_brcmstb(rcdev);
56
57 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_CLEAR);
58 /* Maximum reset delay after de-asserting a line and seeing block
59 * operation is typically 14us for the worst case, build some slack
60 * here.
61 */
62 usleep_range(100, 200);
63
64 return 0;
65}
66
67static int brcmstb_reset_status(struct reset_controller_dev *rcdev,
68 unsigned long id)
69{
70 unsigned int off = SW_INIT_BANK(id) * SW_INIT_BANK_SIZE;
71 struct brcmstb_reset *priv = to_brcmstb(rcdev);
72
73 return readl_relaxed(priv->base + off + SW_INIT_STATUS) &
74 SW_INIT_BIT(id);
75}
76
77static const struct reset_control_ops brcmstb_reset_ops = {
78 .assert = brcmstb_reset_assert,
79 .deassert = brcmstb_reset_deassert,
80 .status = brcmstb_reset_status,
81};
82
83static int brcmstb_reset_probe(struct platform_device *pdev)
84{
85 struct device *kdev = &pdev->dev;
86 struct brcmstb_reset *priv;
87 struct resource *res;
88
89 priv = devm_kzalloc(kdev, sizeof(*priv), GFP_KERNEL);
90 if (!priv)
91 return -ENOMEM;
92
93 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
94 priv->base = devm_ioremap_resource(kdev, res);
95 if (IS_ERR(priv->base))
96 return PTR_ERR(priv->base);
97
98 dev_set_drvdata(kdev, priv);
99
100 priv->rcdev.owner = THIS_MODULE;
101 priv->rcdev.nr_resets = DIV_ROUND_DOWN_ULL(resource_size(res),
102 SW_INIT_BANK_SIZE) * 32;
103 priv->rcdev.ops = &brcmstb_reset_ops;
104 priv->rcdev.of_node = kdev->of_node;
105 /* Use defaults: 1 cell and simple xlate function */
106
107 return devm_reset_controller_register(kdev, &priv->rcdev);
108}
109
110static const struct of_device_id brcmstb_reset_of_match[] = {
111 { .compatible = "brcm,brcmstb-reset" },
112 { /* sentinel */ }
113};
114
115static struct platform_driver brcmstb_reset_driver = {
116 .probe = brcmstb_reset_probe,
117 .driver = {
118 .name = "brcmstb-reset",
119 .of_match_table = brcmstb_reset_of_match,
120 },
121};
122module_platform_driver(brcmstb_reset_driver);
123
124MODULE_AUTHOR("Broadcom");
125MODULE_DESCRIPTION("Broadcom STB reset controller");
126MODULE_LICENSE("GPL");