1/*
 2 * Copyright 2014 Advanced Micro Devices, Inc.
 3 *
 4 * Permission is hereby granted, free of charge, to any person obtaining a
 5 * copy of this software and associated documentation files (the "Software"),
 6 * to deal in the Software without restriction, including without limitation
 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 8 * and/or sell copies of the Software, and to permit persons to whom the
 9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef __AMDGPU_PM_H__
25#define __AMDGPU_PM_H__
26
27struct cg_flag_name
28{
29	u32 flag;
30	const char *name;
31};
32
33enum amdgpu_device_attr_flags {
34	ATTR_FLAG_BASIC = (1 << 0),
35	ATTR_FLAG_ONEVF = (1 << 16),
36};
37
38#define ATTR_FLAG_TYPE_MASK	(0x0000ffff)
39#define ATTR_FLAG_MODE_MASK	(0xffff0000)
40#define ATTR_FLAG_MASK_ALL	(0xffffffff)
41
42enum amdgpu_device_attr_states {
43	ATTR_STATE_UNSUPPORTED = 0,
44	ATTR_STATE_SUPPORTED,
45};
46
47struct amdgpu_device_attr {
48	struct device_attribute dev_attr;
49	enum amdgpu_device_attr_flags flags;
50	int (*attr_update)(struct amdgpu_device *adev, struct amdgpu_device_attr *attr,
51			   uint32_t mask, enum amdgpu_device_attr_states *states);
52
53};
54
55struct amdgpu_device_attr_entry {
56	struct list_head entry;
57	struct amdgpu_device_attr *attr;
58};
59
60#define to_amdgpu_device_attr(_dev_attr) \
61	container_of(_dev_attr, struct amdgpu_device_attr, dev_attr)
62
63#define __AMDGPU_DEVICE_ATTR(_name, _mode, _show, _store, _flags, ...)	\
64	{ .dev_attr = __ATTR(_name, _mode, _show, _store),		\
65	  .flags = _flags,						\
66	  ##__VA_ARGS__, }
67
68#define AMDGPU_DEVICE_ATTR(_name, _mode, _flags, ...)			\
69	__AMDGPU_DEVICE_ATTR(_name, _mode,				\
70			     amdgpu_get_##_name, amdgpu_set_##_name,	\
71			     _flags, ##__VA_ARGS__)
72
73#define AMDGPU_DEVICE_ATTR_RW(_name, _flags, ...)			\
74	AMDGPU_DEVICE_ATTR(_name, S_IRUGO | S_IWUSR,			\
75			   _flags, ##__VA_ARGS__)
76
77#define AMDGPU_DEVICE_ATTR_RO(_name, _flags, ...)			\
78	__AMDGPU_DEVICE_ATTR(_name, S_IRUGO,				\
79			     amdgpu_get_##_name, NULL,			\
80			     _flags, ##__VA_ARGS__)
81
82void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev);
83int amdgpu_pm_sysfs_init(struct amdgpu_device *adev);
84int amdgpu_pm_virt_sysfs_init(struct amdgpu_device *adev);
85void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev);
86void amdgpu_pm_virt_sysfs_fini(struct amdgpu_device *adev);
87void amdgpu_pm_print_power_states(struct amdgpu_device *adev);
88int amdgpu_pm_load_smu_firmware(struct amdgpu_device *adev, uint32_t *smu_version);
89void amdgpu_pm_compute_clocks(struct amdgpu_device *adev);
90void amdgpu_dpm_thermal_work_handler(struct work_struct *work);
91void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable);
92void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable);
93void amdgpu_dpm_enable_jpeg(struct amdgpu_device *adev, bool enable);
94
95int amdgpu_debugfs_pm_init(struct amdgpu_device *adev);
96
97#endif