1/*
  2 * Copyright 2012-14 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: AMD
 23 *
 24 */
 25
 26#ifndef DC_LINK_H_
 27#define DC_LINK_H_
 28
 29#include "dc_types.h"
 30#include "grph_object_defs.h"
 31
 32#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
 33enum dc_link_fec_state {
 34	dc_link_fec_not_ready,
 35	dc_link_fec_ready,
 36	dc_link_fec_enabled
 37};
 38#endif
 39struct dc_link_status {
 40	bool link_active;
 41	struct dpcd_caps *dpcd_caps;
 42};
 43
 44/* DP MST stream allocation (payload bandwidth number) */
 45struct link_mst_stream_allocation {
 46	/* DIG front */
 47	const struct stream_encoder *stream_enc;
 48	/* associate DRM payload table with DC stream encoder */
 49	uint8_t vcp_id;
 50	/* number of slots required for the DP stream in transport packet */
 51	uint8_t slot_count;
 52};
 53
 54/* DP MST stream allocation table */
 55struct link_mst_stream_allocation_table {
 56	/* number of DP video streams */
 57	int stream_count;
 58	/* array of stream allocations */
 59	struct link_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM];
 60};
 61
 62struct time_stamp {
 63	uint64_t edp_poweroff;
 64	uint64_t edp_poweron;
 65};
 66
 67struct link_trace {
 68	struct time_stamp time_stamp;
 69};
 70/*
 71 * A link contains one or more sinks and their connected status.
 72 * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
 73 */
 74struct dc_link {
 75	struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
 76	unsigned int sink_count;
 77	struct dc_sink *local_sink;
 78	unsigned int link_index;
 79	enum dc_connection_type type;
 80	enum signal_type connector_signal;
 81	enum dc_irq_source irq_source_hpd;
 82	enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */
 83	bool is_hpd_filter_disabled;
 84	bool dp_ss_off;
 85	bool link_state_valid;
 86	bool aux_access_disabled;
 87	bool sync_lt_in_progress;
 88
 89	/* caps is the same as reported_link_cap. link_traing use
 90	 * reported_link_cap. Will clean up.  TODO
 91	 */
 92	struct dc_link_settings reported_link_cap;
 93	struct dc_link_settings verified_link_cap;
 94	struct dc_link_settings cur_link_settings;
 95	struct dc_lane_settings cur_lane_setting;
 96	struct dc_link_settings preferred_link_setting;
 97	struct dc_link_training_overrides preferred_training_settings;
 98
 99	uint8_t ddc_hw_inst;
100
101	uint8_t hpd_src;
102
103	uint8_t link_enc_hw_inst;
104
105	bool test_pattern_enabled;
106	union compliance_test_state compliance_test_state;
107
108	void *priv;
109
110	struct ddc_service *ddc;
111
112	bool aux_mode;
113
114	/* Private to DC core */
115
116	const struct dc *dc;
117
118	struct dc_context *ctx;
119
120	struct link_encoder *link_enc;
121	struct graphics_object_id link_id;
122	union ddi_channel_mapping ddi_channel_mapping;
123	struct connector_device_tag_info device_tag;
124	struct dpcd_caps dpcd_caps;
125	uint32_t dongle_max_pix_clk;
126	unsigned short chip_caps;
127	unsigned int dpcd_sink_count;
128	enum edp_revision edp_revision;
129	bool psr_enabled;
130
131	/* MST record stream using this link */
132	struct link_flags {
133		bool dp_keep_receiver_powered;
134		bool dp_skip_DID2;
135	} wa_flags;
136	struct link_mst_stream_allocation_table mst_stream_alloc_table;
137
138	struct dc_link_status link_status;
139
140	struct link_trace link_trace;
141	struct gpio *hpd_gpio;
142#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
143	enum dc_link_fec_state fec_state;
144#endif
145};
146
147const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
148
149/**
150 * dc_get_link_at_index() - Return an enumerated dc_link.
151 *
152 * dc_link order is constant and determined at
153 * boot time.  They cannot be created or destroyed.
154 * Use dc_get_caps() to get number of links.
155 */
156static inline struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index)
157{
158	return dc->links[link_index];
159}
160
161/* Set backlight level of an embedded panel (eDP, LVDS).
162 * backlight_pwm_u16_16 is unsigned 32 bit with 16 bit integer
163 * and 16 bit fractional, where 1.0 is max backlight value.
164 */
165bool dc_link_set_backlight_level(const struct dc_link *dc_link,
166		uint32_t backlight_pwm_u16_16,
167		uint32_t frame_ramp);
168
169int dc_link_get_backlight_level(const struct dc_link *dc_link);
170
171bool dc_link_set_abm_disable(const struct dc_link *dc_link);
172
173bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable, bool wait);
174
175bool dc_link_get_psr_state(const struct dc_link *dc_link, uint32_t *psr_state);
176
177bool dc_link_setup_psr(struct dc_link *dc_link,
178		const struct dc_stream_state *stream, struct psr_config *psr_config,
179		struct psr_context *psr_context);
180
181/* Request DC to detect if there is a Panel connected.
182 * boot - If this call is during initial boot.
183 * Return false for any type of detection failure or MST detection
184 * true otherwise. True meaning further action is required (status update
185 * and OS notification).
186 */
187enum dc_detect_reason {
188	DETECT_REASON_BOOT,
189	DETECT_REASON_HPD,
190	DETECT_REASON_HPDRX,
191};
192
193bool dc_link_detect(struct dc_link *dc_link, enum dc_detect_reason reason);
194bool dc_link_get_hpd_state(struct dc_link *dc_link);
195
196/* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
197 * Return:
198 * true - Downstream port status changed. DM should call DC to do the
199 * detection.
200 * false - no change in Downstream port status. No further action required
201 * from DM. */
202bool dc_link_handle_hpd_rx_irq(struct dc_link *dc_link,
203		union hpd_irq_data *hpd_irq_dpcd_data, bool *out_link_loss);
204
205struct dc_sink_init_data;
206
207struct dc_sink *dc_link_add_remote_sink(
208		struct dc_link *dc_link,
209		const uint8_t *edid,
210		int len,
211		struct dc_sink_init_data *init_data);
212
213void dc_link_remove_remote_sink(
214	struct dc_link *link,
215	struct dc_sink *sink);
216
217/* Used by diagnostics for virtual link at the moment */
218
219void dc_link_dp_set_drive_settings(
220	struct dc_link *link,
221	struct link_training_settings *lt_settings);
222
223bool dc_link_dp_perform_link_training_skip_aux(
224	struct dc_link *link,
225	const struct dc_link_settings *link_setting);
226
227enum link_training_result dc_link_dp_perform_link_training(
228	struct dc_link *link,
229	const struct dc_link_settings *link_setting,
230	bool skip_video_pattern);
231
232bool dc_link_dp_sync_lt_begin(struct dc_link *link);
233
234enum link_training_result dc_link_dp_sync_lt_attempt(
235	struct dc_link *link,
236	struct dc_link_settings *link_setting,
237	struct dc_link_training_overrides *lt_settings);
238
239bool dc_link_dp_sync_lt_end(struct dc_link *link, bool link_down);
240
241void dc_link_dp_enable_hpd(const struct dc_link *link);
242
243void dc_link_dp_disable_hpd(const struct dc_link *link);
244
245bool dc_link_dp_set_test_pattern(
246	struct dc_link *link,
247	enum dp_test_pattern test_pattern,
248	const struct link_training_settings *p_link_settings,
249	const unsigned char *p_custom_pattern,
250	unsigned int cust_pattern_size);
251
252void dc_link_enable_hpd_filter(struct dc_link *link, bool enable);
253
254bool dc_link_is_dp_sink_present(struct dc_link *link);
255
256bool dc_link_detect_sink(struct dc_link *link, enum dc_connection_type *type);
257/*
258 * DPCD access interfaces
259 */
260
261void dc_link_set_drive_settings(struct dc *dc,
262				struct link_training_settings *lt_settings,
263				const struct dc_link *link);
264void dc_link_perform_link_training(struct dc *dc,
265				   struct dc_link_settings *link_setting,
266				   bool skip_video_pattern);
267void dc_link_set_preferred_link_settings(struct dc *dc,
268					 struct dc_link_settings *link_setting,
269					 struct dc_link *link);
270void dc_link_set_preferred_training_settings(struct dc *dc,
271					struct dc_link_settings *link_setting,
272					struct dc_link_training_overrides *lt_overrides,
273					struct dc_link *link,
274					bool skip_immediate_retrain);
275void dc_link_enable_hpd(const struct dc_link *link);
276void dc_link_disable_hpd(const struct dc_link *link);
277void dc_link_set_test_pattern(struct dc_link *link,
278			enum dp_test_pattern test_pattern,
279			const struct link_training_settings *p_link_settings,
280			const unsigned char *p_custom_pattern,
281			unsigned int cust_pattern_size);
282uint32_t dc_link_bandwidth_kbps(
283	const struct dc_link *link,
284	const struct dc_link_settings *link_setting);
285
286const struct dc_link_settings *dc_link_get_link_cap(
287		const struct dc_link *link);
288
289bool dc_submit_i2c(
290		struct dc *dc,
291		uint32_t link_index,
292		struct i2c_command *cmd);
293
294uint32_t dc_bandwidth_in_kbps_from_timing(
295	const struct dc_crtc_timing *timing);
296#endif /* DC_LINK_H_ */