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1/*
2 * Copyright 2018 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23#ifndef __AMDGPU_BO_LIST_H__
24#define __AMDGPU_BO_LIST_H__
25
26#include <drm/amdgpu_drm.h>
27
28struct hmm_range;
29
30struct drm_file;
31
32struct amdgpu_device;
33struct amdgpu_bo;
34struct amdgpu_bo_va;
35struct amdgpu_fpriv;
36
37struct amdgpu_bo_list_entry {
38 struct amdgpu_bo *bo;
39 struct amdgpu_bo_va *bo_va;
40 uint32_t priority;
41 struct page **user_pages;
42 struct hmm_range *range;
43 bool user_invalidated;
44};
45
46struct amdgpu_bo_list {
47 struct rcu_head rhead;
48 struct kref refcount;
49 struct amdgpu_bo *gds_obj;
50 struct amdgpu_bo *gws_obj;
51 struct amdgpu_bo *oa_obj;
52 unsigned first_userptr;
53 unsigned num_entries;
54
55 /* Protect access during command submission.
56 */
57 struct mutex bo_list_mutex;
58
59 struct amdgpu_bo_list_entry entries[] __counted_by(num_entries);
60};
61
62int amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id,
63 struct amdgpu_bo_list **result);
64void amdgpu_bo_list_put(struct amdgpu_bo_list *list);
65int amdgpu_bo_create_list_entry_array(struct drm_amdgpu_bo_list_in *in,
66 struct drm_amdgpu_bo_list_entry **info_param);
67
68int amdgpu_bo_list_create(struct amdgpu_device *adev,
69 struct drm_file *filp,
70 struct drm_amdgpu_bo_list_entry *info,
71 size_t num_entries,
72 struct amdgpu_bo_list **list);
73
74#define amdgpu_bo_list_for_each_entry(e, list) \
75 for (e = list->entries; \
76 e != &list->entries[list->num_entries]; \
77 ++e)
78
79#define amdgpu_bo_list_for_each_userptr_entry(e, list) \
80 for (e = &list->entries[list->first_userptr]; \
81 e != &list->entries[list->num_entries]; \
82 ++e)
83
84#endif
1/*
2 * Copyright 2018 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23#ifndef __AMDGPU_BO_LIST_H__
24#define __AMDGPU_BO_LIST_H__
25
26#include <drm/ttm/ttm_execbuf_util.h>
27#include <drm/amdgpu_drm.h>
28
29struct amdgpu_device;
30struct amdgpu_bo;
31struct amdgpu_bo_va;
32struct amdgpu_fpriv;
33
34struct amdgpu_bo_list_entry {
35 struct ttm_validate_buffer tv;
36 struct amdgpu_bo_va *bo_va;
37 uint32_t priority;
38 struct page **user_pages;
39 bool user_invalidated;
40};
41
42struct amdgpu_bo_list {
43 struct rcu_head rhead;
44 struct kref refcount;
45 struct amdgpu_bo *gds_obj;
46 struct amdgpu_bo *gws_obj;
47 struct amdgpu_bo *oa_obj;
48 unsigned first_userptr;
49 unsigned num_entries;
50};
51
52int amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id,
53 struct amdgpu_bo_list **result);
54void amdgpu_bo_list_get_list(struct amdgpu_bo_list *list,
55 struct list_head *validated);
56void amdgpu_bo_list_put(struct amdgpu_bo_list *list);
57int amdgpu_bo_create_list_entry_array(struct drm_amdgpu_bo_list_in *in,
58 struct drm_amdgpu_bo_list_entry **info_param);
59
60int amdgpu_bo_list_create(struct amdgpu_device *adev,
61 struct drm_file *filp,
62 struct drm_amdgpu_bo_list_entry *info,
63 unsigned num_entries,
64 struct amdgpu_bo_list **list);
65
66static inline struct amdgpu_bo_list_entry *
67amdgpu_bo_list_array_entry(struct amdgpu_bo_list *list, unsigned index)
68{
69 struct amdgpu_bo_list_entry *array = (void *)&list[1];
70
71 return &array[index];
72}
73
74#define amdgpu_bo_list_for_each_entry(e, list) \
75 for (e = amdgpu_bo_list_array_entry(list, 0); \
76 e != amdgpu_bo_list_array_entry(list, (list)->num_entries); \
77 ++e)
78
79#define amdgpu_bo_list_for_each_userptr_entry(e, list) \
80 for (e = amdgpu_bo_list_array_entry(list, (list)->first_userptr); \
81 e != amdgpu_bo_list_array_entry(list, (list)->num_entries); \
82 ++e)
83
84#endif