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1
2/*
3 * Copyright 2017 Advanced Micro Devices, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: AMD
24 *
25 */
26
27#ifndef __RC_CALC_H__
28#define __RC_CALC_H__
29
30#include "dml/dsc/rc_calc_fpu.h"
31
32void calc_rc_params(struct rc_params *rc, const struct drm_dsc_config *pps);
33
34#endif
35
1#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
2
3/*
4 * Copyright 2017 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: AMD
25 *
26 */
27
28#ifndef __RC_CALC_H__
29#define __RC_CALC_H__
30
31
32#define QP_SET_SIZE 15
33
34typedef int qp_set[QP_SET_SIZE];
35
36struct rc_params {
37 int rc_quant_incr_limit0;
38 int rc_quant_incr_limit1;
39 int initial_fullness_offset;
40 int initial_xmit_delay;
41 int first_line_bpg_offset;
42 int second_line_bpg_offset;
43 int flatness_min_qp;
44 int flatness_max_qp;
45 int flatness_det_thresh;
46 qp_set qp_min;
47 qp_set qp_max;
48 qp_set ofs;
49 int rc_model_size;
50 int rc_edge_factor;
51 int rc_tgt_offset_hi;
52 int rc_tgt_offset_lo;
53 int rc_buf_thresh[QP_SET_SIZE - 1];
54};
55
56enum colour_mode {
57 CM_RGB, /* 444 RGB */
58 CM_444, /* 444 YUV or simple 422 */
59 CM_422, /* native 422 */
60 CM_420 /* native 420 */
61};
62
63enum bits_per_comp {
64 BPC_8 = 8,
65 BPC_10 = 10,
66 BPC_12 = 12
67};
68
69enum max_min {
70 MM_MIN = 0,
71 MM_MAX = 1
72};
73
74struct qp_entry {
75 float bpp;
76 const qp_set qps;
77};
78
79typedef struct qp_entry qp_table[];
80
81void calc_rc_params(struct rc_params *rc, enum colour_mode cm, enum bits_per_comp bpc, float bpp, int slice_width, int slice_height, int minor_version);
82
83#endif
84
85#endif