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1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (C) 2021, Intel Corporation. */
3
4#ifndef _ICE_PTP_H_
5#define _ICE_PTP_H_
6
7#include <linux/ptp_clock_kernel.h>
8#include <linux/kthread.h>
9
10#include "ice_ptp_hw.h"
11
12enum ice_ptp_pin_e810 {
13 GPIO_20 = 0,
14 GPIO_21,
15 GPIO_22,
16 GPIO_23,
17 NUM_PTP_PIN_E810
18};
19
20enum ice_ptp_pin_e810t {
21 GNSS = 0,
22 SMA1,
23 UFL1,
24 SMA2,
25 UFL2,
26 NUM_PTP_PINS_E810T
27};
28
29struct ice_perout_channel {
30 bool ena;
31 u32 gpio_pin;
32 u64 period;
33 u64 start_time;
34};
35
36/* The ice hardware captures Tx hardware timestamps in the PHY. The timestamp
37 * is stored in a buffer of registers. Depending on the specific hardware,
38 * this buffer might be shared across multiple PHY ports.
39 *
40 * On transmit of a packet to be timestamped, software is responsible for
41 * selecting an open index. Hardware makes no attempt to lock or prevent
42 * re-use of an index for multiple packets.
43 *
44 * To handle this, timestamp indexes must be tracked by software to ensure
45 * that an index is not re-used for multiple transmitted packets. The
46 * structures and functions declared in this file track the available Tx
47 * register indexes, as well as provide storage for the SKB pointers.
48 *
49 * To allow multiple ports to access the shared register block independently,
50 * the blocks are split up so that indexes are assigned to each port based on
51 * hardware logical port number.
52 *
53 * The timestamp blocks are handled differently for E810- and E822-based
54 * devices. In E810 devices, each port has its own block of timestamps, while in
55 * E822 there is a need to logically break the block of registers into smaller
56 * chunks based on the port number to avoid collisions.
57 *
58 * Example for port 5 in E810:
59 * +--------+--------+--------+--------+--------+--------+--------+--------+
60 * |register|register|register|register|register|register|register|register|
61 * | block | block | block | block | block | block | block | block |
62 * | for | for | for | for | for | for | for | for |
63 * | port 0 | port 1 | port 2 | port 3 | port 4 | port 5 | port 6 | port 7 |
64 * +--------+--------+--------+--------+--------+--------+--------+--------+
65 * ^^
66 * ||
67 * |--- quad offset is always 0
68 * ---- quad number
69 *
70 * Example for port 5 in E822:
71 * +-----------------------------+-----------------------------+
72 * | register block for quad 0 | register block for quad 1 |
73 * |+------+------+------+------+|+------+------+------+------+|
74 * ||port 0|port 1|port 2|port 3|||port 0|port 1|port 2|port 3||
75 * |+------+------+------+------+|+------+------+------+------+|
76 * +-----------------------------+-------^---------------------+
77 * ^ |
78 * | --- quad offset*
79 * ---- quad number
80 *
81 * * PHY port 5 is port 1 in quad 1
82 *
83 */
84
85/**
86 * struct ice_tx_tstamp - Tracking for a single Tx timestamp
87 * @skb: pointer to the SKB for this timestamp request
88 * @start: jiffies when the timestamp was first requested
89 * @cached_tstamp: last read timestamp
90 *
91 * This structure tracks a single timestamp request. The SKB pointer is
92 * provided when initiating a request. The start time is used to ensure that
93 * we discard old requests that were not fulfilled within a 2 second time
94 * window.
95 * Timestamp values in the PHY are read only and do not get cleared except at
96 * hardware reset or when a new timestamp value is captured.
97 *
98 * Some PHY types do not provide a "ready" bitmap indicating which timestamp
99 * indexes are valid. In these cases, we use a cached_tstamp to keep track of
100 * the last timestamp we read for a given index. If the current timestamp
101 * value is the same as the cached value, we assume a new timestamp hasn't
102 * been captured. This avoids reporting stale timestamps to the stack. This is
103 * only done if the has_ready_bitmap flag is not set in ice_ptp_tx structure.
104 */
105struct ice_tx_tstamp {
106 struct sk_buff *skb;
107 unsigned long start;
108 u64 cached_tstamp;
109};
110
111/**
112 * enum ice_tx_tstamp_work - Status of Tx timestamp work function
113 * @ICE_TX_TSTAMP_WORK_DONE: Tx timestamp processing is complete
114 * @ICE_TX_TSTAMP_WORK_PENDING: More Tx timestamps are pending
115 */
116enum ice_tx_tstamp_work {
117 ICE_TX_TSTAMP_WORK_DONE = 0,
118 ICE_TX_TSTAMP_WORK_PENDING,
119};
120
121/**
122 * struct ice_ptp_tx - Tracking structure for all Tx timestamp requests on a port
123 * @lock: lock to prevent concurrent access to fields of this struct
124 * @tstamps: array of len to store outstanding requests
125 * @in_use: bitmap of len to indicate which slots are in use
126 * @stale: bitmap of len to indicate slots which have stale timestamps
127 * @block: which memory block (quad or port) the timestamps are captured in
128 * @offset: offset into timestamp block to get the real index
129 * @len: length of the tstamps and in_use fields.
130 * @init: if true, the tracker is initialized;
131 * @calibrating: if true, the PHY is calibrating the Tx offset. During this
132 * window, timestamps are temporarily disabled.
133 * @has_ready_bitmap: if true, the hardware has a valid Tx timestamp ready
134 * bitmap register. If false, fall back to verifying new
135 * timestamp values against previously cached copy.
136 * @last_ll_ts_idx_read: index of the last LL TS read by the FW
137 */
138struct ice_ptp_tx {
139 spinlock_t lock; /* lock protecting in_use bitmap */
140 struct ice_tx_tstamp *tstamps;
141 unsigned long *in_use;
142 unsigned long *stale;
143 u8 block;
144 u8 offset;
145 u8 len;
146 u8 init : 1;
147 u8 calibrating : 1;
148 u8 has_ready_bitmap : 1;
149 s8 last_ll_ts_idx_read;
150};
151
152/* Quad and port information for initializing timestamp blocks */
153#define INDEX_PER_QUAD 64
154#define INDEX_PER_PORT_E82X 16
155#define INDEX_PER_PORT_E810 64
156
157/**
158 * struct ice_ptp_port - data used to initialize an external port for PTP
159 *
160 * This structure contains data indicating whether a single external port is
161 * ready for PTP functionality. It is used to track the port initialization
162 * and determine when the port's PHY offset is valid.
163 *
164 * @list_member: list member structure of auxiliary device
165 * @tx: Tx timestamp tracking for this port
166 * @aux_dev: auxiliary device associated with this port
167 * @ov_work: delayed work task for tracking when PHY offset is valid
168 * @ps_lock: mutex used to protect the overall PTP PHY start procedure
169 * @link_up: indicates whether the link is up
170 * @tx_fifo_busy_cnt: number of times the Tx FIFO was busy
171 * @port_num: the port number this structure represents
172 */
173struct ice_ptp_port {
174 struct list_head list_member;
175 struct ice_ptp_tx tx;
176 struct auxiliary_device aux_dev;
177 struct kthread_delayed_work ov_work;
178 struct mutex ps_lock; /* protects overall PTP PHY start procedure */
179 bool link_up;
180 u8 tx_fifo_busy_cnt;
181 u8 port_num;
182};
183
184enum ice_ptp_tx_interrupt {
185 ICE_PTP_TX_INTERRUPT_NONE = 0,
186 ICE_PTP_TX_INTERRUPT_SELF,
187 ICE_PTP_TX_INTERRUPT_ALL,
188};
189
190/**
191 * struct ice_ptp_port_owner - data used to handle the PTP clock owner info
192 *
193 * This structure contains data necessary for the PTP clock owner to correctly
194 * handle the timestamping feature for all attached ports.
195 *
196 * @aux_driver: the structure carring the auxiliary driver information
197 * @ports: list of porst handled by this port owner
198 * @lock: protect access to ports list
199 */
200struct ice_ptp_port_owner {
201 struct auxiliary_driver aux_driver;
202 struct list_head ports;
203 struct mutex lock;
204};
205
206#define GLTSYN_TGT_H_IDX_MAX 4
207
208enum ice_ptp_state {
209 ICE_PTP_UNINIT = 0,
210 ICE_PTP_INITIALIZING,
211 ICE_PTP_READY,
212 ICE_PTP_RESETTING,
213 ICE_PTP_ERROR,
214};
215
216/**
217 * struct ice_ptp - data used for integrating with CONFIG_PTP_1588_CLOCK
218 * @state: current state of PTP state machine
219 * @tx_interrupt_mode: the TX interrupt mode for the PTP clock
220 * @port: data for the PHY port initialization procedure
221 * @ports_owner: data for the auxiliary driver owner
222 * @work: delayed work function for periodic tasks
223 * @cached_phc_time: a cached copy of the PHC time for timestamp extension
224 * @cached_phc_jiffies: jiffies when cached_phc_time was last updated
225 * @ext_ts_chan: the external timestamp channel in use
226 * @ext_ts_irq: the external timestamp IRQ in use
227 * @kworker: kwork thread for handling periodic work
228 * @perout_channels: periodic output data
229 * @info: structure defining PTP hardware capabilities
230 * @clock: pointer to registered PTP clock device
231 * @tstamp_config: hardware timestamping configuration
232 * @reset_time: kernel time after clock stop on reset
233 * @tx_hwtstamp_skipped: number of Tx time stamp requests skipped
234 * @tx_hwtstamp_timeouts: number of Tx skbs discarded with no time stamp
235 * @tx_hwtstamp_flushed: number of Tx skbs flushed due to interface closed
236 * @tx_hwtstamp_discarded: number of Tx skbs discarded due to cached PHC time
237 * being too old to correctly extend timestamp
238 * @late_cached_phc_updates: number of times cached PHC update is late
239 */
240struct ice_ptp {
241 enum ice_ptp_state state;
242 enum ice_ptp_tx_interrupt tx_interrupt_mode;
243 struct ice_ptp_port port;
244 struct ice_ptp_port_owner ports_owner;
245 struct kthread_delayed_work work;
246 u64 cached_phc_time;
247 unsigned long cached_phc_jiffies;
248 u8 ext_ts_chan;
249 u8 ext_ts_irq;
250 struct kthread_worker *kworker;
251 struct ice_perout_channel perout_channels[GLTSYN_TGT_H_IDX_MAX];
252 struct ptp_clock_info info;
253 struct ptp_clock *clock;
254 struct hwtstamp_config tstamp_config;
255 u64 reset_time;
256 u32 tx_hwtstamp_skipped;
257 u32 tx_hwtstamp_timeouts;
258 u32 tx_hwtstamp_flushed;
259 u32 tx_hwtstamp_discarded;
260 u32 late_cached_phc_updates;
261};
262
263#define __ptp_port_to_ptp(p) \
264 container_of((p), struct ice_ptp, port)
265#define ptp_port_to_pf(p) \
266 container_of(__ptp_port_to_ptp((p)), struct ice_pf, ptp)
267
268#define __ptp_info_to_ptp(i) \
269 container_of((i), struct ice_ptp, info)
270#define ptp_info_to_pf(i) \
271 container_of(__ptp_info_to_ptp((i)), struct ice_pf, ptp)
272
273#define PFTSYN_SEM_BYTES 4
274#define PTP_SHARED_CLK_IDX_VALID BIT(31)
275#define TS_CMD_MASK 0xF
276#define SYNC_EXEC_CMD 0x3
277#define ICE_PTP_TS_VALID BIT(0)
278
279#define FIFO_EMPTY BIT(2)
280#define FIFO_OK 0xFF
281#define ICE_PTP_FIFO_NUM_CHECKS 5
282/* Per-channel register definitions */
283#define GLTSYN_AUX_OUT(_chan, _idx) (GLTSYN_AUX_OUT_0(_idx) + ((_chan) * 8))
284#define GLTSYN_AUX_IN(_chan, _idx) (GLTSYN_AUX_IN_0(_idx) + ((_chan) * 8))
285#define GLTSYN_CLKO(_chan, _idx) (GLTSYN_CLKO_0(_idx) + ((_chan) * 8))
286#define GLTSYN_TGT_L(_chan, _idx) (GLTSYN_TGT_L_0(_idx) + ((_chan) * 16))
287#define GLTSYN_TGT_H(_chan, _idx) (GLTSYN_TGT_H_0(_idx) + ((_chan) * 16))
288#define GLTSYN_EVNT_L(_chan, _idx) (GLTSYN_EVNT_L_0(_idx) + ((_chan) * 16))
289#define GLTSYN_EVNT_H(_chan, _idx) (GLTSYN_EVNT_H_0(_idx) + ((_chan) * 16))
290#define GLTSYN_EVNT_H_IDX_MAX 3
291
292/* Pin definitions for PTP PPS out */
293#define PPS_CLK_GEN_CHAN 3
294#define PPS_CLK_SRC_CHAN 2
295#define PPS_PIN_INDEX 5
296#define TIME_SYNC_PIN_INDEX 4
297#define N_EXT_TS_E810 3
298#define N_PER_OUT_E810 4
299#define N_PER_OUT_E810T 3
300#define N_PER_OUT_NO_SMA_E810T 2
301#define N_EXT_TS_NO_SMA_E810T 2
302#define ETH_GLTSYN_ENA(_i) (0x03000348 + ((_i) * 4))
303
304#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
305int ice_ptp_clock_index(struct ice_pf *pf);
306struct ice_pf;
307int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr);
308int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr);
309void ice_ptp_restore_timestamp_mode(struct ice_pf *pf);
310
311void ice_ptp_extts_event(struct ice_pf *pf);
312s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb);
313void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx);
314void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx);
315enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf);
316
317u64 ice_ptp_get_rx_hwts(const union ice_32b_rx_flex_desc *rx_desc,
318 const struct ice_pkt_ctx *pkt_ctx);
319void ice_ptp_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type);
320void ice_ptp_prepare_for_reset(struct ice_pf *pf,
321 enum ice_reset_req reset_type);
322void ice_ptp_init(struct ice_pf *pf);
323void ice_ptp_release(struct ice_pf *pf);
324void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup);
325#else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */
326static inline int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr)
327{
328 return -EOPNOTSUPP;
329}
330
331static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr)
332{
333 return -EOPNOTSUPP;
334}
335
336static inline void ice_ptp_restore_timestamp_mode(struct ice_pf *pf) { }
337static inline void ice_ptp_extts_event(struct ice_pf *pf) { }
338static inline s8
339ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb)
340{
341 return -1;
342}
343
344static inline void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx)
345{ }
346
347static inline void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx) { }
348
349static inline bool ice_ptp_process_ts(struct ice_pf *pf)
350{
351 return true;
352}
353
354static inline u64
355ice_ptp_get_rx_hwts(const union ice_32b_rx_flex_desc *rx_desc,
356 const struct ice_pkt_ctx *pkt_ctx)
357{
358 return 0;
359}
360
361static inline void ice_ptp_rebuild(struct ice_pf *pf,
362 enum ice_reset_req reset_type)
363{
364}
365
366static inline void ice_ptp_prepare_for_reset(struct ice_pf *pf,
367 enum ice_reset_req reset_type)
368{
369}
370static inline void ice_ptp_init(struct ice_pf *pf) { }
371static inline void ice_ptp_release(struct ice_pf *pf) { }
372static inline void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup)
373{
374}
375
376static inline int ice_ptp_clock_index(struct ice_pf *pf)
377{
378 return -1;
379}
380#endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */
381#endif /* _ICE_PTP_H_ */
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (C) 2021, Intel Corporation. */
3
4#ifndef _ICE_PTP_H_
5#define _ICE_PTP_H_
6
7#include <linux/ptp_clock_kernel.h>
8#include <linux/kthread.h>
9
10#include "ice_ptp_hw.h"
11
12enum ice_ptp_pin {
13 GPIO_20 = 0,
14 GPIO_21,
15 GPIO_22,
16 GPIO_23,
17 NUM_ICE_PTP_PIN
18};
19
20struct ice_perout_channel {
21 bool ena;
22 u32 gpio_pin;
23 u64 period;
24 u64 start_time;
25};
26
27/* The ice hardware captures Tx hardware timestamps in the PHY. The timestamp
28 * is stored in a buffer of registers. Depending on the specific hardware,
29 * this buffer might be shared across multiple PHY ports.
30 *
31 * On transmit of a packet to be timestamped, software is responsible for
32 * selecting an open index. Hardware makes no attempt to lock or prevent
33 * re-use of an index for multiple packets.
34 *
35 * To handle this, timestamp indexes must be tracked by software to ensure
36 * that an index is not re-used for multiple transmitted packets. The
37 * structures and functions declared in this file track the available Tx
38 * register indexes, as well as provide storage for the SKB pointers.
39 *
40 * To allow multiple ports to access the shared register block independently,
41 * the blocks are split up so that indexes are assigned to each port based on
42 * hardware logical port number.
43 */
44
45/**
46 * struct ice_tx_tstamp - Tracking for a single Tx timestamp
47 * @skb: pointer to the SKB for this timestamp request
48 * @start: jiffies when the timestamp was first requested
49 *
50 * This structure tracks a single timestamp request. The SKB pointer is
51 * provided when initiating a request. The start time is used to ensure that
52 * we discard old requests that were not fulfilled within a 2 second time
53 * window.
54 */
55struct ice_tx_tstamp {
56 struct sk_buff *skb;
57 unsigned long start;
58};
59
60/**
61 * struct ice_ptp_tx - Tracking structure for all Tx timestamp requests on a port
62 * @work: work function to handle processing of Tx timestamps
63 * @lock: lock to prevent concurrent write to in_use bitmap
64 * @tstamps: array of len to store outstanding requests
65 * @in_use: bitmap of len to indicate which slots are in use
66 * @quad: which quad the timestamps are captured in
67 * @quad_offset: offset into timestamp block of the quad to get the real index
68 * @len: length of the tstamps and in_use fields.
69 * @init: if true, the tracker is initialized;
70 */
71struct ice_ptp_tx {
72 struct kthread_work work;
73 spinlock_t lock; /* lock protecting in_use bitmap */
74 struct ice_tx_tstamp *tstamps;
75 unsigned long *in_use;
76 u8 quad;
77 u8 quad_offset;
78 u8 len;
79 u8 init;
80};
81
82/* Quad and port information for initializing timestamp blocks */
83#define INDEX_PER_QUAD 64
84#define INDEX_PER_PORT (INDEX_PER_QUAD / ICE_PORTS_PER_QUAD)
85
86/**
87 * struct ice_ptp_port - data used to initialize an external port for PTP
88 *
89 * This structure contains PTP data related to the external ports. Currently
90 * it is used for tracking the Tx timestamps of a port. In the future this
91 * structure will also hold information for the E822 port initialization
92 * logic.
93 *
94 * @tx: Tx timestamp tracking for this port
95 */
96struct ice_ptp_port {
97 struct ice_ptp_tx tx;
98};
99
100#define GLTSYN_TGT_H_IDX_MAX 4
101
102/**
103 * struct ice_ptp - data used for integrating with CONFIG_PTP_1588_CLOCK
104 * @port: data for the PHY port initialization procedure
105 * @work: delayed work function for periodic tasks
106 * @extts_work: work function for handling external Tx timestamps
107 * @cached_phc_time: a cached copy of the PHC time for timestamp extension
108 * @ext_ts_chan: the external timestamp channel in use
109 * @ext_ts_irq: the external timestamp IRQ in use
110 * @kworker: kwork thread for handling periodic work
111 * @perout_channels: periodic output data
112 * @info: structure defining PTP hardware capabilities
113 * @clock: pointer to registered PTP clock device
114 * @tstamp_config: hardware timestamping configuration
115 */
116struct ice_ptp {
117 struct ice_ptp_port port;
118 struct kthread_delayed_work work;
119 struct kthread_work extts_work;
120 u64 cached_phc_time;
121 u8 ext_ts_chan;
122 u8 ext_ts_irq;
123 struct kthread_worker *kworker;
124 struct ice_perout_channel perout_channels[GLTSYN_TGT_H_IDX_MAX];
125 struct ptp_clock_info info;
126 struct ptp_clock *clock;
127 struct hwtstamp_config tstamp_config;
128};
129
130#define __ptp_port_to_ptp(p) \
131 container_of((p), struct ice_ptp, port)
132#define ptp_port_to_pf(p) \
133 container_of(__ptp_port_to_ptp((p)), struct ice_pf, ptp)
134
135#define __ptp_info_to_ptp(i) \
136 container_of((i), struct ice_ptp, info)
137#define ptp_info_to_pf(i) \
138 container_of(__ptp_info_to_ptp((i)), struct ice_pf, ptp)
139
140#define PTP_SHARED_CLK_IDX_VALID BIT(31)
141#define ICE_PTP_TS_VALID BIT(0)
142
143/* Per-channel register definitions */
144#define GLTSYN_AUX_OUT(_chan, _idx) (GLTSYN_AUX_OUT_0(_idx) + ((_chan) * 8))
145#define GLTSYN_AUX_IN(_chan, _idx) (GLTSYN_AUX_IN_0(_idx) + ((_chan) * 8))
146#define GLTSYN_CLKO(_chan, _idx) (GLTSYN_CLKO_0(_idx) + ((_chan) * 8))
147#define GLTSYN_TGT_L(_chan, _idx) (GLTSYN_TGT_L_0(_idx) + ((_chan) * 16))
148#define GLTSYN_TGT_H(_chan, _idx) (GLTSYN_TGT_H_0(_idx) + ((_chan) * 16))
149#define GLTSYN_EVNT_L(_chan, _idx) (GLTSYN_EVNT_L_0(_idx) + ((_chan) * 16))
150#define GLTSYN_EVNT_H(_chan, _idx) (GLTSYN_EVNT_H_0(_idx) + ((_chan) * 16))
151#define GLTSYN_EVNT_H_IDX_MAX 3
152
153/* Pin definitions for PTP PPS out */
154#define PPS_CLK_GEN_CHAN 3
155#define PPS_CLK_SRC_CHAN 2
156#define PPS_PIN_INDEX 5
157#define TIME_SYNC_PIN_INDEX 4
158#define E810_N_EXT_TS 3
159#define E810_N_PER_OUT 4
160
161#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
162struct ice_pf;
163int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr);
164int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr);
165int ice_get_ptp_clock_index(struct ice_pf *pf);
166
167s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb);
168void ice_ptp_process_ts(struct ice_pf *pf);
169
170void
171ice_ptp_rx_hwtstamp(struct ice_ring *rx_ring,
172 union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb);
173void ice_ptp_init(struct ice_pf *pf);
174void ice_ptp_release(struct ice_pf *pf);
175#else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */
176static inline int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr)
177{
178 return -EOPNOTSUPP;
179}
180
181static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr)
182{
183 return -EOPNOTSUPP;
184}
185
186static inline int ice_get_ptp_clock_index(struct ice_pf *pf)
187{
188 return -1;
189}
190
191static inline s8
192ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb)
193{
194 return -1;
195}
196
197static inline void ice_ptp_process_ts(struct ice_pf *pf) { }
198static inline void
199ice_ptp_rx_hwtstamp(struct ice_ring *rx_ring,
200 union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb) { }
201static inline void ice_ptp_init(struct ice_pf *pf) { }
202static inline void ice_ptp_release(struct ice_pf *pf) { }
203#endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */
204#endif /* _ICE_PTP_H_ */