1/*
 2 * Copyright 2023 Advanced Micro Devices, Inc.
 3 *
 4 * Permission is hereby granted, free of charge, to any person obtaining a
 5 * copy of this software and associated documentation files (the "Software"),
 6 * to deal in the Software without restriction, including without limitation
 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 8 * and/or sell copies of the Software, and to permit persons to whom the
 9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
 
23#include "amdgpu.h"
24#include "amdgpu_ras.h"
25
26int amdgpu_hdp_ras_sw_init(struct amdgpu_device *adev)
27{
28	int err;
29	struct amdgpu_hdp_ras *ras;
30
31	if (!adev->hdp.ras)
32		return 0;
 
 
33
34	ras = adev->hdp.ras;
35	err = amdgpu_ras_register_ras_block(adev, &ras->ras_block);
36	if (err) {
37		dev_err(adev->dev, "Failed to register hdp ras block!\n");
38		return err;
 
 
 
 
 
 
 
 
 
 
39	}
40
41	strcpy(ras->ras_block.ras_comm.name, "hdp");
42	ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__HDP;
43	ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
44	adev->hdp.ras_if = &ras->ras_block.ras_comm;
45
46	/* hdp ras follows amdgpu_ras_block_late_init_default for late init */
47	return 0;
 
 
 
 
 
 
 
 
 
 
48}

 1/*
 2 * Copyright 2021 Advanced Micro Devices, Inc.
 3 *
 4 * Permission is hereby granted, free of charge, to any person obtaining a
 5 * copy of this software and associated documentation files (the "Software"),
 6 * to deal in the Software without restriction, including without limitation
 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 8 * and/or sell copies of the Software, and to permit persons to whom the
 9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#include "amdgpu.h"
25#include "amdgpu_ras.h"
26
27int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev)
28{
29	int r;
30	struct ras_ih_if ih_info = {
31		.cb = NULL,
32	};
33	struct ras_fs_if fs_info = {
34		.sysfs_name = "hdp_err_count",
35	};
36
37	if (!adev->hdp.ras_if) {
38		adev->hdp.ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
39		if (!adev->hdp.ras_if)
40			return -ENOMEM;
41		adev->hdp.ras_if->block = AMDGPU_RAS_BLOCK__HDP;
42		adev->hdp.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
43		adev->hdp.ras_if->sub_block_index = 0;
44		strcpy(adev->hdp.ras_if->name, "hdp");
45	}
46	ih_info.head = fs_info.head = *adev->hdp.ras_if;
47	r = amdgpu_ras_late_init(adev, adev->hdp.ras_if,
48				 &fs_info, &ih_info);
49	if (r || !amdgpu_ras_is_supported(adev, adev->hdp.ras_if->block)) {
50		kfree(adev->hdp.ras_if);
51		adev->hdp.ras_if = NULL;
52	}
53
54	return r;
55}
 
 
56
57void amdgpu_hdp_ras_fini(struct amdgpu_device *adev)
58{
59	if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__HDP) &&
60	    adev->hdp.ras_if) {
61		struct ras_common_if *ras_if = adev->hdp.ras_if;
62		struct ras_ih_if ih_info = {
63			.cb = NULL,
64		};
65
66		amdgpu_ras_late_fini(adev, ras_if, &ih_info);
67		kfree(ras_if);
68	}
69}