1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * Common definitions across all variants of ICP and ICS interrupt
  4 * controllers.
  5 */
  6
  7#ifndef _XICS_H
  8#define _XICS_H
  9
 10#include <linux/interrupt.h>
 11
 12#define XICS_IPI		2
 13#define XICS_IRQ_SPURIOUS	0
 14
 15/* Want a priority other than 0.  Various HW issues require this. */
 16#define	DEFAULT_PRIORITY	5
 17
 18/*
 19 * Mark IPIs as higher priority so we can take them inside interrupts
 20 * FIXME: still true now?
 21 */
 22#define IPI_PRIORITY		4
 23
 24/* The least favored priority */
 25#define LOWEST_PRIORITY		0xFF
 26
 27/* The number of priorities defined above */
 28#define MAX_NUM_PRIORITIES	3
 29
 30/* Native ICP */
 31#ifdef CONFIG_PPC_ICP_NATIVE
 32extern int icp_native_init(void);
 33extern void icp_native_flush_interrupt(void);
 34extern void icp_native_cause_ipi_rm(int cpu);
 35#else
 36static inline int icp_native_init(void) { return -ENODEV; }
 37#endif
 38
 39/* PAPR ICP */
 40#ifdef CONFIG_PPC_ICP_HV
 41int __init icp_hv_init(void);
 42#else
 43static inline int icp_hv_init(void) { return -ENODEV; }
 44#endif
 45
 46#ifdef CONFIG_PPC_POWERNV
 47int __init icp_opal_init(void);
 48extern void icp_opal_flush_interrupt(void);
 49#else
 50static inline int icp_opal_init(void) { return -ENODEV; }
 51#endif
 52
 53/* ICP ops */
 54struct icp_ops {
 55	unsigned int (*get_irq)(void);
 56	void (*eoi)(struct irq_data *d);
 57	void (*set_priority)(unsigned char prio);
 58	void (*teardown_cpu)(void);
 59	void (*flush_ipi)(void);
 60#ifdef CONFIG_SMP
 61	void (*cause_ipi)(int cpu);
 62	irq_handler_t ipi_action;
 63#endif
 64};
 65
 66extern const struct icp_ops *icp_ops;
 67
 68#ifdef CONFIG_PPC_ICS_NATIVE
 69/* Native ICS */
 70extern int ics_native_init(void);
 71#else
 72static inline int ics_native_init(void) { return -ENODEV; }
 73#endif
 74
 75/* RTAS ICS */
 76#ifdef CONFIG_PPC_ICS_RTAS
 77extern int ics_rtas_init(void);
 78#else
 79static inline int ics_rtas_init(void) { return -ENODEV; }
 80#endif
 81
 82/* HAL ICS */
 83#ifdef CONFIG_PPC_POWERNV
 84extern int ics_opal_init(void);
 85#else
 86static inline int ics_opal_init(void) { return -ENODEV; }
 87#endif
 88
 89/* ICS instance, hooked up to chip_data of an irq */
 90struct ics {
 91	struct list_head link;
 92	int (*check)(struct ics *ics, unsigned int hwirq);
 93	void (*mask_unknown)(struct ics *ics, unsigned long vec);
 94	long (*get_server)(struct ics *ics, unsigned long vec);
 95	int (*host_match)(struct ics *ics, struct device_node *node);
 96	struct irq_chip *chip;
 97	char data[];
 98};
 99
100/* Commons */
101extern unsigned int xics_default_server;
102extern unsigned int xics_default_distrib_server;
103extern unsigned int xics_interrupt_server_size;
104extern struct irq_domain *xics_host;
105
106struct xics_cppr {
107	unsigned char stack[MAX_NUM_PRIORITIES];
108	int index;
109};
110
111DECLARE_PER_CPU(struct xics_cppr, xics_cppr);
112
113static inline void xics_push_cppr(unsigned int vec)
114{
115	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
116
117	if (WARN_ON(os_cppr->index >= MAX_NUM_PRIORITIES - 1))
118		return;
119
120	if (vec == XICS_IPI)
121		os_cppr->stack[++os_cppr->index] = IPI_PRIORITY;
122	else
123		os_cppr->stack[++os_cppr->index] = DEFAULT_PRIORITY;
124}
125
126static inline unsigned char xics_pop_cppr(void)
127{
128	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
129
130	if (WARN_ON(os_cppr->index < 1))
131		return LOWEST_PRIORITY;
132
133	return os_cppr->stack[--os_cppr->index];
134}
135
136static inline void xics_set_base_cppr(unsigned char cppr)
137{
138	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
139
140	/* we only really want to set the priority when there's
141	 * just one cppr value on the stack
142	 */
143	WARN_ON(os_cppr->index != 0);
144
145	os_cppr->stack[0] = cppr;
146}
147
148static inline unsigned char xics_cppr_top(void)
149{
150	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
151	
152	return os_cppr->stack[os_cppr->index];
153}
154
155DECLARE_PER_CPU_SHARED_ALIGNED(unsigned long, xics_ipi_message);
156
157extern void xics_init(void);
158extern void xics_setup_cpu(void);
159extern void xics_update_irq_servers(void);
160extern void xics_set_cpu_giq(unsigned int gserver, unsigned int join);
161extern void xics_mask_unknown_vec(unsigned int vec);
 
162extern void xics_smp_probe(void);
163extern void xics_register_ics(struct ics *ics);
164extern void xics_teardown_cpu(void);
165extern void xics_kexec_teardown_cpu(int secondary);
166extern void xics_migrate_irqs_away(void);
167extern void icp_native_eoi(struct irq_data *d);
168extern int xics_set_irq_type(struct irq_data *d, unsigned int flow_type);
169extern int xics_retrigger(struct irq_data *data);
170#ifdef CONFIG_SMP
171extern int xics_get_irq_server(unsigned int virq, const struct cpumask *cpumask,
172			       unsigned int strict_check);
173#else
174#define xics_get_irq_server(virq, cpumask, strict_check) (xics_default_server)
175#endif
176
177
178#endif /* _XICS_H */

 
  1/*
  2 * Common definitions across all variants of ICP and ICS interrupt
  3 * controllers.
  4 */
  5
  6#ifndef _XICS_H
  7#define _XICS_H
  8
  9#include <linux/interrupt.h>
 10
 11#define XICS_IPI		2
 12#define XICS_IRQ_SPURIOUS	0
 13
 14/* Want a priority other than 0.  Various HW issues require this. */
 15#define	DEFAULT_PRIORITY	5
 16
 17/*
 18 * Mark IPIs as higher priority so we can take them inside interrupts
 19 * FIXME: still true now?
 20 */
 21#define IPI_PRIORITY		4
 22
 23/* The least favored priority */
 24#define LOWEST_PRIORITY		0xFF
 25
 26/* The number of priorities defined above */
 27#define MAX_NUM_PRIORITIES	3
 28
 29/* Native ICP */
 30#ifdef CONFIG_PPC_ICP_NATIVE
 31extern int icp_native_init(void);
 32extern void icp_native_flush_interrupt(void);
 33extern void icp_native_cause_ipi_rm(int cpu);
 34#else
 35static inline int icp_native_init(void) { return -ENODEV; }
 36#endif
 37
 38/* PAPR ICP */
 39#ifdef CONFIG_PPC_ICP_HV
 40extern int icp_hv_init(void);
 41#else
 42static inline int icp_hv_init(void) { return -ENODEV; }
 43#endif
 44
 
 
 
 
 
 
 
 45/* ICP ops */
 46struct icp_ops {
 47	unsigned int (*get_irq)(void);
 48	void (*eoi)(struct irq_data *d);
 49	void (*set_priority)(unsigned char prio);
 50	void (*teardown_cpu)(void);
 51	void (*flush_ipi)(void);
 52#ifdef CONFIG_SMP
 53	void (*cause_ipi)(int cpu, unsigned long data);
 54	irq_handler_t ipi_action;
 55#endif
 56};
 57
 58extern const struct icp_ops *icp_ops;
 59
 
 60/* Native ICS */
 61extern int ics_native_init(void);
 
 
 
 62
 63/* RTAS ICS */
 64#ifdef CONFIG_PPC_ICS_RTAS
 65extern int ics_rtas_init(void);
 66#else
 67static inline int ics_rtas_init(void) { return -ENODEV; }
 68#endif
 69
 70/* HAL ICS */
 71#ifdef CONFIG_PPC_POWERNV
 72extern int ics_opal_init(void);
 73#else
 74static inline int ics_opal_init(void) { return -ENODEV; }
 75#endif
 76
 77/* ICS instance, hooked up to chip_data of an irq */
 78struct ics {
 79	struct list_head link;
 80	int (*map)(struct ics *ics, unsigned int virq);
 81	void (*mask_unknown)(struct ics *ics, unsigned long vec);
 82	long (*get_server)(struct ics *ics, unsigned long vec);
 83	int (*host_match)(struct ics *ics, struct device_node *node);
 
 84	char data[];
 85};
 86
 87/* Commons */
 88extern unsigned int xics_default_server;
 89extern unsigned int xics_default_distrib_server;
 90extern unsigned int xics_interrupt_server_size;
 91extern struct irq_domain *xics_host;
 92
 93struct xics_cppr {
 94	unsigned char stack[MAX_NUM_PRIORITIES];
 95	int index;
 96};
 97
 98DECLARE_PER_CPU(struct xics_cppr, xics_cppr);
 99
100static inline void xics_push_cppr(unsigned int vec)
101{
102	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
103
104	if (WARN_ON(os_cppr->index >= MAX_NUM_PRIORITIES - 1))
105		return;
106
107	if (vec == XICS_IPI)
108		os_cppr->stack[++os_cppr->index] = IPI_PRIORITY;
109	else
110		os_cppr->stack[++os_cppr->index] = DEFAULT_PRIORITY;
111}
112
113static inline unsigned char xics_pop_cppr(void)
114{
115	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
116
117	if (WARN_ON(os_cppr->index < 1))
118		return LOWEST_PRIORITY;
119
120	return os_cppr->stack[--os_cppr->index];
121}
122
123static inline void xics_set_base_cppr(unsigned char cppr)
124{
125	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
126
127	/* we only really want to set the priority when there's
128	 * just one cppr value on the stack
129	 */
130	WARN_ON(os_cppr->index != 0);
131
132	os_cppr->stack[0] = cppr;
133}
134
135static inline unsigned char xics_cppr_top(void)
136{
137	struct xics_cppr *os_cppr = this_cpu_ptr(&xics_cppr);
138	
139	return os_cppr->stack[os_cppr->index];
140}
141
142DECLARE_PER_CPU_SHARED_ALIGNED(unsigned long, xics_ipi_message);
143
144extern void xics_init(void);
145extern void xics_setup_cpu(void);
146extern void xics_update_irq_servers(void);
147extern void xics_set_cpu_giq(unsigned int gserver, unsigned int join);
148extern void xics_mask_unknown_vec(unsigned int vec);
149extern irqreturn_t xics_ipi_dispatch(int cpu);
150extern void xics_smp_probe(void);
151extern void xics_register_ics(struct ics *ics);
152extern void xics_teardown_cpu(void);
153extern void xics_kexec_teardown_cpu(int secondary);
154extern void xics_migrate_irqs_away(void);
155extern void icp_native_eoi(struct irq_data *d);
 
 
156#ifdef CONFIG_SMP
157extern int xics_get_irq_server(unsigned int virq, const struct cpumask *cpumask,
158			       unsigned int strict_check);
159#else
160#define xics_get_irq_server(virq, cpumask, strict_check) (xics_default_server)
161#endif
162
163
164#endif /* _XICS_H */