1/*
 2 * Copyright 2012-16 Advanced Micro Devices, Inc.
 3 *
 4 * Permission is hereby granted, free of charge, to any person obtaining a
 5 * copy of this software and associated documentation files (the "Software"),
 6 * to deal in the Software without restriction, including without limitation
 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 8 * and/or sell copies of the Software, and to permit persons to whom the
 9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef __DISPLAY_CLOCK_H__
27#define __DISPLAY_CLOCK_H__
28
29#include "dm_services_types.h"
30
31
32struct clocks_value {
33	int dispclk_in_khz;
34	int max_pixelclk_in_khz;
35	int max_non_dp_phyclk_in_khz;
36	int max_dp_phyclk_in_khz;
37	bool dispclk_notify_pplib_done;
38	bool pixelclk_notify_pplib_done;
39	bool phyclk_notigy_pplib_done;
40	int dcfclock_in_khz;
41	int dppclk_in_khz;
42	int mclk_in_khz;
43	int phyclk_in_khz;
44	int common_vdd_level;
45};
46
47
48/* Structure containing all state-dependent clocks
49 * (dependent on "enum clocks_state") */
50struct state_dependent_clocks {
51	int display_clk_khz;
52	int pixel_clk_khz;
53};
54
55struct display_clock {
56	struct dc_context *ctx;
57	const struct display_clock_funcs *funcs;
58
59	enum dm_pp_clocks_state max_clks_state;
60	enum dm_pp_clocks_state cur_min_clks_state;
61	struct clocks_value cur_clocks_value;
62};
63
64struct display_clock_funcs {
65	int (*set_clock)(struct display_clock *disp_clk,
66		int requested_clock_khz);
67
68	enum dm_pp_clocks_state (*get_required_clocks_state)(
69		struct display_clock *disp_clk,
70		struct state_dependent_clocks *req_clocks);
71
72	bool (*set_min_clocks_state)(struct display_clock *disp_clk,
73		enum dm_pp_clocks_state dm_pp_clocks_state);
74
75	int (*get_dp_ref_clk_frequency)(struct display_clock *disp_clk);
76
77	bool (*apply_clock_voltage_request)(
78		struct display_clock *disp_clk,
79		enum dm_pp_clock_type clocks_type,
80		int clocks_in_khz,
81		bool pre_mode_set,
82		bool update_dp_phyclk);
83};
84
85#endif /* __DISPLAY_CLOCK_H__ */