1/*
  2 * Copyright 2009 VMware, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: Michel Dänzer
 23 */
 24#include <drm/drmP.h>
 25#include <drm/amdgpu_drm.h>
 26#include "amdgpu.h"
 27#include "amdgpu_uvd.h"
 28#include "amdgpu_vce.h"
 29
 30/* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
 31static void amdgpu_do_test_moves(struct amdgpu_device *adev)
 32{
 33	struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
 34	struct amdgpu_bo *vram_obj = NULL;
 35	struct amdgpu_bo **gtt_obj = NULL;
 36	uint64_t gart_addr, vram_addr;
 37	unsigned n, size;
 38	int i, r;
 39
 40	size = 1024 * 1024;
 41
 42	/* Number of tests =
 43	 * (Total GTT - IB pool - writeback page - ring buffers) / test size
 44	 */
 45	n = adev->gmc.gart_size - AMDGPU_IB_POOL_SIZE*64*1024;
 46	for (i = 0; i < AMDGPU_MAX_RINGS; ++i)
 47		if (adev->rings[i])
 48			n -= adev->rings[i]->ring_size;
 49	if (adev->wb.wb_obj)
 50		n -= AMDGPU_GPU_PAGE_SIZE;
 51	if (adev->irq.ih.ring_obj)
 52		n -= adev->irq.ih.ring_size;
 53	n /= size;
 54
 55	gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
 56	if (!gtt_obj) {
 57		DRM_ERROR("Failed to allocate %d pointers\n", n);
 58		r = 1;
 59		goto out_cleanup;
 60	}
 61
 62	r = amdgpu_bo_create(adev, size, PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM, 0,
 63			     ttm_bo_type_kernel, NULL, &vram_obj);
 64	if (r) {
 65		DRM_ERROR("Failed to create VRAM object\n");
 66		goto out_cleanup;
 67	}
 68	r = amdgpu_bo_reserve(vram_obj, false);
 69	if (unlikely(r != 0))
 70		goto out_unref;
 71	r = amdgpu_bo_pin(vram_obj, AMDGPU_GEM_DOMAIN_VRAM, &vram_addr);
 72	if (r) {
 73		DRM_ERROR("Failed to pin VRAM object\n");
 74		goto out_unres;
 75	}
 76	for (i = 0; i < n; i++) {
 77		void *gtt_map, *vram_map;
 78		void **gart_start, **gart_end;
 79		void **vram_start, **vram_end;
 80		struct dma_fence *fence = NULL;
 81
 82		r = amdgpu_bo_create(adev, size, PAGE_SIZE,
 83				     AMDGPU_GEM_DOMAIN_GTT, 0,
 84				     ttm_bo_type_kernel, NULL, gtt_obj + i);
 85		if (r) {
 86			DRM_ERROR("Failed to create GTT object %d\n", i);
 87			goto out_lclean;
 88		}
 89
 90		r = amdgpu_bo_reserve(gtt_obj[i], false);
 91		if (unlikely(r != 0))
 92			goto out_lclean_unref;
 93		r = amdgpu_bo_pin(gtt_obj[i], AMDGPU_GEM_DOMAIN_GTT, &gart_addr);
 94		if (r) {
 95			DRM_ERROR("Failed to pin GTT object %d\n", i);
 96			goto out_lclean_unres;
 97		}
 98
 99		r = amdgpu_bo_kmap(gtt_obj[i], &gtt_map);
100		if (r) {
101			DRM_ERROR("Failed to map GTT object %d\n", i);
102			goto out_lclean_unpin;
103		}
104
105		for (gart_start = gtt_map, gart_end = gtt_map + size;
106		     gart_start < gart_end;
107		     gart_start++)
108			*gart_start = gart_start;
109
110		amdgpu_bo_kunmap(gtt_obj[i]);
111
112		r = amdgpu_copy_buffer(ring, gart_addr, vram_addr,
113				       size, NULL, &fence, false, false);
114
115		if (r) {
116			DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
117			goto out_lclean_unpin;
118		}
119
120		r = dma_fence_wait(fence, false);
121		if (r) {
122			DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
123			goto out_lclean_unpin;
124		}
125
126		dma_fence_put(fence);
127
128		r = amdgpu_bo_kmap(vram_obj, &vram_map);
129		if (r) {
130			DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
131			goto out_lclean_unpin;
132		}
133
134		for (gart_start = gtt_map, gart_end = gtt_map + size,
135		     vram_start = vram_map, vram_end = vram_map + size;
136		     vram_start < vram_end;
137		     gart_start++, vram_start++) {
138			if (*vram_start != gart_start) {
139				DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
140					  "expected 0x%p (GTT/VRAM offset "
141					  "0x%16llx/0x%16llx)\n",
142					  i, *vram_start, gart_start,
143					  (unsigned long long)
144					  (gart_addr - adev->gmc.gart_start +
145					   (void*)gart_start - gtt_map),
146					  (unsigned long long)
147					  (vram_addr - adev->gmc.vram_start +
148					   (void*)gart_start - gtt_map));
149				amdgpu_bo_kunmap(vram_obj);
150				goto out_lclean_unpin;
151			}
152			*vram_start = vram_start;
153		}
154
155		amdgpu_bo_kunmap(vram_obj);
156
157		r = amdgpu_copy_buffer(ring, vram_addr, gart_addr,
158				       size, NULL, &fence, false, false);
159
160		if (r) {
161			DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
162			goto out_lclean_unpin;
163		}
164
165		r = dma_fence_wait(fence, false);
166		if (r) {
167			DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
168			goto out_lclean_unpin;
169		}
170
171		dma_fence_put(fence);
172
173		r = amdgpu_bo_kmap(gtt_obj[i], &gtt_map);
174		if (r) {
175			DRM_ERROR("Failed to map GTT object after copy %d\n", i);
176			goto out_lclean_unpin;
177		}
178
179		for (gart_start = gtt_map, gart_end = gtt_map + size,
180		     vram_start = vram_map, vram_end = vram_map + size;
181		     gart_start < gart_end;
182		     gart_start++, vram_start++) {
183			if (*gart_start != vram_start) {
184				DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
185					  "expected 0x%p (VRAM/GTT offset "
186					  "0x%16llx/0x%16llx)\n",
187					  i, *gart_start, vram_start,
188					  (unsigned long long)
189					  (vram_addr - adev->gmc.vram_start +
190					   (void*)vram_start - vram_map),
191					  (unsigned long long)
192					  (gart_addr - adev->gmc.gart_start +
193					   (void*)vram_start - vram_map));
194				amdgpu_bo_kunmap(gtt_obj[i]);
195				goto out_lclean_unpin;
196			}
197		}
198
199		amdgpu_bo_kunmap(gtt_obj[i]);
200
201		DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
202			 gart_addr - adev->gmc.gart_start);
203		continue;
204
205out_lclean_unpin:
206		amdgpu_bo_unpin(gtt_obj[i]);
207out_lclean_unres:
208		amdgpu_bo_unreserve(gtt_obj[i]);
209out_lclean_unref:
210		amdgpu_bo_unref(&gtt_obj[i]);
211out_lclean:
212		for (--i; i >= 0; --i) {
213			amdgpu_bo_unpin(gtt_obj[i]);
214			amdgpu_bo_unreserve(gtt_obj[i]);
215			amdgpu_bo_unref(&gtt_obj[i]);
216		}
217		if (fence)
218			dma_fence_put(fence);
219		break;
220	}
221
222	amdgpu_bo_unpin(vram_obj);
223out_unres:
224	amdgpu_bo_unreserve(vram_obj);
225out_unref:
226	amdgpu_bo_unref(&vram_obj);
227out_cleanup:
228	kfree(gtt_obj);
229	if (r) {
230		pr_warn("Error while testing BO move\n");
231	}
232}
233
234void amdgpu_test_moves(struct amdgpu_device *adev)
235{
236	if (adev->mman.buffer_funcs)
237		amdgpu_do_test_moves(adev);
238}