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1/*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Christian König
23 */
24
25#include <drm/ttm/ttm_range_manager.h>
26
27#include "amdgpu.h"
28
29static inline struct amdgpu_gtt_mgr *
30to_gtt_mgr(struct ttm_resource_manager *man)
31{
32 return container_of(man, struct amdgpu_gtt_mgr, manager);
33}
34
35/**
36 * DOC: mem_info_gtt_total
37 *
38 * The amdgpu driver provides a sysfs API for reporting current total size of
39 * the GTT.
40 * The file mem_info_gtt_total is used for this, and returns the total size of
41 * the GTT block, in bytes
42 */
43static ssize_t amdgpu_mem_info_gtt_total_show(struct device *dev,
44 struct device_attribute *attr,
45 char *buf)
46{
47 struct drm_device *ddev = dev_get_drvdata(dev);
48 struct amdgpu_device *adev = drm_to_adev(ddev);
49 struct ttm_resource_manager *man;
50
51 man = ttm_manager_type(&adev->mman.bdev, TTM_PL_TT);
52 return sysfs_emit(buf, "%llu\n", man->size);
53}
54
55/**
56 * DOC: mem_info_gtt_used
57 *
58 * The amdgpu driver provides a sysfs API for reporting current total amount of
59 * used GTT.
60 * The file mem_info_gtt_used is used for this, and returns the current used
61 * size of the GTT block, in bytes
62 */
63static ssize_t amdgpu_mem_info_gtt_used_show(struct device *dev,
64 struct device_attribute *attr,
65 char *buf)
66{
67 struct drm_device *ddev = dev_get_drvdata(dev);
68 struct amdgpu_device *adev = drm_to_adev(ddev);
69 struct ttm_resource_manager *man = &adev->mman.gtt_mgr.manager;
70
71 return sysfs_emit(buf, "%llu\n", ttm_resource_manager_usage(man));
72}
73
74static DEVICE_ATTR(mem_info_gtt_total, S_IRUGO,
75 amdgpu_mem_info_gtt_total_show, NULL);
76static DEVICE_ATTR(mem_info_gtt_used, S_IRUGO,
77 amdgpu_mem_info_gtt_used_show, NULL);
78
79static struct attribute *amdgpu_gtt_mgr_attributes[] = {
80 &dev_attr_mem_info_gtt_total.attr,
81 &dev_attr_mem_info_gtt_used.attr,
82 NULL
83};
84
85const struct attribute_group amdgpu_gtt_mgr_attr_group = {
86 .attrs = amdgpu_gtt_mgr_attributes
87};
88
89/**
90 * amdgpu_gtt_mgr_has_gart_addr - Check if mem has address space
91 *
92 * @res: the mem object to check
93 *
94 * Check if a mem object has already address space allocated.
95 */
96bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *res)
97{
98 struct ttm_range_mgr_node *node = to_ttm_range_mgr_node(res);
99
100 return drm_mm_node_allocated(&node->mm_nodes[0]);
101}
102
103/**
104 * amdgpu_gtt_mgr_new - allocate a new node
105 *
106 * @man: TTM memory type manager
107 * @tbo: TTM BO we need this range for
108 * @place: placement flags and restrictions
109 * @res: the resulting mem object
110 *
111 * Dummy, allocate the node but no space for it yet.
112 */
113static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man,
114 struct ttm_buffer_object *tbo,
115 const struct ttm_place *place,
116 struct ttm_resource **res)
117{
118 struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man);
119 uint32_t num_pages = PFN_UP(tbo->base.size);
120 struct ttm_range_mgr_node *node;
121 int r;
122
123 node = kzalloc(struct_size(node, mm_nodes, 1), GFP_KERNEL);
124 if (!node)
125 return -ENOMEM;
126
127 ttm_resource_init(tbo, place, &node->base);
128 if (!(place->flags & TTM_PL_FLAG_TEMPORARY) &&
129 ttm_resource_manager_usage(man) > man->size) {
130 r = -ENOSPC;
131 goto err_free;
132 }
133
134 if (place->lpfn) {
135 spin_lock(&mgr->lock);
136 r = drm_mm_insert_node_in_range(&mgr->mm, &node->mm_nodes[0],
137 num_pages, tbo->page_alignment,
138 0, place->fpfn, place->lpfn,
139 DRM_MM_INSERT_BEST);
140 spin_unlock(&mgr->lock);
141 if (unlikely(r))
142 goto err_free;
143
144 node->base.start = node->mm_nodes[0].start;
145 } else {
146 node->mm_nodes[0].start = 0;
147 node->mm_nodes[0].size = PFN_UP(node->base.size);
148 node->base.start = AMDGPU_BO_INVALID_OFFSET;
149 }
150
151 *res = &node->base;
152 return 0;
153
154err_free:
155 ttm_resource_fini(man, &node->base);
156 kfree(node);
157 return r;
158}
159
160/**
161 * amdgpu_gtt_mgr_del - free ranges
162 *
163 * @man: TTM memory type manager
164 * @res: TTM memory object
165 *
166 * Free the allocated GTT again.
167 */
168static void amdgpu_gtt_mgr_del(struct ttm_resource_manager *man,
169 struct ttm_resource *res)
170{
171 struct ttm_range_mgr_node *node = to_ttm_range_mgr_node(res);
172 struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man);
173
174 spin_lock(&mgr->lock);
175 if (drm_mm_node_allocated(&node->mm_nodes[0]))
176 drm_mm_remove_node(&node->mm_nodes[0]);
177 spin_unlock(&mgr->lock);
178
179 ttm_resource_fini(man, res);
180 kfree(node);
181}
182
183/**
184 * amdgpu_gtt_mgr_recover - re-init gart
185 *
186 * @mgr: amdgpu_gtt_mgr pointer
187 *
188 * Re-init the gart for each known BO in the GTT.
189 */
190void amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr *mgr)
191{
192 struct ttm_range_mgr_node *node;
193 struct drm_mm_node *mm_node;
194 struct amdgpu_device *adev;
195
196 adev = container_of(mgr, typeof(*adev), mman.gtt_mgr);
197 spin_lock(&mgr->lock);
198 drm_mm_for_each_node(mm_node, &mgr->mm) {
199 node = container_of(mm_node, typeof(*node), mm_nodes[0]);
200 amdgpu_ttm_recover_gart(node->base.bo);
201 }
202 spin_unlock(&mgr->lock);
203
204 amdgpu_gart_invalidate_tlb(adev);
205}
206
207/**
208 * amdgpu_gtt_mgr_intersects - test for intersection
209 *
210 * @man: Our manager object
211 * @res: The resource to test
212 * @place: The place for the new allocation
213 * @size: The size of the new allocation
214 *
215 * Simplified intersection test, only interesting if we need GART or not.
216 */
217static bool amdgpu_gtt_mgr_intersects(struct ttm_resource_manager *man,
218 struct ttm_resource *res,
219 const struct ttm_place *place,
220 size_t size)
221{
222 return !place->lpfn || amdgpu_gtt_mgr_has_gart_addr(res);
223}
224
225/**
226 * amdgpu_gtt_mgr_compatible - test for compatibility
227 *
228 * @man: Our manager object
229 * @res: The resource to test
230 * @place: The place for the new allocation
231 * @size: The size of the new allocation
232 *
233 * Simplified compatibility test.
234 */
235static bool amdgpu_gtt_mgr_compatible(struct ttm_resource_manager *man,
236 struct ttm_resource *res,
237 const struct ttm_place *place,
238 size_t size)
239{
240 return !place->lpfn || amdgpu_gtt_mgr_has_gart_addr(res);
241}
242
243/**
244 * amdgpu_gtt_mgr_debug - dump VRAM table
245 *
246 * @man: TTM memory type manager
247 * @printer: DRM printer to use
248 *
249 * Dump the table content using printk.
250 */
251static void amdgpu_gtt_mgr_debug(struct ttm_resource_manager *man,
252 struct drm_printer *printer)
253{
254 struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man);
255
256 spin_lock(&mgr->lock);
257 drm_mm_print(&mgr->mm, printer);
258 spin_unlock(&mgr->lock);
259}
260
261static const struct ttm_resource_manager_func amdgpu_gtt_mgr_func = {
262 .alloc = amdgpu_gtt_mgr_new,
263 .free = amdgpu_gtt_mgr_del,
264 .intersects = amdgpu_gtt_mgr_intersects,
265 .compatible = amdgpu_gtt_mgr_compatible,
266 .debug = amdgpu_gtt_mgr_debug
267};
268
269/**
270 * amdgpu_gtt_mgr_init - init GTT manager and DRM MM
271 *
272 * @adev: amdgpu_device pointer
273 * @gtt_size: maximum size of GTT
274 *
275 * Allocate and initialize the GTT manager.
276 */
277int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size)
278{
279 struct amdgpu_gtt_mgr *mgr = &adev->mman.gtt_mgr;
280 struct ttm_resource_manager *man = &mgr->manager;
281 uint64_t start, size;
282
283 man->use_tt = true;
284 man->func = &amdgpu_gtt_mgr_func;
285
286 ttm_resource_manager_init(man, &adev->mman.bdev, gtt_size);
287
288 start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
289 size = (adev->gmc.gart_size >> PAGE_SHIFT) - start;
290 drm_mm_init(&mgr->mm, start, size);
291 spin_lock_init(&mgr->lock);
292
293 ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_TT, &mgr->manager);
294 ttm_resource_manager_set_used(man, true);
295 return 0;
296}
297
298/**
299 * amdgpu_gtt_mgr_fini - free and destroy GTT manager
300 *
301 * @adev: amdgpu_device pointer
302 *
303 * Destroy and free the GTT manager, returns -EBUSY if ranges are still
304 * allocated inside it.
305 */
306void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev)
307{
308 struct amdgpu_gtt_mgr *mgr = &adev->mman.gtt_mgr;
309 struct ttm_resource_manager *man = &mgr->manager;
310 int ret;
311
312 ttm_resource_manager_set_used(man, false);
313
314 ret = ttm_resource_manager_evict_all(&adev->mman.bdev, man);
315 if (ret)
316 return;
317
318 spin_lock(&mgr->lock);
319 drm_mm_takedown(&mgr->mm);
320 spin_unlock(&mgr->lock);
321
322 ttm_resource_manager_cleanup(man);
323 ttm_set_driver_manager(&adev->mman.bdev, TTM_PL_TT, NULL);
324}
1/*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Christian König
23 */
24
25#include <drm/drmP.h>
26#include "amdgpu.h"
27
28struct amdgpu_gtt_mgr {
29 struct drm_mm mm;
30 spinlock_t lock;
31 atomic64_t available;
32};
33
34struct amdgpu_gtt_node {
35 struct drm_mm_node node;
36 struct ttm_buffer_object *tbo;
37};
38
39/**
40 * amdgpu_gtt_mgr_init - init GTT manager and DRM MM
41 *
42 * @man: TTM memory type manager
43 * @p_size: maximum size of GTT
44 *
45 * Allocate and initialize the GTT manager.
46 */
47static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man,
48 unsigned long p_size)
49{
50 struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
51 struct amdgpu_gtt_mgr *mgr;
52 uint64_t start, size;
53
54 mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
55 if (!mgr)
56 return -ENOMEM;
57
58 start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
59 size = (adev->gmc.gart_size >> PAGE_SHIFT) - start;
60 drm_mm_init(&mgr->mm, start, size);
61 spin_lock_init(&mgr->lock);
62 atomic64_set(&mgr->available, p_size);
63 man->priv = mgr;
64 return 0;
65}
66
67/**
68 * amdgpu_gtt_mgr_fini - free and destroy GTT manager
69 *
70 * @man: TTM memory type manager
71 *
72 * Destroy and free the GTT manager, returns -EBUSY if ranges are still
73 * allocated inside it.
74 */
75static int amdgpu_gtt_mgr_fini(struct ttm_mem_type_manager *man)
76{
77 struct amdgpu_gtt_mgr *mgr = man->priv;
78 spin_lock(&mgr->lock);
79 drm_mm_takedown(&mgr->mm);
80 spin_unlock(&mgr->lock);
81 kfree(mgr);
82 man->priv = NULL;
83 return 0;
84}
85
86/**
87 * amdgpu_gtt_mgr_has_gart_addr - Check if mem has address space
88 *
89 * @mem: the mem object to check
90 *
91 * Check if a mem object has already address space allocated.
92 */
93bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_mem_reg *mem)
94{
95 struct amdgpu_gtt_node *node = mem->mm_node;
96
97 return (node->node.start != AMDGPU_BO_INVALID_OFFSET);
98}
99
100/**
101 * amdgpu_gtt_mgr_alloc - allocate new ranges
102 *
103 * @man: TTM memory type manager
104 * @tbo: TTM BO we need this range for
105 * @place: placement flags and restrictions
106 * @mem: the resulting mem object
107 *
108 * Allocate the address space for a node.
109 */
110static int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
111 struct ttm_buffer_object *tbo,
112 const struct ttm_place *place,
113 struct ttm_mem_reg *mem)
114{
115 struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
116 struct amdgpu_gtt_mgr *mgr = man->priv;
117 struct amdgpu_gtt_node *node = mem->mm_node;
118 enum drm_mm_insert_mode mode;
119 unsigned long fpfn, lpfn;
120 int r;
121
122 if (amdgpu_gtt_mgr_has_gart_addr(mem))
123 return 0;
124
125 if (place)
126 fpfn = place->fpfn;
127 else
128 fpfn = 0;
129
130 if (place && place->lpfn)
131 lpfn = place->lpfn;
132 else
133 lpfn = adev->gart.num_cpu_pages;
134
135 mode = DRM_MM_INSERT_BEST;
136 if (place && place->flags & TTM_PL_FLAG_TOPDOWN)
137 mode = DRM_MM_INSERT_HIGH;
138
139 spin_lock(&mgr->lock);
140 r = drm_mm_insert_node_in_range(&mgr->mm, &node->node, mem->num_pages,
141 mem->page_alignment, 0, fpfn, lpfn,
142 mode);
143 spin_unlock(&mgr->lock);
144
145 if (!r)
146 mem->start = node->node.start;
147
148 return r;
149}
150
151/**
152 * amdgpu_gtt_mgr_new - allocate a new node
153 *
154 * @man: TTM memory type manager
155 * @tbo: TTM BO we need this range for
156 * @place: placement flags and restrictions
157 * @mem: the resulting mem object
158 *
159 * Dummy, allocate the node but no space for it yet.
160 */
161static int amdgpu_gtt_mgr_new(struct ttm_mem_type_manager *man,
162 struct ttm_buffer_object *tbo,
163 const struct ttm_place *place,
164 struct ttm_mem_reg *mem)
165{
166 struct amdgpu_gtt_mgr *mgr = man->priv;
167 struct amdgpu_gtt_node *node;
168 int r;
169
170 spin_lock(&mgr->lock);
171 if ((&tbo->mem == mem || tbo->mem.mem_type != TTM_PL_TT) &&
172 atomic64_read(&mgr->available) < mem->num_pages) {
173 spin_unlock(&mgr->lock);
174 return 0;
175 }
176 atomic64_sub(mem->num_pages, &mgr->available);
177 spin_unlock(&mgr->lock);
178
179 node = kzalloc(sizeof(*node), GFP_KERNEL);
180 if (!node) {
181 r = -ENOMEM;
182 goto err_out;
183 }
184
185 node->node.start = AMDGPU_BO_INVALID_OFFSET;
186 node->node.size = mem->num_pages;
187 node->tbo = tbo;
188 mem->mm_node = node;
189
190 if (place->fpfn || place->lpfn || place->flags & TTM_PL_FLAG_TOPDOWN) {
191 r = amdgpu_gtt_mgr_alloc(man, tbo, place, mem);
192 if (unlikely(r)) {
193 kfree(node);
194 mem->mm_node = NULL;
195 r = 0;
196 goto err_out;
197 }
198 } else {
199 mem->start = node->node.start;
200 }
201
202 return 0;
203err_out:
204 atomic64_add(mem->num_pages, &mgr->available);
205
206 return r;
207}
208
209/**
210 * amdgpu_gtt_mgr_del - free ranges
211 *
212 * @man: TTM memory type manager
213 * @tbo: TTM BO we need this range for
214 * @place: placement flags and restrictions
215 * @mem: TTM memory object
216 *
217 * Free the allocated GTT again.
218 */
219static void amdgpu_gtt_mgr_del(struct ttm_mem_type_manager *man,
220 struct ttm_mem_reg *mem)
221{
222 struct amdgpu_gtt_mgr *mgr = man->priv;
223 struct amdgpu_gtt_node *node = mem->mm_node;
224
225 if (!node)
226 return;
227
228 spin_lock(&mgr->lock);
229 if (node->node.start != AMDGPU_BO_INVALID_OFFSET)
230 drm_mm_remove_node(&node->node);
231 spin_unlock(&mgr->lock);
232 atomic64_add(mem->num_pages, &mgr->available);
233
234 kfree(node);
235 mem->mm_node = NULL;
236}
237
238/**
239 * amdgpu_gtt_mgr_usage - return usage of GTT domain
240 *
241 * @man: TTM memory type manager
242 *
243 * Return how many bytes are used in the GTT domain
244 */
245uint64_t amdgpu_gtt_mgr_usage(struct ttm_mem_type_manager *man)
246{
247 struct amdgpu_gtt_mgr *mgr = man->priv;
248 s64 result = man->size - atomic64_read(&mgr->available);
249
250 return (result > 0 ? result : 0) * PAGE_SIZE;
251}
252
253int amdgpu_gtt_mgr_recover(struct ttm_mem_type_manager *man)
254{
255 struct amdgpu_gtt_mgr *mgr = man->priv;
256 struct amdgpu_gtt_node *node;
257 struct drm_mm_node *mm_node;
258 int r = 0;
259
260 spin_lock(&mgr->lock);
261 drm_mm_for_each_node(mm_node, &mgr->mm) {
262 node = container_of(mm_node, struct amdgpu_gtt_node, node);
263 r = amdgpu_ttm_recover_gart(node->tbo);
264 if (r)
265 break;
266 }
267 spin_unlock(&mgr->lock);
268
269 return r;
270}
271
272/**
273 * amdgpu_gtt_mgr_debug - dump VRAM table
274 *
275 * @man: TTM memory type manager
276 * @printer: DRM printer to use
277 *
278 * Dump the table content using printk.
279 */
280static void amdgpu_gtt_mgr_debug(struct ttm_mem_type_manager *man,
281 struct drm_printer *printer)
282{
283 struct amdgpu_gtt_mgr *mgr = man->priv;
284
285 spin_lock(&mgr->lock);
286 drm_mm_print(&mgr->mm, printer);
287 spin_unlock(&mgr->lock);
288
289 drm_printf(printer, "man size:%llu pages, gtt available:%lld pages, usage:%lluMB\n",
290 man->size, (u64)atomic64_read(&mgr->available),
291 amdgpu_gtt_mgr_usage(man) >> 20);
292}
293
294const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func = {
295 .init = amdgpu_gtt_mgr_init,
296 .takedown = amdgpu_gtt_mgr_fini,
297 .get_node = amdgpu_gtt_mgr_new,
298 .put_node = amdgpu_gtt_mgr_del,
299 .debug = amdgpu_gtt_mgr_debug
300};