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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - https://www.ti.com
4 *
5 * Authors:
6 * Jyri Sarha <jsarha@ti.com>
7 * Sergej Sawazki <ce3a@gmx.de>
8 *
9 * Gpio controlled clock implementation
10 */
11
12#include <linux/clk-provider.h>
13#include <linux/export.h>
14#include <linux/slab.h>
15#include <linux/gpio/consumer.h>
16#include <linux/err.h>
17#include <linux/device.h>
18#include <linux/of.h>
19#include <linux/platform_device.h>
20
21/**
22 * DOC: basic gpio gated clock which can be enabled and disabled
23 * with gpio output
24 * Traits of this clock:
25 * prepare - clk_(un)prepare only ensures parent is (un)prepared
26 * enable - clk_enable and clk_disable are functional & control gpio
27 * rate - inherits rate from parent. No clk_set_rate support
28 * parent - fixed parent. No clk_set_parent support
29 */
30
31/**
32 * struct clk_gpio - gpio gated clock
33 *
34 * @hw: handle between common and hardware-specific interfaces
35 * @gpiod: gpio descriptor
36 *
37 * Clock with a gpio control for enabling and disabling the parent clock
38 * or switching between two parents by asserting or deasserting the gpio.
39 *
40 * Implements .enable, .disable and .is_enabled or
41 * .get_parent, .set_parent and .determine_rate depending on which clk_ops
42 * is used.
43 */
44struct clk_gpio {
45 struct clk_hw hw;
46 struct gpio_desc *gpiod;
47};
48
49#define to_clk_gpio(_hw) container_of(_hw, struct clk_gpio, hw)
50
51static int clk_gpio_gate_enable(struct clk_hw *hw)
52{
53 struct clk_gpio *clk = to_clk_gpio(hw);
54
55 gpiod_set_value(clk->gpiod, 1);
56
57 return 0;
58}
59
60static void clk_gpio_gate_disable(struct clk_hw *hw)
61{
62 struct clk_gpio *clk = to_clk_gpio(hw);
63
64 gpiod_set_value(clk->gpiod, 0);
65}
66
67static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
68{
69 struct clk_gpio *clk = to_clk_gpio(hw);
70
71 return gpiod_get_value(clk->gpiod);
72}
73
74static const struct clk_ops clk_gpio_gate_ops = {
75 .enable = clk_gpio_gate_enable,
76 .disable = clk_gpio_gate_disable,
77 .is_enabled = clk_gpio_gate_is_enabled,
78};
79
80static int clk_sleeping_gpio_gate_prepare(struct clk_hw *hw)
81{
82 struct clk_gpio *clk = to_clk_gpio(hw);
83
84 gpiod_set_value_cansleep(clk->gpiod, 1);
85
86 return 0;
87}
88
89static void clk_sleeping_gpio_gate_unprepare(struct clk_hw *hw)
90{
91 struct clk_gpio *clk = to_clk_gpio(hw);
92
93 gpiod_set_value_cansleep(clk->gpiod, 0);
94}
95
96static int clk_sleeping_gpio_gate_is_prepared(struct clk_hw *hw)
97{
98 struct clk_gpio *clk = to_clk_gpio(hw);
99
100 return gpiod_get_value_cansleep(clk->gpiod);
101}
102
103static const struct clk_ops clk_sleeping_gpio_gate_ops = {
104 .prepare = clk_sleeping_gpio_gate_prepare,
105 .unprepare = clk_sleeping_gpio_gate_unprepare,
106 .is_prepared = clk_sleeping_gpio_gate_is_prepared,
107};
108
109/**
110 * DOC: basic clock multiplexer which can be controlled with a gpio output
111 * Traits of this clock:
112 * prepare - clk_prepare only ensures that parents are prepared
113 * rate - rate is only affected by parent switching. No clk_set_rate support
114 * parent - parent is adjustable through clk_set_parent
115 */
116
117static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
118{
119 struct clk_gpio *clk = to_clk_gpio(hw);
120
121 return gpiod_get_value_cansleep(clk->gpiod);
122}
123
124static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
125{
126 struct clk_gpio *clk = to_clk_gpio(hw);
127
128 gpiod_set_value_cansleep(clk->gpiod, index);
129
130 return 0;
131}
132
133static const struct clk_ops clk_gpio_mux_ops = {
134 .get_parent = clk_gpio_mux_get_parent,
135 .set_parent = clk_gpio_mux_set_parent,
136 .determine_rate = __clk_mux_determine_rate,
137};
138
139static struct clk_hw *clk_register_gpio(struct device *dev, u8 num_parents,
140 struct gpio_desc *gpiod,
141 const struct clk_ops *clk_gpio_ops)
142{
143 struct clk_gpio *clk_gpio;
144 struct clk_hw *hw;
145 struct clk_init_data init = {};
146 int err;
147 const struct clk_parent_data gpio_parent_data[] = {
148 { .index = 0 },
149 { .index = 1 },
150 };
151
152 clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
153 if (!clk_gpio)
154 return ERR_PTR(-ENOMEM);
155
156 init.name = dev->of_node->name;
157 init.ops = clk_gpio_ops;
158 init.parent_data = gpio_parent_data;
159 init.num_parents = num_parents;
160 init.flags = CLK_SET_RATE_PARENT;
161
162 clk_gpio->gpiod = gpiod;
163 clk_gpio->hw.init = &init;
164
165 hw = &clk_gpio->hw;
166 err = devm_clk_hw_register(dev, hw);
167 if (err)
168 return ERR_PTR(err);
169
170 return hw;
171}
172
173static struct clk_hw *clk_hw_register_gpio_gate(struct device *dev,
174 int num_parents,
175 struct gpio_desc *gpiod)
176{
177 const struct clk_ops *ops;
178
179 if (gpiod_cansleep(gpiod))
180 ops = &clk_sleeping_gpio_gate_ops;
181 else
182 ops = &clk_gpio_gate_ops;
183
184 return clk_register_gpio(dev, num_parents, gpiod, ops);
185}
186
187static struct clk_hw *clk_hw_register_gpio_mux(struct device *dev,
188 struct gpio_desc *gpiod)
189{
190 return clk_register_gpio(dev, 2, gpiod, &clk_gpio_mux_ops);
191}
192
193static int gpio_clk_driver_probe(struct platform_device *pdev)
194{
195 struct device *dev = &pdev->dev;
196 struct device_node *node = dev->of_node;
197 const char *gpio_name;
198 unsigned int num_parents;
199 struct gpio_desc *gpiod;
200 struct clk_hw *hw;
201 bool is_mux;
202 int ret;
203
204 is_mux = of_device_is_compatible(node, "gpio-mux-clock");
205
206 num_parents = of_clk_get_parent_count(node);
207 if (is_mux && num_parents != 2) {
208 dev_err(dev, "mux-clock must have 2 parents\n");
209 return -EINVAL;
210 }
211
212 gpio_name = is_mux ? "select" : "enable";
213 gpiod = devm_gpiod_get(dev, gpio_name, GPIOD_OUT_LOW);
214 if (IS_ERR(gpiod)) {
215 ret = PTR_ERR(gpiod);
216 if (ret == -EPROBE_DEFER)
217 pr_debug("%pOFn: %s: GPIOs not yet available, retry later\n",
218 node, __func__);
219 else
220 pr_err("%pOFn: %s: Can't get '%s' named GPIO property\n",
221 node, __func__,
222 gpio_name);
223 return ret;
224 }
225
226 if (is_mux)
227 hw = clk_hw_register_gpio_mux(dev, gpiod);
228 else
229 hw = clk_hw_register_gpio_gate(dev, num_parents, gpiod);
230 if (IS_ERR(hw))
231 return PTR_ERR(hw);
232
233 return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
234}
235
236static const struct of_device_id gpio_clk_match_table[] = {
237 { .compatible = "gpio-mux-clock" },
238 { .compatible = "gpio-gate-clock" },
239 { }
240};
241
242static struct platform_driver gpio_clk_driver = {
243 .probe = gpio_clk_driver_probe,
244 .driver = {
245 .name = "gpio-clk",
246 .of_match_table = gpio_clk_match_table,
247 },
248};
249builtin_platform_driver(gpio_clk_driver);
1/*
2 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com
3 *
4 * Authors:
5 * Jyri Sarha <jsarha@ti.com>
6 * Sergej Sawazki <ce3a@gmx.de>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Gpio controlled clock implementation
13 */
14
15#include <linux/clk-provider.h>
16#include <linux/export.h>
17#include <linux/slab.h>
18#include <linux/gpio/consumer.h>
19#include <linux/err.h>
20#include <linux/device.h>
21#include <linux/platform_device.h>
22#include <linux/of_device.h>
23
24/**
25 * DOC: basic gpio gated clock which can be enabled and disabled
26 * with gpio output
27 * Traits of this clock:
28 * prepare - clk_(un)prepare only ensures parent is (un)prepared
29 * enable - clk_enable and clk_disable are functional & control gpio
30 * rate - inherits rate from parent. No clk_set_rate support
31 * parent - fixed parent. No clk_set_parent support
32 */
33
34static int clk_gpio_gate_enable(struct clk_hw *hw)
35{
36 struct clk_gpio *clk = to_clk_gpio(hw);
37
38 gpiod_set_value(clk->gpiod, 1);
39
40 return 0;
41}
42
43static void clk_gpio_gate_disable(struct clk_hw *hw)
44{
45 struct clk_gpio *clk = to_clk_gpio(hw);
46
47 gpiod_set_value(clk->gpiod, 0);
48}
49
50static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
51{
52 struct clk_gpio *clk = to_clk_gpio(hw);
53
54 return gpiod_get_value(clk->gpiod);
55}
56
57const struct clk_ops clk_gpio_gate_ops = {
58 .enable = clk_gpio_gate_enable,
59 .disable = clk_gpio_gate_disable,
60 .is_enabled = clk_gpio_gate_is_enabled,
61};
62EXPORT_SYMBOL_GPL(clk_gpio_gate_ops);
63
64/**
65 * DOC: basic clock multiplexer which can be controlled with a gpio output
66 * Traits of this clock:
67 * prepare - clk_prepare only ensures that parents are prepared
68 * rate - rate is only affected by parent switching. No clk_set_rate support
69 * parent - parent is adjustable through clk_set_parent
70 */
71
72static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
73{
74 struct clk_gpio *clk = to_clk_gpio(hw);
75
76 return gpiod_get_value_cansleep(clk->gpiod);
77}
78
79static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
80{
81 struct clk_gpio *clk = to_clk_gpio(hw);
82
83 gpiod_set_value_cansleep(clk->gpiod, index);
84
85 return 0;
86}
87
88const struct clk_ops clk_gpio_mux_ops = {
89 .get_parent = clk_gpio_mux_get_parent,
90 .set_parent = clk_gpio_mux_set_parent,
91 .determine_rate = __clk_mux_determine_rate,
92};
93EXPORT_SYMBOL_GPL(clk_gpio_mux_ops);
94
95static struct clk_hw *clk_register_gpio(struct device *dev, const char *name,
96 const char * const *parent_names, u8 num_parents, struct gpio_desc *gpiod,
97 unsigned long flags, const struct clk_ops *clk_gpio_ops)
98{
99 struct clk_gpio *clk_gpio;
100 struct clk_hw *hw;
101 struct clk_init_data init = {};
102 int err;
103
104 if (dev)
105 clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
106 else
107 clk_gpio = kzalloc(sizeof(*clk_gpio), GFP_KERNEL);
108
109 if (!clk_gpio)
110 return ERR_PTR(-ENOMEM);
111
112 init.name = name;
113 init.ops = clk_gpio_ops;
114 init.flags = flags | CLK_IS_BASIC;
115 init.parent_names = parent_names;
116 init.num_parents = num_parents;
117
118 clk_gpio->gpiod = gpiod;
119 clk_gpio->hw.init = &init;
120
121 hw = &clk_gpio->hw;
122 if (dev)
123 err = devm_clk_hw_register(dev, hw);
124 else
125 err = clk_hw_register(NULL, hw);
126
127 if (!err)
128 return hw;
129
130 if (!dev) {
131 kfree(clk_gpio);
132 }
133
134 return ERR_PTR(err);
135}
136
137/**
138 * clk_hw_register_gpio_gate - register a gpio clock gate with the clock
139 * framework
140 * @dev: device that is registering this clock
141 * @name: name of this clock
142 * @parent_name: name of this clock's parent
143 * @gpiod: gpio descriptor to gate this clock
144 * @flags: clock flags
145 */
146struct clk_hw *clk_hw_register_gpio_gate(struct device *dev, const char *name,
147 const char *parent_name, struct gpio_desc *gpiod,
148 unsigned long flags)
149{
150 return clk_register_gpio(dev, name,
151 (parent_name ? &parent_name : NULL),
152 (parent_name ? 1 : 0), gpiod, flags,
153 &clk_gpio_gate_ops);
154}
155EXPORT_SYMBOL_GPL(clk_hw_register_gpio_gate);
156
157struct clk *clk_register_gpio_gate(struct device *dev, const char *name,
158 const char *parent_name, struct gpio_desc *gpiod,
159 unsigned long flags)
160{
161 struct clk_hw *hw;
162
163 hw = clk_hw_register_gpio_gate(dev, name, parent_name, gpiod, flags);
164 if (IS_ERR(hw))
165 return ERR_CAST(hw);
166 return hw->clk;
167}
168EXPORT_SYMBOL_GPL(clk_register_gpio_gate);
169
170/**
171 * clk_hw_register_gpio_mux - register a gpio clock mux with the clock framework
172 * @dev: device that is registering this clock
173 * @name: name of this clock
174 * @parent_names: names of this clock's parents
175 * @num_parents: number of parents listed in @parent_names
176 * @gpiod: gpio descriptor to gate this clock
177 * @flags: clock flags
178 */
179struct clk_hw *clk_hw_register_gpio_mux(struct device *dev, const char *name,
180 const char * const *parent_names, u8 num_parents, struct gpio_desc *gpiod,
181 unsigned long flags)
182{
183 if (num_parents != 2) {
184 pr_err("mux-clock %s must have 2 parents\n", name);
185 return ERR_PTR(-EINVAL);
186 }
187
188 return clk_register_gpio(dev, name, parent_names, num_parents,
189 gpiod, flags, &clk_gpio_mux_ops);
190}
191EXPORT_SYMBOL_GPL(clk_hw_register_gpio_mux);
192
193struct clk *clk_register_gpio_mux(struct device *dev, const char *name,
194 const char * const *parent_names, u8 num_parents, struct gpio_desc *gpiod,
195 unsigned long flags)
196{
197 struct clk_hw *hw;
198
199 hw = clk_hw_register_gpio_mux(dev, name, parent_names, num_parents,
200 gpiod, flags);
201 if (IS_ERR(hw))
202 return ERR_CAST(hw);
203 return hw->clk;
204}
205EXPORT_SYMBOL_GPL(clk_register_gpio_mux);
206
207static int gpio_clk_driver_probe(struct platform_device *pdev)
208{
209 struct device_node *node = pdev->dev.of_node;
210 const char **parent_names, *gpio_name;
211 unsigned int num_parents;
212 struct gpio_desc *gpiod;
213 struct clk *clk;
214 bool is_mux;
215 int ret;
216
217 num_parents = of_clk_get_parent_count(node);
218 if (num_parents) {
219 parent_names = devm_kcalloc(&pdev->dev, num_parents,
220 sizeof(char *), GFP_KERNEL);
221 if (!parent_names)
222 return -ENOMEM;
223
224 of_clk_parent_fill(node, parent_names, num_parents);
225 } else {
226 parent_names = NULL;
227 }
228
229 is_mux = of_device_is_compatible(node, "gpio-mux-clock");
230
231 gpio_name = is_mux ? "select" : "enable";
232 gpiod = devm_gpiod_get(&pdev->dev, gpio_name, GPIOD_OUT_LOW);
233 if (IS_ERR(gpiod)) {
234 ret = PTR_ERR(gpiod);
235 if (ret == -EPROBE_DEFER)
236 pr_debug("%s: %s: GPIOs not yet available, retry later\n",
237 node->name, __func__);
238 else
239 pr_err("%s: %s: Can't get '%s' named GPIO property\n",
240 node->name, __func__,
241 gpio_name);
242 return ret;
243 }
244
245 if (is_mux)
246 clk = clk_register_gpio_mux(&pdev->dev, node->name,
247 parent_names, num_parents, gpiod, 0);
248 else
249 clk = clk_register_gpio_gate(&pdev->dev, node->name,
250 parent_names ? parent_names[0] : NULL, gpiod,
251 0);
252 if (IS_ERR(clk))
253 return PTR_ERR(clk);
254
255 return of_clk_add_provider(node, of_clk_src_simple_get, clk);
256}
257
258static const struct of_device_id gpio_clk_match_table[] = {
259 { .compatible = "gpio-mux-clock" },
260 { .compatible = "gpio-gate-clock" },
261 { }
262};
263
264static struct platform_driver gpio_clk_driver = {
265 .probe = gpio_clk_driver_probe,
266 .driver = {
267 .name = "gpio-clk",
268 .of_match_table = gpio_clk_match_table,
269 },
270};
271builtin_platform_driver(gpio_clk_driver);