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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * ddbridge-i2c.c: Digital Devices bridge i2c driver
4 *
5 * Copyright (C) 2010-2017 Digital Devices GmbH
6 * Ralph Metzler <rjkm@metzlerbros.de>
7 * Marcus Metzler <mocm@metzlerbros.de>
8 */
9
10#include <linux/module.h>
11#include <linux/init.h>
12#include <linux/interrupt.h>
13#include <linux/delay.h>
14#include <linux/slab.h>
15#include <linux/poll.h>
16#include <linux/io.h>
17#include <linux/pci.h>
18#include <linux/pci_ids.h>
19#include <linux/timer.h>
20#include <linux/i2c.h>
21#include <linux/swab.h>
22#include <linux/vmalloc.h>
23
24#include "ddbridge.h"
25#include "ddbridge-i2c.h"
26#include "ddbridge-regs.h"
27#include "ddbridge-io.h"
28
29/******************************************************************************/
30
31static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd)
32{
33 struct ddb *dev = i2c->dev;
34 unsigned long stat;
35 u32 val;
36
37 ddbwritel(dev, (adr << 9) | cmd, i2c->regs + I2C_COMMAND);
38 stat = wait_for_completion_timeout(&i2c->completion, HZ);
39 val = ddbreadl(dev, i2c->regs + I2C_COMMAND);
40 if (stat == 0) {
41 dev_err(dev->dev, "I2C timeout, card %d, port %d, link %u\n",
42 dev->nr, i2c->nr, i2c->link);
43 {
44 u32 istat = ddbreadl(dev, INTERRUPT_STATUS);
45
46 dev_err(dev->dev, "DDBridge IRS %08x\n", istat);
47 if (i2c->link) {
48 u32 listat = ddbreadl(dev,
49 DDB_LINK_TAG(i2c->link) |
50 INTERRUPT_STATUS);
51
52 dev_err(dev->dev, "DDBridge link %u IRS %08x\n",
53 i2c->link, listat);
54 }
55 if (istat & 1) {
56 ddbwritel(dev, istat & 1, INTERRUPT_ACK);
57 } else {
58 u32 mon = ddbreadl(dev,
59 i2c->regs + I2C_MONITOR);
60
61 dev_err(dev->dev, "I2C cmd=%08x mon=%08x\n",
62 val, mon);
63 }
64 }
65 return -EIO;
66 }
67 val &= 0x70000;
68 if (val == 0x20000)
69 dev_err(dev->dev, "I2C bus error\n");
70 if (val)
71 return -EIO;
72 return 0;
73}
74
75static int ddb_i2c_master_xfer(struct i2c_adapter *adapter,
76 struct i2c_msg msg[], int num)
77{
78 struct ddb_i2c *i2c = (struct ddb_i2c *)i2c_get_adapdata(adapter);
79 struct ddb *dev = i2c->dev;
80 u8 addr = 0;
81
82 addr = msg[0].addr;
83 if (msg[0].len > i2c->bsize)
84 return -EIO;
85 switch (num) {
86 case 1:
87 if (msg[0].flags & I2C_M_RD) {
88 ddbwritel(dev, msg[0].len << 16,
89 i2c->regs + I2C_TASKLENGTH);
90 if (ddb_i2c_cmd(i2c, addr, 3))
91 break;
92 ddbcpyfrom(dev, msg[0].buf,
93 i2c->rbuf, msg[0].len);
94 return num;
95 }
96 ddbcpyto(dev, i2c->wbuf, msg[0].buf, msg[0].len);
97 ddbwritel(dev, msg[0].len, i2c->regs + I2C_TASKLENGTH);
98 if (ddb_i2c_cmd(i2c, addr, 2))
99 break;
100 return num;
101 case 2:
102 if ((msg[0].flags & I2C_M_RD) == I2C_M_RD)
103 break;
104 if ((msg[1].flags & I2C_M_RD) != I2C_M_RD)
105 break;
106 if (msg[1].len > i2c->bsize)
107 break;
108 ddbcpyto(dev, i2c->wbuf, msg[0].buf, msg[0].len);
109 ddbwritel(dev, msg[0].len | (msg[1].len << 16),
110 i2c->regs + I2C_TASKLENGTH);
111 if (ddb_i2c_cmd(i2c, addr, 1))
112 break;
113 ddbcpyfrom(dev, msg[1].buf,
114 i2c->rbuf,
115 msg[1].len);
116 return num;
117 default:
118 break;
119 }
120 return -EIO;
121}
122
123static u32 ddb_i2c_functionality(struct i2c_adapter *adap)
124{
125 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
126}
127
128static const struct i2c_algorithm ddb_i2c_algo = {
129 .master_xfer = ddb_i2c_master_xfer,
130 .functionality = ddb_i2c_functionality,
131};
132
133void ddb_i2c_release(struct ddb *dev)
134{
135 int i;
136 struct ddb_i2c *i2c;
137
138 for (i = 0; i < dev->i2c_num; i++) {
139 i2c = &dev->i2c[i];
140 i2c_del_adapter(&i2c->adap);
141 }
142}
143
144static void i2c_handler(void *priv)
145{
146 struct ddb_i2c *i2c = (struct ddb_i2c *)priv;
147
148 complete(&i2c->completion);
149}
150
151static int ddb_i2c_add(struct ddb *dev, struct ddb_i2c *i2c,
152 const struct ddb_regmap *regmap, int link,
153 int i, int num)
154{
155 struct i2c_adapter *adap;
156
157 i2c->nr = i;
158 i2c->dev = dev;
159 i2c->link = link;
160 i2c->bsize = regmap->i2c_buf->size;
161 i2c->wbuf = DDB_LINK_TAG(link) |
162 (regmap->i2c_buf->base + i2c->bsize * i);
163 i2c->rbuf = i2c->wbuf; /* + i2c->bsize / 2 */
164 i2c->regs = DDB_LINK_TAG(link) |
165 (regmap->i2c->base + regmap->i2c->size * i);
166 ddbwritel(dev, I2C_SPEED_100, i2c->regs + I2C_TIMING);
167 ddbwritel(dev, ((i2c->rbuf & 0xffff) << 16) | (i2c->wbuf & 0xffff),
168 i2c->regs + I2C_TASKADDRESS);
169 init_completion(&i2c->completion);
170
171 adap = &i2c->adap;
172 i2c_set_adapdata(adap, i2c);
173#ifdef I2C_ADAP_CLASS_TV_DIGITAL
174 adap->class = I2C_ADAP_CLASS_TV_DIGITAL | I2C_CLASS_TV_ANALOG;
175#else
176#ifdef I2C_CLASS_TV_ANALOG
177 adap->class = I2C_CLASS_TV_ANALOG;
178#endif
179#endif
180 snprintf(adap->name, I2C_NAME_SIZE, "ddbridge_%02x.%x.%x",
181 dev->nr, i2c->link, i);
182 adap->algo = &ddb_i2c_algo;
183 adap->algo_data = (void *)i2c;
184 adap->dev.parent = dev->dev;
185 return i2c_add_adapter(adap);
186}
187
188int ddb_i2c_init(struct ddb *dev)
189{
190 int stat = 0;
191 u32 i, j, num = 0, l, base;
192 struct ddb_i2c *i2c;
193 struct i2c_adapter *adap;
194 const struct ddb_regmap *regmap;
195
196 for (l = 0; l < DDB_MAX_LINK; l++) {
197 if (!dev->link[l].info)
198 continue;
199 regmap = dev->link[l].info->regmap;
200 if (!regmap || !regmap->i2c)
201 continue;
202 base = regmap->irq_base_i2c;
203 for (i = 0; i < regmap->i2c->num; i++) {
204 if (!(dev->link[l].info->i2c_mask & (1 << i)))
205 continue;
206 i2c = &dev->i2c[num];
207 ddb_irq_set(dev, l, i + base, i2c_handler, i2c);
208 stat = ddb_i2c_add(dev, i2c, regmap, l, i, num);
209 if (stat)
210 break;
211 num++;
212 }
213 }
214 if (stat) {
215 for (j = 0; j < num; j++) {
216 i2c = &dev->i2c[j];
217 adap = &i2c->adap;
218 i2c_del_adapter(adap);
219 }
220 } else {
221 dev->i2c_num = num;
222 }
223
224 return stat;
225}
1/*
2 * ddbridge-i2c.c: Digital Devices bridge i2c driver
3 *
4 * Copyright (C) 2010-2017 Digital Devices GmbH
5 * Ralph Metzler <rjkm@metzlerbros.de>
6 * Marcus Metzler <mocm@metzlerbros.de>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 only, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/delay.h>
23#include <linux/slab.h>
24#include <linux/poll.h>
25#include <linux/io.h>
26#include <linux/pci.h>
27#include <linux/pci_ids.h>
28#include <linux/timer.h>
29#include <linux/i2c.h>
30#include <linux/swab.h>
31#include <linux/vmalloc.h>
32
33#include "ddbridge.h"
34#include "ddbridge-i2c.h"
35#include "ddbridge-regs.h"
36#include "ddbridge-io.h"
37
38/******************************************************************************/
39
40static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd)
41{
42 struct ddb *dev = i2c->dev;
43 unsigned long stat;
44 u32 val;
45
46 ddbwritel(dev, (adr << 9) | cmd, i2c->regs + I2C_COMMAND);
47 stat = wait_for_completion_timeout(&i2c->completion, HZ);
48 val = ddbreadl(dev, i2c->regs + I2C_COMMAND);
49 if (stat == 0) {
50 dev_err(dev->dev, "I2C timeout, card %d, port %d, link %u\n",
51 dev->nr, i2c->nr, i2c->link);
52 {
53 u32 istat = ddbreadl(dev, INTERRUPT_STATUS);
54
55 dev_err(dev->dev, "DDBridge IRS %08x\n", istat);
56 if (i2c->link) {
57 u32 listat = ddbreadl(dev,
58 DDB_LINK_TAG(i2c->link) |
59 INTERRUPT_STATUS);
60
61 dev_err(dev->dev, "DDBridge link %u IRS %08x\n",
62 i2c->link, listat);
63 }
64 if (istat & 1) {
65 ddbwritel(dev, istat & 1, INTERRUPT_ACK);
66 } else {
67 u32 mon = ddbreadl(dev,
68 i2c->regs + I2C_MONITOR);
69
70 dev_err(dev->dev, "I2C cmd=%08x mon=%08x\n",
71 val, mon);
72 }
73 }
74 return -EIO;
75 }
76 if (val & 0x70000)
77 return -EIO;
78 return 0;
79}
80
81static int ddb_i2c_master_xfer(struct i2c_adapter *adapter,
82 struct i2c_msg msg[], int num)
83{
84 struct ddb_i2c *i2c = (struct ddb_i2c *)i2c_get_adapdata(adapter);
85 struct ddb *dev = i2c->dev;
86 u8 addr = 0;
87
88 addr = msg[0].addr;
89 if (msg[0].len > i2c->bsize)
90 return -EIO;
91 switch (num) {
92 case 1:
93 if (msg[0].flags & I2C_M_RD) {
94 ddbwritel(dev, msg[0].len << 16,
95 i2c->regs + I2C_TASKLENGTH);
96 if (ddb_i2c_cmd(i2c, addr, 3))
97 break;
98 ddbcpyfrom(dev, msg[0].buf,
99 i2c->rbuf, msg[0].len);
100 return num;
101 }
102 ddbcpyto(dev, i2c->wbuf, msg[0].buf, msg[0].len);
103 ddbwritel(dev, msg[0].len, i2c->regs + I2C_TASKLENGTH);
104 if (ddb_i2c_cmd(i2c, addr, 2))
105 break;
106 return num;
107 case 2:
108 if ((msg[0].flags & I2C_M_RD) == I2C_M_RD)
109 break;
110 if ((msg[1].flags & I2C_M_RD) != I2C_M_RD)
111 break;
112 if (msg[1].len > i2c->bsize)
113 break;
114 ddbcpyto(dev, i2c->wbuf, msg[0].buf, msg[0].len);
115 ddbwritel(dev, msg[0].len | (msg[1].len << 16),
116 i2c->regs + I2C_TASKLENGTH);
117 if (ddb_i2c_cmd(i2c, addr, 1))
118 break;
119 ddbcpyfrom(dev, msg[1].buf,
120 i2c->rbuf,
121 msg[1].len);
122 return num;
123 default:
124 break;
125 }
126 return -EIO;
127}
128
129static u32 ddb_i2c_functionality(struct i2c_adapter *adap)
130{
131 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
132}
133
134static const struct i2c_algorithm ddb_i2c_algo = {
135 .master_xfer = ddb_i2c_master_xfer,
136 .functionality = ddb_i2c_functionality,
137};
138
139void ddb_i2c_release(struct ddb *dev)
140{
141 int i;
142 struct ddb_i2c *i2c;
143
144 for (i = 0; i < dev->i2c_num; i++) {
145 i2c = &dev->i2c[i];
146 i2c_del_adapter(&i2c->adap);
147 }
148}
149
150static void i2c_handler(unsigned long priv)
151{
152 struct ddb_i2c *i2c = (struct ddb_i2c *)priv;
153
154 complete(&i2c->completion);
155}
156
157static int ddb_i2c_add(struct ddb *dev, struct ddb_i2c *i2c,
158 const struct ddb_regmap *regmap, int link,
159 int i, int num)
160{
161 struct i2c_adapter *adap;
162
163 i2c->nr = i;
164 i2c->dev = dev;
165 i2c->link = link;
166 i2c->bsize = regmap->i2c_buf->size;
167 i2c->wbuf = DDB_LINK_TAG(link) |
168 (regmap->i2c_buf->base + i2c->bsize * i);
169 i2c->rbuf = i2c->wbuf; /* + i2c->bsize / 2 */
170 i2c->regs = DDB_LINK_TAG(link) |
171 (regmap->i2c->base + regmap->i2c->size * i);
172 ddbwritel(dev, I2C_SPEED_100, i2c->regs + I2C_TIMING);
173 ddbwritel(dev, ((i2c->rbuf & 0xffff) << 16) | (i2c->wbuf & 0xffff),
174 i2c->regs + I2C_TASKADDRESS);
175 init_completion(&i2c->completion);
176
177 adap = &i2c->adap;
178 i2c_set_adapdata(adap, i2c);
179#ifdef I2C_ADAP_CLASS_TV_DIGITAL
180 adap->class = I2C_ADAP_CLASS_TV_DIGITAL | I2C_CLASS_TV_ANALOG;
181#else
182#ifdef I2C_CLASS_TV_ANALOG
183 adap->class = I2C_CLASS_TV_ANALOG;
184#endif
185#endif
186 snprintf(adap->name, I2C_NAME_SIZE, "ddbridge_%02x.%x.%x",
187 dev->nr, i2c->link, i);
188 adap->algo = &ddb_i2c_algo;
189 adap->algo_data = (void *)i2c;
190 adap->dev.parent = dev->dev;
191 return i2c_add_adapter(adap);
192}
193
194int ddb_i2c_init(struct ddb *dev)
195{
196 int stat = 0;
197 u32 i, j, num = 0, l, base;
198 struct ddb_i2c *i2c;
199 struct i2c_adapter *adap;
200 const struct ddb_regmap *regmap;
201
202 for (l = 0; l < DDB_MAX_LINK; l++) {
203 if (!dev->link[l].info)
204 continue;
205 regmap = dev->link[l].info->regmap;
206 if (!regmap || !regmap->i2c)
207 continue;
208 base = regmap->irq_base_i2c;
209 for (i = 0; i < regmap->i2c->num; i++) {
210 if (!(dev->link[l].info->i2c_mask & (1 << i)))
211 continue;
212 i2c = &dev->i2c[num];
213 dev->handler_data[l][i + base] = (unsigned long)i2c;
214 dev->handler[l][i + base] = i2c_handler;
215 stat = ddb_i2c_add(dev, i2c, regmap, l, i, num);
216 if (stat)
217 break;
218 num++;
219 }
220 }
221 if (stat) {
222 for (j = 0; j < num; j++) {
223 i2c = &dev->i2c[j];
224 adap = &i2c->adap;
225 i2c_del_adapter(adap);
226 }
227 } else {
228 dev->i2c_num = num;
229 }
230
231 return stat;
232}