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1/*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
20 *
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
23 * of the Software.
24 *
25 */
26/*
27 * Authors:
28 * Christian König <deathsimple@vodafone.de>
29 */
30
31#include <linux/sort.h>
32#include <linux/uaccess.h>
33
34#include "amdgpu.h"
35#include "amdgpu_trace.h"
36
37#define AMDGPU_BO_LIST_MAX_PRIORITY 32u
38#define AMDGPU_BO_LIST_NUM_BUCKETS (AMDGPU_BO_LIST_MAX_PRIORITY + 1)
39
40static void amdgpu_bo_list_free_rcu(struct rcu_head *rcu)
41{
42 struct amdgpu_bo_list *list = container_of(rcu, struct amdgpu_bo_list,
43 rhead);
44 mutex_destroy(&list->bo_list_mutex);
45 kvfree(list);
46}
47
48static void amdgpu_bo_list_free(struct kref *ref)
49{
50 struct amdgpu_bo_list *list = container_of(ref, struct amdgpu_bo_list,
51 refcount);
52 struct amdgpu_bo_list_entry *e;
53
54 amdgpu_bo_list_for_each_entry(e, list)
55 amdgpu_bo_unref(&e->bo);
56 call_rcu(&list->rhead, amdgpu_bo_list_free_rcu);
57}
58
59static int amdgpu_bo_list_entry_cmp(const void *_a, const void *_b)
60{
61 const struct amdgpu_bo_list_entry *a = _a, *b = _b;
62
63 if (a->priority > b->priority)
64 return 1;
65 if (a->priority < b->priority)
66 return -1;
67 return 0;
68}
69
70int amdgpu_bo_list_create(struct amdgpu_device *adev, struct drm_file *filp,
71 struct drm_amdgpu_bo_list_entry *info,
72 size_t num_entries, struct amdgpu_bo_list **result)
73{
74 unsigned last_entry = 0, first_userptr = num_entries;
75 struct amdgpu_bo_list_entry *array;
76 struct amdgpu_bo_list *list;
77 uint64_t total_size = 0;
78 unsigned i;
79 int r;
80
81 list = kvzalloc(struct_size(list, entries, num_entries), GFP_KERNEL);
82 if (!list)
83 return -ENOMEM;
84
85 kref_init(&list->refcount);
86
87 list->num_entries = num_entries;
88 array = list->entries;
89
90 for (i = 0; i < num_entries; ++i) {
91 struct amdgpu_bo_list_entry *entry;
92 struct drm_gem_object *gobj;
93 struct amdgpu_bo *bo;
94 struct mm_struct *usermm;
95
96 gobj = drm_gem_object_lookup(filp, info[i].bo_handle);
97 if (!gobj) {
98 r = -ENOENT;
99 goto error_free;
100 }
101
102 bo = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));
103 drm_gem_object_put(gobj);
104
105 usermm = amdgpu_ttm_tt_get_usermm(bo->tbo.ttm);
106 if (usermm) {
107 if (usermm != current->mm) {
108 amdgpu_bo_unref(&bo);
109 r = -EPERM;
110 goto error_free;
111 }
112 entry = &array[--first_userptr];
113 } else {
114 entry = &array[last_entry++];
115 }
116
117 entry->priority = min(info[i].bo_priority,
118 AMDGPU_BO_LIST_MAX_PRIORITY);
119 entry->bo = bo;
120
121 if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GDS)
122 list->gds_obj = bo;
123 if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GWS)
124 list->gws_obj = bo;
125 if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_OA)
126 list->oa_obj = bo;
127
128 total_size += amdgpu_bo_size(bo);
129 trace_amdgpu_bo_list_set(list, bo);
130 }
131
132 list->first_userptr = first_userptr;
133 sort(array, last_entry, sizeof(struct amdgpu_bo_list_entry),
134 amdgpu_bo_list_entry_cmp, NULL);
135
136 trace_amdgpu_cs_bo_status(list->num_entries, total_size);
137
138 mutex_init(&list->bo_list_mutex);
139 *result = list;
140 return 0;
141
142error_free:
143 for (i = 0; i < last_entry; ++i)
144 amdgpu_bo_unref(&array[i].bo);
145 for (i = first_userptr; i < num_entries; ++i)
146 amdgpu_bo_unref(&array[i].bo);
147 kvfree(list);
148 return r;
149
150}
151
152static void amdgpu_bo_list_destroy(struct amdgpu_fpriv *fpriv, int id)
153{
154 struct amdgpu_bo_list *list;
155
156 mutex_lock(&fpriv->bo_list_lock);
157 list = idr_remove(&fpriv->bo_list_handles, id);
158 mutex_unlock(&fpriv->bo_list_lock);
159 if (list)
160 kref_put(&list->refcount, amdgpu_bo_list_free);
161}
162
163int amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id,
164 struct amdgpu_bo_list **result)
165{
166 rcu_read_lock();
167 *result = idr_find(&fpriv->bo_list_handles, id);
168
169 if (*result && kref_get_unless_zero(&(*result)->refcount)) {
170 rcu_read_unlock();
171 return 0;
172 }
173
174 rcu_read_unlock();
175 *result = NULL;
176 return -ENOENT;
177}
178
179void amdgpu_bo_list_put(struct amdgpu_bo_list *list)
180{
181 kref_put(&list->refcount, amdgpu_bo_list_free);
182}
183
184int amdgpu_bo_create_list_entry_array(struct drm_amdgpu_bo_list_in *in,
185 struct drm_amdgpu_bo_list_entry **info_param)
186{
187 const void __user *uptr = u64_to_user_ptr(in->bo_info_ptr);
188 const uint32_t info_size = sizeof(struct drm_amdgpu_bo_list_entry);
189 struct drm_amdgpu_bo_list_entry *info;
190 int r;
191
192 info = kvmalloc_array(in->bo_number, info_size, GFP_KERNEL);
193 if (!info)
194 return -ENOMEM;
195
196 /* copy the handle array from userspace to a kernel buffer */
197 r = -EFAULT;
198 if (likely(info_size == in->bo_info_size)) {
199 unsigned long bytes = in->bo_number *
200 in->bo_info_size;
201
202 if (copy_from_user(info, uptr, bytes))
203 goto error_free;
204
205 } else {
206 unsigned long bytes = min(in->bo_info_size, info_size);
207 unsigned i;
208
209 memset(info, 0, in->bo_number * info_size);
210 for (i = 0; i < in->bo_number; ++i) {
211 if (copy_from_user(&info[i], uptr, bytes))
212 goto error_free;
213
214 uptr += in->bo_info_size;
215 }
216 }
217
218 *info_param = info;
219 return 0;
220
221error_free:
222 kvfree(info);
223 return r;
224}
225
226int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data,
227 struct drm_file *filp)
228{
229 struct amdgpu_device *adev = drm_to_adev(dev);
230 struct amdgpu_fpriv *fpriv = filp->driver_priv;
231 union drm_amdgpu_bo_list *args = data;
232 uint32_t handle = args->in.list_handle;
233 struct drm_amdgpu_bo_list_entry *info = NULL;
234 struct amdgpu_bo_list *list, *old;
235 int r;
236
237 r = amdgpu_bo_create_list_entry_array(&args->in, &info);
238 if (r)
239 return r;
240
241 switch (args->in.operation) {
242 case AMDGPU_BO_LIST_OP_CREATE:
243 r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number,
244 &list);
245 if (r)
246 goto error_free;
247
248 mutex_lock(&fpriv->bo_list_lock);
249 r = idr_alloc(&fpriv->bo_list_handles, list, 1, 0, GFP_KERNEL);
250 mutex_unlock(&fpriv->bo_list_lock);
251 if (r < 0) {
252 goto error_put_list;
253 }
254
255 handle = r;
256 break;
257
258 case AMDGPU_BO_LIST_OP_DESTROY:
259 amdgpu_bo_list_destroy(fpriv, handle);
260 handle = 0;
261 break;
262
263 case AMDGPU_BO_LIST_OP_UPDATE:
264 r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number,
265 &list);
266 if (r)
267 goto error_free;
268
269 mutex_lock(&fpriv->bo_list_lock);
270 old = idr_replace(&fpriv->bo_list_handles, list, handle);
271 mutex_unlock(&fpriv->bo_list_lock);
272
273 if (IS_ERR(old)) {
274 r = PTR_ERR(old);
275 goto error_put_list;
276 }
277
278 amdgpu_bo_list_put(old);
279 break;
280
281 default:
282 r = -EINVAL;
283 goto error_free;
284 }
285
286 memset(args, 0, sizeof(*args));
287 args->out.list_handle = handle;
288 kvfree(info);
289
290 return 0;
291
292error_put_list:
293 amdgpu_bo_list_put(list);
294
295error_free:
296 kvfree(info);
297 return r;
298}
1/*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
20 *
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
23 * of the Software.
24 *
25 */
26/*
27 * Authors:
28 * Christian König <deathsimple@vodafone.de>
29 */
30
31#include <drm/drmP.h>
32#include "amdgpu.h"
33#include "amdgpu_trace.h"
34
35#define AMDGPU_BO_LIST_MAX_PRIORITY 32u
36#define AMDGPU_BO_LIST_NUM_BUCKETS (AMDGPU_BO_LIST_MAX_PRIORITY + 1)
37
38static int amdgpu_bo_list_create(struct amdgpu_fpriv *fpriv,
39 struct amdgpu_bo_list **result,
40 int *id)
41{
42 int r;
43
44 *result = kzalloc(sizeof(struct amdgpu_bo_list), GFP_KERNEL);
45 if (!*result)
46 return -ENOMEM;
47
48 mutex_lock(&fpriv->bo_list_lock);
49 r = idr_alloc(&fpriv->bo_list_handles, *result,
50 1, 0, GFP_KERNEL);
51 if (r < 0) {
52 mutex_unlock(&fpriv->bo_list_lock);
53 kfree(*result);
54 return r;
55 }
56 *id = r;
57
58 mutex_init(&(*result)->lock);
59 (*result)->num_entries = 0;
60 (*result)->array = NULL;
61
62 mutex_lock(&(*result)->lock);
63 mutex_unlock(&fpriv->bo_list_lock);
64
65 return 0;
66}
67
68static void amdgpu_bo_list_destroy(struct amdgpu_fpriv *fpriv, int id)
69{
70 struct amdgpu_bo_list *list;
71
72 mutex_lock(&fpriv->bo_list_lock);
73 list = idr_find(&fpriv->bo_list_handles, id);
74 if (list) {
75 mutex_lock(&list->lock);
76 idr_remove(&fpriv->bo_list_handles, id);
77 mutex_unlock(&list->lock);
78 amdgpu_bo_list_free(list);
79 }
80 mutex_unlock(&fpriv->bo_list_lock);
81}
82
83static int amdgpu_bo_list_set(struct amdgpu_device *adev,
84 struct drm_file *filp,
85 struct amdgpu_bo_list *list,
86 struct drm_amdgpu_bo_list_entry *info,
87 unsigned num_entries)
88{
89 struct amdgpu_bo_list_entry *array;
90 struct amdgpu_bo *gds_obj = adev->gds.gds_gfx_bo;
91 struct amdgpu_bo *gws_obj = adev->gds.gws_gfx_bo;
92 struct amdgpu_bo *oa_obj = adev->gds.oa_gfx_bo;
93
94 unsigned last_entry = 0, first_userptr = num_entries;
95 unsigned i;
96 int r;
97 unsigned long total_size = 0;
98
99 array = drm_malloc_ab(num_entries, sizeof(struct amdgpu_bo_list_entry));
100 if (!array)
101 return -ENOMEM;
102 memset(array, 0, num_entries * sizeof(struct amdgpu_bo_list_entry));
103
104 for (i = 0; i < num_entries; ++i) {
105 struct amdgpu_bo_list_entry *entry;
106 struct drm_gem_object *gobj;
107 struct amdgpu_bo *bo;
108 struct mm_struct *usermm;
109
110 gobj = drm_gem_object_lookup(filp, info[i].bo_handle);
111 if (!gobj) {
112 r = -ENOENT;
113 goto error_free;
114 }
115
116 bo = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));
117 drm_gem_object_unreference_unlocked(gobj);
118
119 usermm = amdgpu_ttm_tt_get_usermm(bo->tbo.ttm);
120 if (usermm) {
121 if (usermm != current->mm) {
122 amdgpu_bo_unref(&bo);
123 r = -EPERM;
124 goto error_free;
125 }
126 entry = &array[--first_userptr];
127 } else {
128 entry = &array[last_entry++];
129 }
130
131 entry->robj = bo;
132 entry->priority = min(info[i].bo_priority,
133 AMDGPU_BO_LIST_MAX_PRIORITY);
134 entry->tv.bo = &entry->robj->tbo;
135 entry->tv.shared = !entry->robj->prime_shared_count;
136
137 if (entry->robj->prefered_domains == AMDGPU_GEM_DOMAIN_GDS)
138 gds_obj = entry->robj;
139 if (entry->robj->prefered_domains == AMDGPU_GEM_DOMAIN_GWS)
140 gws_obj = entry->robj;
141 if (entry->robj->prefered_domains == AMDGPU_GEM_DOMAIN_OA)
142 oa_obj = entry->robj;
143
144 total_size += amdgpu_bo_size(entry->robj);
145 trace_amdgpu_bo_list_set(list, entry->robj);
146 }
147
148 for (i = 0; i < list->num_entries; ++i)
149 amdgpu_bo_unref(&list->array[i].robj);
150
151 drm_free_large(list->array);
152
153 list->gds_obj = gds_obj;
154 list->gws_obj = gws_obj;
155 list->oa_obj = oa_obj;
156 list->first_userptr = first_userptr;
157 list->array = array;
158 list->num_entries = num_entries;
159
160 trace_amdgpu_cs_bo_status(list->num_entries, total_size);
161 return 0;
162
163error_free:
164 while (i--)
165 amdgpu_bo_unref(&array[i].robj);
166 drm_free_large(array);
167 return r;
168}
169
170struct amdgpu_bo_list *
171amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id)
172{
173 struct amdgpu_bo_list *result;
174
175 mutex_lock(&fpriv->bo_list_lock);
176 result = idr_find(&fpriv->bo_list_handles, id);
177 if (result)
178 mutex_lock(&result->lock);
179 mutex_unlock(&fpriv->bo_list_lock);
180 return result;
181}
182
183void amdgpu_bo_list_get_list(struct amdgpu_bo_list *list,
184 struct list_head *validated)
185{
186 /* This is based on the bucket sort with O(n) time complexity.
187 * An item with priority "i" is added to bucket[i]. The lists are then
188 * concatenated in descending order.
189 */
190 struct list_head bucket[AMDGPU_BO_LIST_NUM_BUCKETS];
191 unsigned i;
192
193 for (i = 0; i < AMDGPU_BO_LIST_NUM_BUCKETS; i++)
194 INIT_LIST_HEAD(&bucket[i]);
195
196 /* Since buffers which appear sooner in the relocation list are
197 * likely to be used more often than buffers which appear later
198 * in the list, the sort mustn't change the ordering of buffers
199 * with the same priority, i.e. it must be stable.
200 */
201 for (i = 0; i < list->num_entries; i++) {
202 unsigned priority = list->array[i].priority;
203
204 list_add_tail(&list->array[i].tv.head,
205 &bucket[priority]);
206 list->array[i].user_pages = NULL;
207 }
208
209 /* Connect the sorted buckets in the output list. */
210 for (i = 0; i < AMDGPU_BO_LIST_NUM_BUCKETS; i++)
211 list_splice(&bucket[i], validated);
212}
213
214void amdgpu_bo_list_put(struct amdgpu_bo_list *list)
215{
216 mutex_unlock(&list->lock);
217}
218
219void amdgpu_bo_list_free(struct amdgpu_bo_list *list)
220{
221 unsigned i;
222
223 for (i = 0; i < list->num_entries; ++i)
224 amdgpu_bo_unref(&list->array[i].robj);
225
226 mutex_destroy(&list->lock);
227 drm_free_large(list->array);
228 kfree(list);
229}
230
231int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data,
232 struct drm_file *filp)
233{
234 const uint32_t info_size = sizeof(struct drm_amdgpu_bo_list_entry);
235
236 struct amdgpu_device *adev = dev->dev_private;
237 struct amdgpu_fpriv *fpriv = filp->driver_priv;
238 union drm_amdgpu_bo_list *args = data;
239 uint32_t handle = args->in.list_handle;
240 const void __user *uptr = (const void*)(long)args->in.bo_info_ptr;
241
242 struct drm_amdgpu_bo_list_entry *info;
243 struct amdgpu_bo_list *list;
244
245 int r;
246
247 info = drm_malloc_ab(args->in.bo_number,
248 sizeof(struct drm_amdgpu_bo_list_entry));
249 if (!info)
250 return -ENOMEM;
251
252 /* copy the handle array from userspace to a kernel buffer */
253 r = -EFAULT;
254 if (likely(info_size == args->in.bo_info_size)) {
255 unsigned long bytes = args->in.bo_number *
256 args->in.bo_info_size;
257
258 if (copy_from_user(info, uptr, bytes))
259 goto error_free;
260
261 } else {
262 unsigned long bytes = min(args->in.bo_info_size, info_size);
263 unsigned i;
264
265 memset(info, 0, args->in.bo_number * info_size);
266 for (i = 0; i < args->in.bo_number; ++i) {
267 if (copy_from_user(&info[i], uptr, bytes))
268 goto error_free;
269
270 uptr += args->in.bo_info_size;
271 }
272 }
273
274 switch (args->in.operation) {
275 case AMDGPU_BO_LIST_OP_CREATE:
276 r = amdgpu_bo_list_create(fpriv, &list, &handle);
277 if (r)
278 goto error_free;
279
280 r = amdgpu_bo_list_set(adev, filp, list, info,
281 args->in.bo_number);
282 amdgpu_bo_list_put(list);
283 if (r)
284 goto error_free;
285
286 break;
287
288 case AMDGPU_BO_LIST_OP_DESTROY:
289 amdgpu_bo_list_destroy(fpriv, handle);
290 handle = 0;
291 break;
292
293 case AMDGPU_BO_LIST_OP_UPDATE:
294 r = -ENOENT;
295 list = amdgpu_bo_list_get(fpriv, handle);
296 if (!list)
297 goto error_free;
298
299 r = amdgpu_bo_list_set(adev, filp, list, info,
300 args->in.bo_number);
301 amdgpu_bo_list_put(list);
302 if (r)
303 goto error_free;
304
305 break;
306
307 default:
308 r = -EINVAL;
309 goto error_free;
310 }
311
312 memset(args, 0, sizeof(*args));
313 args->out.list_handle = handle;
314 drm_free_large(info);
315
316 return 0;
317
318error_free:
319 drm_free_large(info);
320 return r;
321}