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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 *
4 * Copyright IBM Corp. 2007
5 *
6 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
7 */
8
9#ifndef __POWERPC_KVM_HOST_H__
10#define __POWERPC_KVM_HOST_H__
11
12#include <linux/mutex.h>
13#include <linux/hrtimer.h>
14#include <linux/interrupt.h>
15#include <linux/types.h>
16#include <linux/kvm_types.h>
17#include <linux/threads.h>
18#include <linux/spinlock.h>
19#include <linux/kvm_para.h>
20#include <linux/list.h>
21#include <linux/atomic.h>
22#include <asm/kvm_asm.h>
23#include <asm/processor.h>
24#include <asm/page.h>
25#include <asm/cacheflush.h>
26#include <asm/hvcall.h>
27#include <asm/mce.h>
28#include <asm/guest-state-buffer.h>
29
30#define __KVM_HAVE_ARCH_VCPU_DEBUGFS
31
32#define KVM_MAX_VCPUS NR_CPUS
33#define KVM_MAX_VCORES NR_CPUS
34
35#include <asm/cputhreads.h>
36
37#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
38#include <asm/kvm_book3s_asm.h> /* for MAX_SMT_THREADS */
39#define KVM_MAX_VCPU_IDS (MAX_SMT_THREADS * KVM_MAX_VCORES)
40
41/*
42 * Limit the nested partition table to 4096 entries (because that's what
43 * hardware supports). Both guest and host use this value.
44 */
45#define KVM_MAX_NESTED_GUESTS_SHIFT 12
46
47#else
48#define KVM_MAX_VCPU_IDS KVM_MAX_VCPUS
49#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
50
51#define __KVM_HAVE_ARCH_INTC_INITIALIZED
52
53#define KVM_HALT_POLL_NS_DEFAULT 10000 /* 10 us */
54
55/* These values are internal and can be increased later */
56#define KVM_NR_IRQCHIPS 1
57#define KVM_IRQCHIP_NUM_PINS 256
58
59/* PPC-specific vcpu->requests bit members */
60#define KVM_REQ_WATCHDOG KVM_ARCH_REQ(0)
61#define KVM_REQ_EPR_EXIT KVM_ARCH_REQ(1)
62#define KVM_REQ_PENDING_TIMER KVM_ARCH_REQ(2)
63
64#include <linux/mmu_notifier.h>
65
66#define HPTEG_CACHE_NUM (1 << 15)
67#define HPTEG_HASH_BITS_PTE 13
68#define HPTEG_HASH_BITS_PTE_LONG 12
69#define HPTEG_HASH_BITS_VPTE 13
70#define HPTEG_HASH_BITS_VPTE_LONG 5
71#define HPTEG_HASH_BITS_VPTE_64K 11
72#define HPTEG_HASH_NUM_PTE (1 << HPTEG_HASH_BITS_PTE)
73#define HPTEG_HASH_NUM_PTE_LONG (1 << HPTEG_HASH_BITS_PTE_LONG)
74#define HPTEG_HASH_NUM_VPTE (1 << HPTEG_HASH_BITS_VPTE)
75#define HPTEG_HASH_NUM_VPTE_LONG (1 << HPTEG_HASH_BITS_VPTE_LONG)
76#define HPTEG_HASH_NUM_VPTE_64K (1 << HPTEG_HASH_BITS_VPTE_64K)
77
78/* Physical Address Mask - allowed range of real mode RAM access */
79#define KVM_PAM 0x0fffffffffffffffULL
80
81struct lppaca;
82struct slb_shadow;
83struct dtl_entry;
84
85struct kvmppc_vcpu_book3s;
86struct kvmppc_book3s_shadow_vcpu;
87struct kvm_nested_guest;
88
89struct kvm_vm_stat {
90 struct kvm_vm_stat_generic generic;
91 u64 num_2M_pages;
92 u64 num_1G_pages;
93};
94
95struct kvm_vcpu_stat {
96 struct kvm_vcpu_stat_generic generic;
97 u64 sum_exits;
98 u64 mmio_exits;
99 u64 signal_exits;
100 u64 light_exits;
101 /* Account for special types of light exits: */
102 u64 itlb_real_miss_exits;
103 u64 itlb_virt_miss_exits;
104 u64 dtlb_real_miss_exits;
105 u64 dtlb_virt_miss_exits;
106 u64 syscall_exits;
107 u64 isi_exits;
108 u64 dsi_exits;
109 u64 emulated_inst_exits;
110 u64 dec_exits;
111 u64 ext_intr_exits;
112 u64 halt_successful_wait;
113 u64 dbell_exits;
114 u64 gdbell_exits;
115 u64 ld;
116 u64 st;
117#ifdef CONFIG_PPC_BOOK3S
118 u64 pf_storage;
119 u64 pf_instruc;
120 u64 sp_storage;
121 u64 sp_instruc;
122 u64 queue_intr;
123 u64 ld_slow;
124 u64 st_slow;
125#endif
126 u64 pthru_all;
127 u64 pthru_host;
128 u64 pthru_bad_aff;
129};
130
131enum kvm_exit_types {
132 MMIO_EXITS,
133 SIGNAL_EXITS,
134 ITLB_REAL_MISS_EXITS,
135 ITLB_VIRT_MISS_EXITS,
136 DTLB_REAL_MISS_EXITS,
137 DTLB_VIRT_MISS_EXITS,
138 SYSCALL_EXITS,
139 ISI_EXITS,
140 DSI_EXITS,
141 EMULATED_INST_EXITS,
142 EMULATED_MTMSRWE_EXITS,
143 EMULATED_WRTEE_EXITS,
144 EMULATED_MTSPR_EXITS,
145 EMULATED_MFSPR_EXITS,
146 EMULATED_MTMSR_EXITS,
147 EMULATED_MFMSR_EXITS,
148 EMULATED_TLBSX_EXITS,
149 EMULATED_TLBWE_EXITS,
150 EMULATED_RFI_EXITS,
151 EMULATED_RFCI_EXITS,
152 EMULATED_RFDI_EXITS,
153 DEC_EXITS,
154 EXT_INTR_EXITS,
155 HALT_WAKEUP,
156 USR_PR_INST,
157 FP_UNAVAIL,
158 DEBUG_EXITS,
159 TIMEINGUEST,
160 DBELL_EXITS,
161 GDBELL_EXITS,
162 __NUMBER_OF_KVM_EXIT_TYPES
163};
164
165/* allow access to big endian 32bit upper/lower parts and 64bit var */
166struct kvmppc_exit_timing {
167 union {
168 u64 tv64;
169 struct {
170 u32 tbu, tbl;
171 } tv32;
172 };
173};
174
175struct kvmppc_pginfo {
176 unsigned long pfn;
177 atomic_t refcnt;
178};
179
180struct kvmppc_spapr_tce_iommu_table {
181 struct rcu_head rcu;
182 struct list_head next;
183 struct iommu_table *tbl;
184 struct kref kref;
185};
186
187#define TCES_PER_PAGE (PAGE_SIZE / sizeof(u64))
188
189struct kvmppc_spapr_tce_table {
190 struct list_head list;
191 struct kvm *kvm;
192 u64 liobn;
193 struct rcu_head rcu;
194 u32 page_shift;
195 u64 offset; /* in pages */
196 u64 size; /* window size in pages */
197 struct list_head iommu_tables;
198 struct mutex alloc_lock;
199 struct page *pages[];
200};
201
202/* XICS components, defined in book3s_xics.c */
203struct kvmppc_xics;
204struct kvmppc_icp;
205extern struct kvm_device_ops kvm_xics_ops;
206
207/* XIVE components, defined in book3s_xive.c */
208struct kvmppc_xive;
209struct kvmppc_xive_vcpu;
210extern struct kvm_device_ops kvm_xive_ops;
211extern struct kvm_device_ops kvm_xive_native_ops;
212
213struct kvmppc_passthru_irqmap;
214
215/*
216 * The reverse mapping array has one entry for each HPTE,
217 * which stores the guest's view of the second word of the HPTE
218 * (including the guest physical address of the mapping),
219 * plus forward and backward pointers in a doubly-linked ring
220 * of HPTEs that map the same host page. The pointers in this
221 * ring are 32-bit HPTE indexes, to save space.
222 */
223struct revmap_entry {
224 unsigned long guest_rpte;
225 unsigned int forw, back;
226};
227
228/*
229 * The rmap array of size number of guest pages is allocated for each memslot.
230 * This array is used to store usage specific information about the guest page.
231 * Below are the encodings of the various possible usage types.
232 */
233/* Free bits which can be used to define a new usage */
234#define KVMPPC_RMAP_TYPE_MASK 0xff00000000000000
235#define KVMPPC_RMAP_NESTED 0xc000000000000000 /* Nested rmap array */
236#define KVMPPC_RMAP_HPT 0x0100000000000000 /* HPT guest */
237
238/*
239 * rmap usage definition for a hash page table (hpt) guest:
240 * 0x0000080000000000 Lock bit
241 * 0x0000018000000000 RC bits
242 * 0x0000000100000000 Present bit
243 * 0x00000000ffffffff HPT index bits
244 * The bottom 32 bits are the index in the guest HPT of a HPTE that points to
245 * the page.
246 */
247#define KVMPPC_RMAP_LOCK_BIT 43
248#define KVMPPC_RMAP_RC_SHIFT 32
249#define KVMPPC_RMAP_REFERENCED (HPTE_R_R << KVMPPC_RMAP_RC_SHIFT)
250#define KVMPPC_RMAP_PRESENT 0x100000000ul
251#define KVMPPC_RMAP_INDEX 0xfffffffful
252
253struct kvm_arch_memory_slot {
254#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
255 unsigned long *rmap;
256#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
257};
258
259struct kvm_hpt_info {
260 /* Host virtual (linear mapping) address of guest HPT */
261 unsigned long virt;
262 /* Array of reverse mapping entries for each guest HPTE */
263 struct revmap_entry *rev;
264 /* Guest HPT size is 2**(order) bytes */
265 u32 order;
266 /* 1 if HPT allocated with CMA, 0 otherwise */
267 int cma;
268};
269
270struct kvm_resize_hpt;
271
272/* Flag values for kvm_arch.secure_guest */
273#define KVMPPC_SECURE_INIT_START 0x1 /* H_SVM_INIT_START has been called */
274#define KVMPPC_SECURE_INIT_DONE 0x2 /* H_SVM_INIT_DONE completed */
275#define KVMPPC_SECURE_INIT_ABORT 0x4 /* H_SVM_INIT_ABORT issued */
276
277struct kvm_arch {
278 u64 lpid;
279 unsigned int smt_mode; /* # vcpus per virtual core */
280 unsigned int emul_smt_mode; /* emualted SMT mode, on P9 */
281#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
282 unsigned int tlb_sets;
283 struct kvm_hpt_info hpt;
284 atomic64_t mmio_update;
285 unsigned int host_lpid;
286 unsigned long host_lpcr;
287 unsigned long sdr1;
288 unsigned long host_sdr1;
289 unsigned long lpcr;
290 unsigned long vrma_slb_v;
291 int mmu_ready;
292 atomic_t vcpus_running;
293 u32 online_vcores;
294 atomic_t hpte_mod_interest;
295 cpumask_t need_tlb_flush;
296 u8 radix;
297 u8 fwnmi_enabled;
298 u8 secure_guest;
299 u8 svm_enabled;
300 bool nested_enable;
301 bool dawr1_enabled;
302 pgd_t *pgtable;
303 u64 process_table;
304 struct kvm_resize_hpt *resize_hpt; /* protected by kvm->lock */
305#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
306#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
307 struct mutex hpt_mutex;
308#endif
309#ifdef CONFIG_PPC_BOOK3S_64
310 struct list_head spapr_tce_tables;
311 struct list_head rtas_tokens;
312 struct mutex rtas_token_lock;
313 DECLARE_BITMAP(enabled_hcalls, MAX_HCALL_OPCODE/4 + 1);
314#endif
315#ifdef CONFIG_KVM_MPIC
316 struct openpic *mpic;
317#endif
318#ifdef CONFIG_KVM_XICS
319 struct kvmppc_xics *xics;
320 struct kvmppc_xics *xics_device;
321 struct kvmppc_xive *xive; /* Current XIVE device in use */
322 struct {
323 struct kvmppc_xive *native;
324 struct kvmppc_xive *xics_on_xive;
325 } xive_devices;
326 struct kvmppc_passthru_irqmap *pimap;
327#endif
328 struct kvmppc_ops *kvm_ops;
329#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
330 struct mutex uvmem_lock;
331 struct list_head uvmem_pfns;
332 struct mutex mmu_setup_lock; /* nests inside vcpu mutexes */
333 u64 l1_ptcr;
334 struct idr kvm_nested_guest_idr;
335 /* This array can grow quite large, keep it at the end */
336 struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
337#endif
338};
339
340#define VCORE_ENTRY_MAP(vc) ((vc)->entry_exit_map & 0xff)
341#define VCORE_EXIT_MAP(vc) ((vc)->entry_exit_map >> 8)
342#define VCORE_IS_EXITING(vc) (VCORE_EXIT_MAP(vc) != 0)
343
344/* This bit is used when a vcore exit is triggered from outside the vcore */
345#define VCORE_EXIT_REQ 0x10000
346
347/*
348 * Values for vcore_state.
349 * Note that these are arranged such that lower values
350 * (< VCORE_SLEEPING) don't require stolen time accounting
351 * on load/unload, and higher values do.
352 */
353#define VCORE_INACTIVE 0
354#define VCORE_PREEMPT 1
355#define VCORE_PIGGYBACK 2
356#define VCORE_SLEEPING 3
357#define VCORE_RUNNING 4
358#define VCORE_EXITING 5
359#define VCORE_POLLING 6
360
361/*
362 * Struct used to manage memory for a virtual processor area
363 * registered by a PAPR guest. There are three types of area
364 * that a guest can register.
365 */
366struct kvmppc_vpa {
367 unsigned long gpa; /* Current guest phys addr */
368 void *pinned_addr; /* Address in kernel linear mapping */
369 void *pinned_end; /* End of region */
370 unsigned long next_gpa; /* Guest phys addr for update */
371 unsigned long len; /* Number of bytes required */
372 u8 update_pending; /* 1 => update pinned_addr from next_gpa */
373 bool dirty; /* true => area has been modified by kernel */
374};
375
376struct kvmppc_pte {
377 ulong eaddr;
378 u64 vpage;
379 ulong raddr;
380 bool may_read : 1;
381 bool may_write : 1;
382 bool may_execute : 1;
383 unsigned long wimg;
384 unsigned long rc;
385 u8 page_size; /* MMU_PAGE_xxx */
386 u8 page_shift;
387};
388
389struct kvmppc_mmu {
390 /* book3s_64 only */
391 void (*slbmte)(struct kvm_vcpu *vcpu, u64 rb, u64 rs);
392 u64 (*slbmfee)(struct kvm_vcpu *vcpu, u64 slb_nr);
393 u64 (*slbmfev)(struct kvm_vcpu *vcpu, u64 slb_nr);
394 int (*slbfee)(struct kvm_vcpu *vcpu, gva_t eaddr, ulong *ret_slb);
395 void (*slbie)(struct kvm_vcpu *vcpu, u64 slb_nr);
396 void (*slbia)(struct kvm_vcpu *vcpu);
397 /* book3s */
398 void (*mtsrin)(struct kvm_vcpu *vcpu, u32 srnum, ulong value);
399 u32 (*mfsrin)(struct kvm_vcpu *vcpu, u32 srnum);
400 int (*xlate)(struct kvm_vcpu *vcpu, gva_t eaddr,
401 struct kvmppc_pte *pte, bool data, bool iswrite);
402 void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large);
403 int (*esid_to_vsid)(struct kvm_vcpu *vcpu, ulong esid, u64 *vsid);
404 u64 (*ea_to_vp)(struct kvm_vcpu *vcpu, gva_t eaddr, bool data);
405 bool (*is_dcbz32)(struct kvm_vcpu *vcpu);
406};
407
408struct kvmppc_slb {
409 u64 esid;
410 u64 vsid;
411 u64 orige;
412 u64 origv;
413 bool valid : 1;
414 bool Ks : 1;
415 bool Kp : 1;
416 bool nx : 1;
417 bool large : 1; /* PTEs are 16MB */
418 bool tb : 1; /* 1TB segment */
419 bool class : 1;
420 u8 base_page_size; /* MMU_PAGE_xxx */
421};
422
423/* Struct used to accumulate timing information in HV real mode code */
424struct kvmhv_tb_accumulator {
425 u64 seqcount; /* used to synchronize access, also count * 2 */
426 u64 tb_total; /* total time in timebase ticks */
427 u64 tb_min; /* min time */
428 u64 tb_max; /* max time */
429};
430
431#ifdef CONFIG_PPC_BOOK3S_64
432struct kvmppc_irq_map {
433 u32 r_hwirq;
434 u32 v_hwirq;
435 struct irq_desc *desc;
436};
437
438#define KVMPPC_PIRQ_MAPPED 1024
439struct kvmppc_passthru_irqmap {
440 int n_mapped;
441 struct kvmppc_irq_map mapped[KVMPPC_PIRQ_MAPPED];
442};
443#endif
444
445# ifdef CONFIG_PPC_E500
446#define KVMPPC_BOOKE_IAC_NUM 2
447#define KVMPPC_BOOKE_DAC_NUM 2
448# else
449#define KVMPPC_BOOKE_IAC_NUM 4
450#define KVMPPC_BOOKE_DAC_NUM 2
451# endif
452#define KVMPPC_BOOKE_MAX_IAC 4
453#define KVMPPC_BOOKE_MAX_DAC 2
454
455/* KVMPPC_EPR_USER takes precedence over KVMPPC_EPR_KERNEL */
456#define KVMPPC_EPR_NONE 0 /* EPR not supported */
457#define KVMPPC_EPR_USER 1 /* exit to userspace to fill EPR */
458#define KVMPPC_EPR_KERNEL 2 /* in-kernel irqchip */
459
460#define KVMPPC_IRQ_DEFAULT 0
461#define KVMPPC_IRQ_MPIC 1
462#define KVMPPC_IRQ_XICS 2 /* Includes a XIVE option */
463#define KVMPPC_IRQ_XIVE 3 /* XIVE native exploitation mode */
464
465#define MMIO_HPTE_CACHE_SIZE 4
466
467struct mmio_hpte_cache_entry {
468 unsigned long hpte_v;
469 unsigned long hpte_r;
470 unsigned long rpte;
471 unsigned long pte_index;
472 unsigned long eaddr;
473 unsigned long slb_v;
474 long mmio_update;
475 unsigned int slb_base_pshift;
476};
477
478struct mmio_hpte_cache {
479 struct mmio_hpte_cache_entry entry[MMIO_HPTE_CACHE_SIZE];
480 unsigned int index;
481};
482
483#define KVMPPC_VSX_COPY_NONE 0
484#define KVMPPC_VSX_COPY_WORD 1
485#define KVMPPC_VSX_COPY_DWORD 2
486#define KVMPPC_VSX_COPY_DWORD_LOAD_DUMP 3
487#define KVMPPC_VSX_COPY_WORD_LOAD_DUMP 4
488
489#define KVMPPC_VMX_COPY_BYTE 8
490#define KVMPPC_VMX_COPY_HWORD 9
491#define KVMPPC_VMX_COPY_WORD 10
492#define KVMPPC_VMX_COPY_DWORD 11
493
494struct openpic;
495
496/* W0 and W1 of a XIVE thread management context */
497union xive_tma_w01 {
498 struct {
499 u8 nsr;
500 u8 cppr;
501 u8 ipb;
502 u8 lsmfb;
503 u8 ack;
504 u8 inc;
505 u8 age;
506 u8 pipr;
507 };
508 __be64 w01;
509};
510
511 /* Nestedv2 H_GUEST_RUN_VCPU configuration */
512struct kvmhv_nestedv2_config {
513 struct kvmppc_gs_buff_info vcpu_run_output_cfg;
514 struct kvmppc_gs_buff_info vcpu_run_input_cfg;
515 u64 vcpu_run_output_size;
516};
517
518 /* Nestedv2 L1<->L0 communication state */
519struct kvmhv_nestedv2_io {
520 struct kvmhv_nestedv2_config cfg;
521 struct kvmppc_gs_buff *vcpu_run_output;
522 struct kvmppc_gs_buff *vcpu_run_input;
523 struct kvmppc_gs_msg *vcpu_message;
524 struct kvmppc_gs_msg *vcore_message;
525 struct kvmppc_gs_bitmap valids;
526};
527
528struct kvm_vcpu_arch {
529 ulong host_stack;
530 u32 host_pid;
531#ifdef CONFIG_PPC_BOOK3S
532 struct kvmppc_slb slb[64];
533 int slb_max; /* 1 + index of last valid entry in slb[] */
534 int slb_nr; /* total number of entries in SLB */
535 struct kvmppc_mmu mmu;
536 struct kvmppc_vcpu_book3s *book3s;
537#endif
538#ifdef CONFIG_PPC_BOOK3S_32
539 struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
540#endif
541
542 /*
543 * This is passed along to the HV via H_ENTER_NESTED. Align to
544 * prevent it crossing a real 4K page.
545 */
546 struct pt_regs regs __aligned(512);
547
548 struct thread_fp_state fp;
549
550#ifdef CONFIG_SPE
551 ulong evr[32];
552 ulong spefscr;
553 ulong host_spefscr;
554 u64 acc;
555#endif
556#ifdef CONFIG_ALTIVEC
557 struct thread_vr_state vr;
558#endif
559
560#ifdef CONFIG_KVM_BOOKE_HV
561 u32 host_mas4;
562 u32 host_mas6;
563 u32 shadow_epcr;
564 u32 shadow_msrp;
565 u32 eplc;
566 u32 epsc;
567 u32 oldpir;
568#endif
569
570#if defined(CONFIG_BOOKE)
571#if defined(CONFIG_KVM_BOOKE_HV) || defined(CONFIG_64BIT)
572 u32 epcr;
573#endif
574#endif
575
576#ifdef CONFIG_PPC_BOOK3S
577 /* For Gekko paired singles */
578 u32 qpr[32];
579#endif
580
581#ifdef CONFIG_PPC_BOOK3S
582 ulong tar;
583#endif
584
585#ifdef CONFIG_PPC_BOOK3S
586 ulong hflags;
587 ulong guest_owned_ext;
588 ulong purr;
589 ulong spurr;
590 ulong ic;
591 ulong dscr;
592 ulong amr;
593 ulong uamor;
594 ulong iamr;
595 u32 ctrl;
596 u32 dabrx;
597 ulong dabr;
598 ulong dawr0;
599 ulong dawrx0;
600 ulong dawr1;
601 ulong dawrx1;
602 ulong ciabr;
603 ulong cfar;
604 ulong ppr;
605 u32 pspb;
606 u8 load_ebb;
607#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
608 u8 load_tm;
609#endif
610 ulong fscr;
611 ulong shadow_fscr;
612 ulong ebbhr;
613 ulong ebbrr;
614 ulong bescr;
615 ulong csigr;
616 ulong tacr;
617 ulong tcscr;
618 ulong acop;
619 ulong wort;
620 ulong tid;
621 ulong psscr;
622 ulong hfscr;
623 ulong shadow_srr1;
624#endif
625 u32 vrsave; /* also USPRG0 */
626 u32 mmucr;
627 /* shadow_msr is unused for BookE HV */
628 ulong shadow_msr;
629 ulong csrr0;
630 ulong csrr1;
631 ulong dsrr0;
632 ulong dsrr1;
633 ulong mcsrr0;
634 ulong mcsrr1;
635 ulong mcsr;
636 ulong dec;
637#ifdef CONFIG_BOOKE
638 u32 decar;
639#endif
640 /* Time base value when we entered the guest */
641 u64 entry_tb;
642 u64 entry_vtb;
643 u64 entry_ic;
644 u32 tcr;
645 ulong tsr; /* we need to perform set/clr_bits() which requires ulong */
646 u32 ivor[64];
647 ulong ivpr;
648 u32 pvr;
649
650 u32 shadow_pid;
651 u32 shadow_pid1;
652 u32 pid;
653 u32 swap_pid;
654
655 u32 ccr0;
656 u32 ccr1;
657 u32 dbsr;
658
659 u64 mmcr[4]; /* MMCR0, MMCR1, MMCR2, MMCR3 */
660 u64 mmcra;
661 u64 mmcrs;
662 u32 pmc[8];
663 u32 spmc[2];
664 u64 siar;
665 u64 sdar;
666 u64 sier[3];
667#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
668 u64 tfhar;
669 u64 texasr;
670 u64 tfiar;
671 u64 orig_texasr;
672
673 u32 cr_tm;
674 u64 xer_tm;
675 u64 lr_tm;
676 u64 ctr_tm;
677 u64 amr_tm;
678 u64 ppr_tm;
679 u64 dscr_tm;
680 u64 tar_tm;
681
682 ulong gpr_tm[32];
683
684 struct thread_fp_state fp_tm;
685
686 struct thread_vr_state vr_tm;
687 u32 vrsave_tm; /* also USPRG0 */
688#endif
689
690#ifdef CONFIG_KVM_EXIT_TIMING
691 struct mutex exit_timing_lock;
692 struct kvmppc_exit_timing timing_exit;
693 struct kvmppc_exit_timing timing_last_enter;
694 u32 last_exit_type;
695 u32 timing_count_type[__NUMBER_OF_KVM_EXIT_TYPES];
696 u64 timing_sum_duration[__NUMBER_OF_KVM_EXIT_TYPES];
697 u64 timing_sum_quad_duration[__NUMBER_OF_KVM_EXIT_TYPES];
698 u64 timing_min_duration[__NUMBER_OF_KVM_EXIT_TYPES];
699 u64 timing_max_duration[__NUMBER_OF_KVM_EXIT_TYPES];
700 u64 timing_last_exit;
701#endif
702
703#ifdef CONFIG_PPC_BOOK3S
704 ulong fault_dar;
705 u32 fault_dsisr;
706 unsigned long intr_msr;
707 /*
708 * POWER9 and later: fault_gpa contains the guest real address of page
709 * fault for a radix guest, or segment descriptor (equivalent to result
710 * from slbmfev of SLB entry that translated the EA) for hash guests.
711 */
712 ulong fault_gpa;
713#endif
714
715#ifdef CONFIG_BOOKE
716 ulong fault_dear;
717 ulong fault_esr;
718 ulong queued_dear;
719 ulong queued_esr;
720 spinlock_t wdt_lock;
721 struct timer_list wdt_timer;
722 u32 tlbcfg[4];
723 u32 tlbps[4];
724 u32 mmucfg;
725 u32 eptcfg;
726 u32 epr;
727 u64 sprg9;
728 u32 pwrmgtcr0;
729 u32 crit_save;
730 /* guest debug registers*/
731 struct debug_reg dbg_reg;
732#endif
733 gpa_t paddr_accessed;
734 gva_t vaddr_accessed;
735 pgd_t *pgdir;
736
737 u16 io_gpr; /* GPR used as IO source/target */
738 u8 mmio_host_swabbed;
739 u8 mmio_sign_extend;
740 /* conversion between single and double precision */
741 u8 mmio_sp64_extend;
742 /*
743 * Number of simulations for vsx.
744 * If we use 2*8bytes to simulate 1*16bytes,
745 * then the number should be 2 and
746 * mmio_copy_type=KVMPPC_VSX_COPY_DWORD.
747 * If we use 4*4bytes to simulate 1*16bytes,
748 * the number should be 4 and
749 * mmio_vsx_copy_type=KVMPPC_VSX_COPY_WORD.
750 */
751 u8 mmio_vsx_copy_nums;
752 u8 mmio_vsx_offset;
753 u8 mmio_vmx_copy_nums;
754 u8 mmio_vmx_offset;
755 u8 mmio_copy_type;
756 u8 osi_needed;
757 u8 osi_enabled;
758 u8 papr_enabled;
759 u8 watchdog_enabled;
760 u8 sane;
761 u8 cpu_type;
762 u8 hcall_needed;
763 u8 epr_flags; /* KVMPPC_EPR_xxx */
764 u8 epr_needed;
765 u8 external_oneshot; /* clear external irq after delivery */
766
767 u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */
768
769 struct hrtimer dec_timer;
770 u64 dec_jiffies;
771 u64 dec_expires; /* Relative to guest timebase. */
772 unsigned long pending_exceptions;
773 u8 ceded;
774 u8 prodded;
775 u8 doorbell_request;
776 u8 irq_pending; /* Used by XIVE to signal pending guest irqs */
777 unsigned long last_inst;
778
779 struct rcuwait wait;
780 struct rcuwait *waitp;
781 struct kvmppc_vcore *vcore;
782 int ret;
783 int trap;
784 int state;
785 int ptid;
786 int thread_cpu;
787 int prev_cpu;
788 bool timer_running;
789 wait_queue_head_t cpu_run;
790 struct machine_check_event mce_evt; /* Valid if trap == 0x200 */
791
792 struct kvm_vcpu_arch_shared *shared;
793#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
794 bool shared_big_endian;
795#endif
796 unsigned long magic_page_pa; /* phys addr to map the magic page to */
797 unsigned long magic_page_ea; /* effect. addr to map the magic page to */
798 bool disable_kernel_nx;
799
800 int irq_type; /* one of KVM_IRQ_* */
801 int irq_cpu_id;
802 struct openpic *mpic; /* KVM_IRQ_MPIC */
803#ifdef CONFIG_KVM_XICS
804 struct kvmppc_icp *icp; /* XICS presentation controller */
805 struct kvmppc_xive_vcpu *xive_vcpu; /* XIVE virtual CPU data */
806 __be32 xive_cam_word; /* Cooked W2 in proper endian with valid bit */
807 u8 xive_pushed; /* Is the VP pushed on the physical CPU ? */
808 u8 xive_esc_on; /* Is the escalation irq enabled ? */
809 union xive_tma_w01 xive_saved_state; /* W0..1 of XIVE thread state */
810 u64 xive_esc_raddr; /* Escalation interrupt ESB real addr */
811 u64 xive_esc_vaddr; /* Escalation interrupt ESB virt addr */
812#endif
813
814#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
815 struct kvm_vcpu_arch_shared shregs;
816
817 struct mmio_hpte_cache mmio_cache;
818 unsigned long pgfault_addr;
819 long pgfault_index;
820 unsigned long pgfault_hpte[2];
821 struct mmio_hpte_cache_entry *pgfault_cache;
822
823 struct task_struct *run_task;
824
825 spinlock_t vpa_update_lock;
826 struct kvmppc_vpa vpa;
827 struct kvmppc_vpa dtl;
828 struct dtl_entry *dtl_ptr;
829 unsigned long dtl_index;
830 u64 stolen_logged;
831 struct kvmppc_vpa slb_shadow;
832
833 spinlock_t tbacct_lock;
834 u64 busy_stolen;
835 u64 busy_preempt;
836
837 u64 emul_inst;
838
839 u32 online;
840
841 u64 hfscr_permitted; /* A mask of permitted HFSCR facilities */
842
843 /* For support of nested guests */
844 struct kvm_nested_guest *nested;
845 u64 nested_hfscr; /* HFSCR that the L1 requested for the nested guest */
846 u32 nested_vcpu_id;
847 gpa_t nested_io_gpr;
848 /* For nested APIv2 guests*/
849 struct kvmhv_nestedv2_io nestedv2_io;
850#endif
851
852#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
853 struct kvmhv_tb_accumulator *cur_activity; /* What we're timing */
854 u64 cur_tb_start; /* when it started */
855#ifdef CONFIG_KVM_BOOK3S_HV_P9_TIMING
856 struct kvmhv_tb_accumulator vcpu_entry;
857 struct kvmhv_tb_accumulator vcpu_exit;
858 struct kvmhv_tb_accumulator in_guest;
859 struct kvmhv_tb_accumulator hcall;
860 struct kvmhv_tb_accumulator pg_fault;
861 struct kvmhv_tb_accumulator guest_entry;
862 struct kvmhv_tb_accumulator guest_exit;
863#else
864 struct kvmhv_tb_accumulator rm_entry; /* real-mode entry code */
865 struct kvmhv_tb_accumulator rm_intr; /* real-mode intr handling */
866 struct kvmhv_tb_accumulator rm_exit; /* real-mode exit code */
867 struct kvmhv_tb_accumulator guest_time; /* guest execution */
868 struct kvmhv_tb_accumulator cede_time; /* time napping inside guest */
869#endif
870#endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
871};
872
873#define VCPU_FPR(vcpu, i) (vcpu)->arch.fp.fpr[i][TS_FPROFFSET]
874#define VCPU_VSX_FPR(vcpu, i, j) ((vcpu)->arch.fp.fpr[i][j])
875#define VCPU_VSX_VR(vcpu, i) ((vcpu)->arch.vr.vr[i])
876
877/* Values for vcpu->arch.state */
878#define KVMPPC_VCPU_NOTREADY 0
879#define KVMPPC_VCPU_RUNNABLE 1
880#define KVMPPC_VCPU_BUSY_IN_HOST 2
881
882/* Values for vcpu->arch.io_gpr */
883#define KVM_MMIO_REG_MASK 0x003f
884#define KVM_MMIO_REG_EXT_MASK 0xffc0
885#define KVM_MMIO_REG_GPR 0x0000
886#define KVM_MMIO_REG_FPR 0x0040
887#define KVM_MMIO_REG_QPR 0x0080
888#define KVM_MMIO_REG_FQPR 0x00c0
889#define KVM_MMIO_REG_VSX 0x0100
890#define KVM_MMIO_REG_VMX 0x0180
891#define KVM_MMIO_REG_NESTED_GPR 0xffc0
892
893
894#define __KVM_HAVE_ARCH_WQP
895#define __KVM_HAVE_CREATE_DEVICE
896
897static inline void kvm_arch_sync_events(struct kvm *kvm) {}
898static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {}
899static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {}
900static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
901static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {}
902static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {}
903
904#endif /* __POWERPC_KVM_HOST_H__ */
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
16 *
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18 */
19
20#ifndef __POWERPC_KVM_HOST_H__
21#define __POWERPC_KVM_HOST_H__
22
23#include <linux/mutex.h>
24#include <linux/hrtimer.h>
25#include <linux/interrupt.h>
26#include <linux/types.h>
27#include <linux/kvm_types.h>
28#include <linux/threads.h>
29#include <linux/spinlock.h>
30#include <linux/kvm_para.h>
31#include <linux/list.h>
32#include <linux/atomic.h>
33#include <asm/kvm_asm.h>
34#include <asm/processor.h>
35#include <asm/page.h>
36#include <asm/cacheflush.h>
37#include <asm/hvcall.h>
38
39#define KVM_MAX_VCPUS NR_CPUS
40#define KVM_MAX_VCORES NR_CPUS
41#define KVM_USER_MEM_SLOTS 512
42
43#include <asm/cputhreads.h>
44#define KVM_MAX_VCPU_ID (threads_per_subcore * KVM_MAX_VCORES)
45
46#define __KVM_HAVE_ARCH_INTC_INITIALIZED
47
48#ifdef CONFIG_KVM_MMIO
49#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
50#endif
51#define KVM_HALT_POLL_NS_DEFAULT 10000 /* 10 us */
52
53/* These values are internal and can be increased later */
54#define KVM_NR_IRQCHIPS 1
55#define KVM_IRQCHIP_NUM_PINS 256
56
57/* PPC-specific vcpu->requests bit members */
58#define KVM_REQ_WATCHDOG 8
59#define KVM_REQ_EPR_EXIT 9
60
61#include <linux/mmu_notifier.h>
62
63#define KVM_ARCH_WANT_MMU_NOTIFIER
64
65extern int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
66extern int kvm_unmap_hva_range(struct kvm *kvm,
67 unsigned long start, unsigned long end);
68extern int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
69extern int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
70extern void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
71
72static inline void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
73 unsigned long address)
74{
75}
76
77#define HPTEG_CACHE_NUM (1 << 15)
78#define HPTEG_HASH_BITS_PTE 13
79#define HPTEG_HASH_BITS_PTE_LONG 12
80#define HPTEG_HASH_BITS_VPTE 13
81#define HPTEG_HASH_BITS_VPTE_LONG 5
82#define HPTEG_HASH_BITS_VPTE_64K 11
83#define HPTEG_HASH_NUM_PTE (1 << HPTEG_HASH_BITS_PTE)
84#define HPTEG_HASH_NUM_PTE_LONG (1 << HPTEG_HASH_BITS_PTE_LONG)
85#define HPTEG_HASH_NUM_VPTE (1 << HPTEG_HASH_BITS_VPTE)
86#define HPTEG_HASH_NUM_VPTE_LONG (1 << HPTEG_HASH_BITS_VPTE_LONG)
87#define HPTEG_HASH_NUM_VPTE_64K (1 << HPTEG_HASH_BITS_VPTE_64K)
88
89/* Physical Address Mask - allowed range of real mode RAM access */
90#define KVM_PAM 0x0fffffffffffffffULL
91
92struct lppaca;
93struct slb_shadow;
94struct dtl_entry;
95
96struct kvmppc_vcpu_book3s;
97struct kvmppc_book3s_shadow_vcpu;
98
99struct kvm_vm_stat {
100 ulong remote_tlb_flush;
101};
102
103struct kvm_vcpu_stat {
104 u64 sum_exits;
105 u64 mmio_exits;
106 u64 signal_exits;
107 u64 light_exits;
108 /* Account for special types of light exits: */
109 u64 itlb_real_miss_exits;
110 u64 itlb_virt_miss_exits;
111 u64 dtlb_real_miss_exits;
112 u64 dtlb_virt_miss_exits;
113 u64 syscall_exits;
114 u64 isi_exits;
115 u64 dsi_exits;
116 u64 emulated_inst_exits;
117 u64 dec_exits;
118 u64 ext_intr_exits;
119 u64 halt_poll_success_ns;
120 u64 halt_poll_fail_ns;
121 u64 halt_wait_ns;
122 u64 halt_successful_poll;
123 u64 halt_attempted_poll;
124 u64 halt_successful_wait;
125 u64 halt_poll_invalid;
126 u64 halt_wakeup;
127 u64 dbell_exits;
128 u64 gdbell_exits;
129 u64 ld;
130 u64 st;
131#ifdef CONFIG_PPC_BOOK3S
132 u64 pf_storage;
133 u64 pf_instruc;
134 u64 sp_storage;
135 u64 sp_instruc;
136 u64 queue_intr;
137 u64 ld_slow;
138 u64 st_slow;
139#endif
140 u64 pthru_all;
141 u64 pthru_host;
142 u64 pthru_bad_aff;
143};
144
145enum kvm_exit_types {
146 MMIO_EXITS,
147 SIGNAL_EXITS,
148 ITLB_REAL_MISS_EXITS,
149 ITLB_VIRT_MISS_EXITS,
150 DTLB_REAL_MISS_EXITS,
151 DTLB_VIRT_MISS_EXITS,
152 SYSCALL_EXITS,
153 ISI_EXITS,
154 DSI_EXITS,
155 EMULATED_INST_EXITS,
156 EMULATED_MTMSRWE_EXITS,
157 EMULATED_WRTEE_EXITS,
158 EMULATED_MTSPR_EXITS,
159 EMULATED_MFSPR_EXITS,
160 EMULATED_MTMSR_EXITS,
161 EMULATED_MFMSR_EXITS,
162 EMULATED_TLBSX_EXITS,
163 EMULATED_TLBWE_EXITS,
164 EMULATED_RFI_EXITS,
165 EMULATED_RFCI_EXITS,
166 EMULATED_RFDI_EXITS,
167 DEC_EXITS,
168 EXT_INTR_EXITS,
169 HALT_WAKEUP,
170 USR_PR_INST,
171 FP_UNAVAIL,
172 DEBUG_EXITS,
173 TIMEINGUEST,
174 DBELL_EXITS,
175 GDBELL_EXITS,
176 __NUMBER_OF_KVM_EXIT_TYPES
177};
178
179/* allow access to big endian 32bit upper/lower parts and 64bit var */
180struct kvmppc_exit_timing {
181 union {
182 u64 tv64;
183 struct {
184 u32 tbu, tbl;
185 } tv32;
186 };
187};
188
189struct kvmppc_pginfo {
190 unsigned long pfn;
191 atomic_t refcnt;
192};
193
194struct kvmppc_spapr_tce_table {
195 struct list_head list;
196 struct kvm *kvm;
197 u64 liobn;
198 struct rcu_head rcu;
199 u32 page_shift;
200 u64 offset; /* in pages */
201 u64 size; /* window size in pages */
202 struct page *pages[0];
203};
204
205/* XICS components, defined in book3s_xics.c */
206struct kvmppc_xics;
207struct kvmppc_icp;
208
209struct kvmppc_passthru_irqmap;
210
211/*
212 * The reverse mapping array has one entry for each HPTE,
213 * which stores the guest's view of the second word of the HPTE
214 * (including the guest physical address of the mapping),
215 * plus forward and backward pointers in a doubly-linked ring
216 * of HPTEs that map the same host page. The pointers in this
217 * ring are 32-bit HPTE indexes, to save space.
218 */
219struct revmap_entry {
220 unsigned long guest_rpte;
221 unsigned int forw, back;
222};
223
224/*
225 * We use the top bit of each memslot->arch.rmap entry as a lock bit,
226 * and bit 32 as a present flag. The bottom 32 bits are the
227 * index in the guest HPT of a HPTE that points to the page.
228 */
229#define KVMPPC_RMAP_LOCK_BIT 63
230#define KVMPPC_RMAP_RC_SHIFT 32
231#define KVMPPC_RMAP_CHG_SHIFT 48
232#define KVMPPC_RMAP_REFERENCED (HPTE_R_R << KVMPPC_RMAP_RC_SHIFT)
233#define KVMPPC_RMAP_CHANGED (HPTE_R_C << KVMPPC_RMAP_RC_SHIFT)
234#define KVMPPC_RMAP_CHG_ORDER (0x3ful << KVMPPC_RMAP_CHG_SHIFT)
235#define KVMPPC_RMAP_PRESENT 0x100000000ul
236#define KVMPPC_RMAP_INDEX 0xfffffffful
237
238struct kvm_arch_memory_slot {
239#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
240 unsigned long *rmap;
241#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
242};
243
244struct kvm_arch {
245 unsigned int lpid;
246#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
247 unsigned int tlb_sets;
248 unsigned long hpt_virt;
249 struct revmap_entry *revmap;
250 atomic64_t mmio_update;
251 unsigned int host_lpid;
252 unsigned long host_lpcr;
253 unsigned long sdr1;
254 unsigned long host_sdr1;
255 int tlbie_lock;
256 unsigned long lpcr;
257 unsigned long vrma_slb_v;
258 int hpte_setup_done;
259 u32 hpt_order;
260 atomic_t vcpus_running;
261 u32 online_vcores;
262 unsigned long hpt_npte;
263 unsigned long hpt_mask;
264 atomic_t hpte_mod_interest;
265 cpumask_t need_tlb_flush;
266 int hpt_cma_alloc;
267 struct dentry *debugfs_dir;
268 struct dentry *htab_dentry;
269#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
270#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
271 struct mutex hpt_mutex;
272#endif
273#ifdef CONFIG_PPC_BOOK3S_64
274 struct list_head spapr_tce_tables;
275 struct list_head rtas_tokens;
276 DECLARE_BITMAP(enabled_hcalls, MAX_HCALL_OPCODE/4 + 1);
277#endif
278#ifdef CONFIG_KVM_MPIC
279 struct openpic *mpic;
280#endif
281#ifdef CONFIG_KVM_XICS
282 struct kvmppc_xics *xics;
283 struct kvmppc_passthru_irqmap *pimap;
284#endif
285 struct kvmppc_ops *kvm_ops;
286#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
287 /* This array can grow quite large, keep it at the end */
288 struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
289#endif
290};
291
292#define VCORE_ENTRY_MAP(vc) ((vc)->entry_exit_map & 0xff)
293#define VCORE_EXIT_MAP(vc) ((vc)->entry_exit_map >> 8)
294#define VCORE_IS_EXITING(vc) (VCORE_EXIT_MAP(vc) != 0)
295
296/* This bit is used when a vcore exit is triggered from outside the vcore */
297#define VCORE_EXIT_REQ 0x10000
298
299/*
300 * Values for vcore_state.
301 * Note that these are arranged such that lower values
302 * (< VCORE_SLEEPING) don't require stolen time accounting
303 * on load/unload, and higher values do.
304 */
305#define VCORE_INACTIVE 0
306#define VCORE_PREEMPT 1
307#define VCORE_PIGGYBACK 2
308#define VCORE_SLEEPING 3
309#define VCORE_RUNNING 4
310#define VCORE_EXITING 5
311#define VCORE_POLLING 6
312
313/*
314 * Struct used to manage memory for a virtual processor area
315 * registered by a PAPR guest. There are three types of area
316 * that a guest can register.
317 */
318struct kvmppc_vpa {
319 unsigned long gpa; /* Current guest phys addr */
320 void *pinned_addr; /* Address in kernel linear mapping */
321 void *pinned_end; /* End of region */
322 unsigned long next_gpa; /* Guest phys addr for update */
323 unsigned long len; /* Number of bytes required */
324 u8 update_pending; /* 1 => update pinned_addr from next_gpa */
325 bool dirty; /* true => area has been modified by kernel */
326};
327
328struct kvmppc_pte {
329 ulong eaddr;
330 u64 vpage;
331 ulong raddr;
332 bool may_read : 1;
333 bool may_write : 1;
334 bool may_execute : 1;
335 u8 page_size; /* MMU_PAGE_xxx */
336};
337
338struct kvmppc_mmu {
339 /* book3s_64 only */
340 void (*slbmte)(struct kvm_vcpu *vcpu, u64 rb, u64 rs);
341 u64 (*slbmfee)(struct kvm_vcpu *vcpu, u64 slb_nr);
342 u64 (*slbmfev)(struct kvm_vcpu *vcpu, u64 slb_nr);
343 void (*slbie)(struct kvm_vcpu *vcpu, u64 slb_nr);
344 void (*slbia)(struct kvm_vcpu *vcpu);
345 /* book3s */
346 void (*mtsrin)(struct kvm_vcpu *vcpu, u32 srnum, ulong value);
347 u32 (*mfsrin)(struct kvm_vcpu *vcpu, u32 srnum);
348 int (*xlate)(struct kvm_vcpu *vcpu, gva_t eaddr,
349 struct kvmppc_pte *pte, bool data, bool iswrite);
350 void (*reset_msr)(struct kvm_vcpu *vcpu);
351 void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large);
352 int (*esid_to_vsid)(struct kvm_vcpu *vcpu, ulong esid, u64 *vsid);
353 u64 (*ea_to_vp)(struct kvm_vcpu *vcpu, gva_t eaddr, bool data);
354 bool (*is_dcbz32)(struct kvm_vcpu *vcpu);
355};
356
357struct kvmppc_slb {
358 u64 esid;
359 u64 vsid;
360 u64 orige;
361 u64 origv;
362 bool valid : 1;
363 bool Ks : 1;
364 bool Kp : 1;
365 bool nx : 1;
366 bool large : 1; /* PTEs are 16MB */
367 bool tb : 1; /* 1TB segment */
368 bool class : 1;
369 u8 base_page_size; /* MMU_PAGE_xxx */
370};
371
372/* Struct used to accumulate timing information in HV real mode code */
373struct kvmhv_tb_accumulator {
374 u64 seqcount; /* used to synchronize access, also count * 2 */
375 u64 tb_total; /* total time in timebase ticks */
376 u64 tb_min; /* min time */
377 u64 tb_max; /* max time */
378};
379
380#ifdef CONFIG_PPC_BOOK3S_64
381struct kvmppc_irq_map {
382 u32 r_hwirq;
383 u32 v_hwirq;
384 struct irq_desc *desc;
385};
386
387#define KVMPPC_PIRQ_MAPPED 1024
388struct kvmppc_passthru_irqmap {
389 int n_mapped;
390 struct kvmppc_irq_map mapped[KVMPPC_PIRQ_MAPPED];
391};
392#endif
393
394# ifdef CONFIG_PPC_FSL_BOOK3E
395#define KVMPPC_BOOKE_IAC_NUM 2
396#define KVMPPC_BOOKE_DAC_NUM 2
397# else
398#define KVMPPC_BOOKE_IAC_NUM 4
399#define KVMPPC_BOOKE_DAC_NUM 2
400# endif
401#define KVMPPC_BOOKE_MAX_IAC 4
402#define KVMPPC_BOOKE_MAX_DAC 2
403
404/* KVMPPC_EPR_USER takes precedence over KVMPPC_EPR_KERNEL */
405#define KVMPPC_EPR_NONE 0 /* EPR not supported */
406#define KVMPPC_EPR_USER 1 /* exit to userspace to fill EPR */
407#define KVMPPC_EPR_KERNEL 2 /* in-kernel irqchip */
408
409#define KVMPPC_IRQ_DEFAULT 0
410#define KVMPPC_IRQ_MPIC 1
411#define KVMPPC_IRQ_XICS 2
412
413#define MMIO_HPTE_CACHE_SIZE 4
414
415struct mmio_hpte_cache_entry {
416 unsigned long hpte_v;
417 unsigned long hpte_r;
418 unsigned long rpte;
419 unsigned long pte_index;
420 unsigned long eaddr;
421 unsigned long slb_v;
422 long mmio_update;
423 unsigned int slb_base_pshift;
424};
425
426struct mmio_hpte_cache {
427 struct mmio_hpte_cache_entry entry[MMIO_HPTE_CACHE_SIZE];
428 unsigned int index;
429};
430
431struct openpic;
432
433struct kvm_vcpu_arch {
434 ulong host_stack;
435 u32 host_pid;
436#ifdef CONFIG_PPC_BOOK3S
437 struct kvmppc_slb slb[64];
438 int slb_max; /* 1 + index of last valid entry in slb[] */
439 int slb_nr; /* total number of entries in SLB */
440 struct kvmppc_mmu mmu;
441 struct kvmppc_vcpu_book3s *book3s;
442#endif
443#ifdef CONFIG_PPC_BOOK3S_32
444 struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
445#endif
446
447 ulong gpr[32];
448
449 struct thread_fp_state fp;
450
451#ifdef CONFIG_SPE
452 ulong evr[32];
453 ulong spefscr;
454 ulong host_spefscr;
455 u64 acc;
456#endif
457#ifdef CONFIG_ALTIVEC
458 struct thread_vr_state vr;
459#endif
460
461#ifdef CONFIG_KVM_BOOKE_HV
462 u32 host_mas4;
463 u32 host_mas6;
464 u32 shadow_epcr;
465 u32 shadow_msrp;
466 u32 eplc;
467 u32 epsc;
468 u32 oldpir;
469#endif
470
471#if defined(CONFIG_BOOKE)
472#if defined(CONFIG_KVM_BOOKE_HV) || defined(CONFIG_64BIT)
473 u32 epcr;
474#endif
475#endif
476
477#ifdef CONFIG_PPC_BOOK3S
478 /* For Gekko paired singles */
479 u32 qpr[32];
480#endif
481
482 ulong pc;
483 ulong ctr;
484 ulong lr;
485#ifdef CONFIG_PPC_BOOK3S
486 ulong tar;
487#endif
488
489 ulong xer;
490 u32 cr;
491
492#ifdef CONFIG_PPC_BOOK3S
493 ulong hflags;
494 ulong guest_owned_ext;
495 ulong purr;
496 ulong spurr;
497 ulong ic;
498 ulong dscr;
499 ulong amr;
500 ulong uamor;
501 ulong iamr;
502 u32 ctrl;
503 u32 dabrx;
504 ulong dabr;
505 ulong dawr;
506 ulong dawrx;
507 ulong ciabr;
508 ulong cfar;
509 ulong ppr;
510 u32 pspb;
511 ulong fscr;
512 ulong shadow_fscr;
513 ulong ebbhr;
514 ulong ebbrr;
515 ulong bescr;
516 ulong csigr;
517 ulong tacr;
518 ulong tcscr;
519 ulong acop;
520 ulong wort;
521 ulong tid;
522 ulong psscr;
523 ulong shadow_srr1;
524#endif
525 u32 vrsave; /* also USPRG0 */
526 u32 mmucr;
527 /* shadow_msr is unused for BookE HV */
528 ulong shadow_msr;
529 ulong csrr0;
530 ulong csrr1;
531 ulong dsrr0;
532 ulong dsrr1;
533 ulong mcsrr0;
534 ulong mcsrr1;
535 ulong mcsr;
536 u32 dec;
537#ifdef CONFIG_BOOKE
538 u32 decar;
539#endif
540 /* Time base value when we entered the guest */
541 u64 entry_tb;
542 u64 entry_vtb;
543 u64 entry_ic;
544 u32 tcr;
545 ulong tsr; /* we need to perform set/clr_bits() which requires ulong */
546 u32 ivor[64];
547 ulong ivpr;
548 u32 pvr;
549
550 u32 shadow_pid;
551 u32 shadow_pid1;
552 u32 pid;
553 u32 swap_pid;
554
555 u32 ccr0;
556 u32 ccr1;
557 u32 dbsr;
558
559 u64 mmcr[5];
560 u32 pmc[8];
561 u32 spmc[2];
562 u64 siar;
563 u64 sdar;
564 u64 sier;
565#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
566 u64 tfhar;
567 u64 texasr;
568 u64 tfiar;
569
570 u32 cr_tm;
571 u64 xer_tm;
572 u64 lr_tm;
573 u64 ctr_tm;
574 u64 amr_tm;
575 u64 ppr_tm;
576 u64 dscr_tm;
577 u64 tar_tm;
578
579 ulong gpr_tm[32];
580
581 struct thread_fp_state fp_tm;
582
583 struct thread_vr_state vr_tm;
584 u32 vrsave_tm; /* also USPRG0 */
585
586#endif
587
588#ifdef CONFIG_KVM_EXIT_TIMING
589 struct mutex exit_timing_lock;
590 struct kvmppc_exit_timing timing_exit;
591 struct kvmppc_exit_timing timing_last_enter;
592 u32 last_exit_type;
593 u32 timing_count_type[__NUMBER_OF_KVM_EXIT_TYPES];
594 u64 timing_sum_duration[__NUMBER_OF_KVM_EXIT_TYPES];
595 u64 timing_sum_quad_duration[__NUMBER_OF_KVM_EXIT_TYPES];
596 u64 timing_min_duration[__NUMBER_OF_KVM_EXIT_TYPES];
597 u64 timing_max_duration[__NUMBER_OF_KVM_EXIT_TYPES];
598 u64 timing_last_exit;
599 struct dentry *debugfs_exit_timing;
600#endif
601
602#ifdef CONFIG_PPC_BOOK3S
603 ulong fault_dar;
604 u32 fault_dsisr;
605 unsigned long intr_msr;
606#endif
607
608#ifdef CONFIG_BOOKE
609 ulong fault_dear;
610 ulong fault_esr;
611 ulong queued_dear;
612 ulong queued_esr;
613 spinlock_t wdt_lock;
614 struct timer_list wdt_timer;
615 u32 tlbcfg[4];
616 u32 tlbps[4];
617 u32 mmucfg;
618 u32 eptcfg;
619 u32 epr;
620 u64 sprg9;
621 u32 pwrmgtcr0;
622 u32 crit_save;
623 /* guest debug registers*/
624 struct debug_reg dbg_reg;
625#endif
626 gpa_t paddr_accessed;
627 gva_t vaddr_accessed;
628 pgd_t *pgdir;
629
630 u8 io_gpr; /* GPR used as IO source/target */
631 u8 mmio_host_swabbed;
632 u8 mmio_sign_extend;
633 u8 osi_needed;
634 u8 osi_enabled;
635 u8 papr_enabled;
636 u8 watchdog_enabled;
637 u8 sane;
638 u8 cpu_type;
639 u8 hcall_needed;
640 u8 epr_flags; /* KVMPPC_EPR_xxx */
641 u8 epr_needed;
642
643 u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */
644
645 struct hrtimer dec_timer;
646 u64 dec_jiffies;
647 u64 dec_expires;
648 unsigned long pending_exceptions;
649 u8 ceded;
650 u8 prodded;
651 u32 last_inst;
652
653 struct swait_queue_head *wqp;
654 struct kvmppc_vcore *vcore;
655 int ret;
656 int trap;
657 int state;
658 int ptid;
659 int thread_cpu;
660 bool timer_running;
661 wait_queue_head_t cpu_run;
662
663 struct kvm_vcpu_arch_shared *shared;
664#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
665 bool shared_big_endian;
666#endif
667 unsigned long magic_page_pa; /* phys addr to map the magic page to */
668 unsigned long magic_page_ea; /* effect. addr to map the magic page to */
669 bool disable_kernel_nx;
670
671 int irq_type; /* one of KVM_IRQ_* */
672 int irq_cpu_id;
673 struct openpic *mpic; /* KVM_IRQ_MPIC */
674#ifdef CONFIG_KVM_XICS
675 struct kvmppc_icp *icp; /* XICS presentation controller */
676#endif
677
678#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
679 struct kvm_vcpu_arch_shared shregs;
680
681 struct mmio_hpte_cache mmio_cache;
682 unsigned long pgfault_addr;
683 long pgfault_index;
684 unsigned long pgfault_hpte[2];
685 struct mmio_hpte_cache_entry *pgfault_cache;
686
687 struct task_struct *run_task;
688 struct kvm_run *kvm_run;
689
690 spinlock_t vpa_update_lock;
691 struct kvmppc_vpa vpa;
692 struct kvmppc_vpa dtl;
693 struct dtl_entry *dtl_ptr;
694 unsigned long dtl_index;
695 u64 stolen_logged;
696 struct kvmppc_vpa slb_shadow;
697
698 spinlock_t tbacct_lock;
699 u64 busy_stolen;
700 u64 busy_preempt;
701
702 u32 emul_inst;
703#endif
704
705#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
706 struct kvmhv_tb_accumulator *cur_activity; /* What we're timing */
707 u64 cur_tb_start; /* when it started */
708 struct kvmhv_tb_accumulator rm_entry; /* real-mode entry code */
709 struct kvmhv_tb_accumulator rm_intr; /* real-mode intr handling */
710 struct kvmhv_tb_accumulator rm_exit; /* real-mode exit code */
711 struct kvmhv_tb_accumulator guest_time; /* guest execution */
712 struct kvmhv_tb_accumulator cede_time; /* time napping inside guest */
713
714 struct dentry *debugfs_dir;
715 struct dentry *debugfs_timings;
716#endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
717};
718
719#define VCPU_FPR(vcpu, i) (vcpu)->arch.fp.fpr[i][TS_FPROFFSET]
720
721/* Values for vcpu->arch.state */
722#define KVMPPC_VCPU_NOTREADY 0
723#define KVMPPC_VCPU_RUNNABLE 1
724#define KVMPPC_VCPU_BUSY_IN_HOST 2
725
726/* Values for vcpu->arch.io_gpr */
727#define KVM_MMIO_REG_MASK 0x001f
728#define KVM_MMIO_REG_EXT_MASK 0xffe0
729#define KVM_MMIO_REG_GPR 0x0000
730#define KVM_MMIO_REG_FPR 0x0020
731#define KVM_MMIO_REG_QPR 0x0040
732#define KVM_MMIO_REG_FQPR 0x0060
733
734#define __KVM_HAVE_ARCH_WQP
735#define __KVM_HAVE_CREATE_DEVICE
736
737static inline void kvm_arch_hardware_disable(void) {}
738static inline void kvm_arch_hardware_unsetup(void) {}
739static inline void kvm_arch_sync_events(struct kvm *kvm) {}
740static inline void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots) {}
741static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {}
742static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
743static inline void kvm_arch_exit(void) {}
744static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {}
745static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {}
746static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
747
748#endif /* __POWERPC_KVM_HOST_H__ */