1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 * Arch specific extensions to struct device
 
 
 4 */
 5#ifndef _ASM_POWERPC_DEVICE_H
 6#define _ASM_POWERPC_DEVICE_H
 7
 
 8struct device_node;
 9#ifdef CONFIG_PPC64
10struct pci_dn;
11struct iommu_table;
12#endif
13
14/*
15 * Arch extensions to struct device.
16 *
17 * When adding fields, consider macio_add_one_device in
18 * drivers/macintosh/macio_asic.c
19 */
20struct dev_archdata {
 
 
 
21	/*
22	 * These two used to be a union. However, with the hybrid ops we need
23	 * both so here we store both a DMA offset for direct mappings and
24	 * an iommu_table for remapped DMA.
25	 */
26	dma_addr_t		dma_offset;
27
28#ifdef CONFIG_PPC64
29	struct iommu_table	*iommu_table_base;
30#endif
31
 
 
 
 
 
 
32#ifdef CONFIG_PPC64
33	struct pci_dn		*pci_data;
34#endif
35#ifdef CONFIG_EEH
36	struct eeh_dev		*edev;
37#endif
38#ifdef CONFIG_FAIL_IOMMU
39	int fail_iommu;
40#endif
41#ifdef CONFIG_CXL_BASE
42	struct cxl_context	*cxl_ctx;
43#endif
44#ifdef CONFIG_PCI_IOV
45	void *iov_data;
46#endif
47};
48
49struct pdev_archdata {
50	u64 dma_mask;
51	/*
52	 * Pointer to nvdimm_pmu structure, to handle the unregistering
53	 * of pmu device
54	 */
55	void *priv;
56};
 
 
57
58#endif /* _ASM_POWERPC_DEVICE_H */

 
 1/*
 2 * Arch specific extensions to struct device
 3 *
 4 * This file is released under the GPLv2
 5 */
 6#ifndef _ASM_POWERPC_DEVICE_H
 7#define _ASM_POWERPC_DEVICE_H
 8
 9struct dma_map_ops;
10struct device_node;
11#ifdef CONFIG_PPC64
12struct pci_dn;
13struct iommu_table;
14#endif
15
16/*
17 * Arch extensions to struct device.
18 *
19 * When adding fields, consider macio_add_one_device in
20 * drivers/macintosh/macio_asic.c
21 */
22struct dev_archdata {
23	/* DMA operations on that device */
24	struct dma_map_ops	*dma_ops;
25
26	/*
27	 * These two used to be a union. However, with the hybrid ops we need
28	 * both so here we store both a DMA offset for direct mappings and
29	 * an iommu_table for remapped DMA.
30	 */
31	dma_addr_t		dma_offset;
32
33#ifdef CONFIG_PPC64
34	struct iommu_table	*iommu_table_base;
35#endif
36
37#ifdef CONFIG_IOMMU_API
38	void			*iommu_domain;
39#endif
40#ifdef CONFIG_SWIOTLB
41	dma_addr_t		max_direct_dma_addr;
42#endif
43#ifdef CONFIG_PPC64
44	struct pci_dn		*pci_data;
45#endif
46#ifdef CONFIG_EEH
47	struct eeh_dev		*edev;
48#endif
49#ifdef CONFIG_FAIL_IOMMU
50	int fail_iommu;
51#endif
52#ifdef CONFIG_CXL_BASE
53	struct cxl_context	*cxl_ctx;
54#endif
 
 
 
55};
56
57struct pdev_archdata {
58	u64 dma_mask;
 
 
 
 
 
59};
60
61#define ARCH_HAS_DMA_GET_REQUIRED_MASK
62
63#endif /* _ASM_POWERPC_DEVICE_H */