Loading...
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2016 Marvell Technology Group Ltd.
4 *
5 * Device Tree file for Marvell Armada AP806.
6 */
7
8#include "armada-ap806.dtsi"
9
10/ {
11 model = "Marvell Armada AP806 Dual";
12 compatible = "marvell,armada-ap806-dual", "marvell,armada-ap806";
13
14 cpus {
15 #address-cells = <1>;
16 #size-cells = <0>;
17
18 cpu0: cpu@0 {
19 device_type = "cpu";
20 compatible = "arm,cortex-a72";
21 reg = <0x000>;
22 enable-method = "psci";
23 #cooling-cells = <2>;
24 clocks = <&cpu_clk 0>;
25 i-cache-size = <0xc000>;
26 i-cache-line-size = <64>;
27 i-cache-sets = <256>;
28 d-cache-size = <0x8000>;
29 d-cache-line-size = <64>;
30 d-cache-sets = <256>;
31 next-level-cache = <&l2>;
32 };
33 cpu1: cpu@1 {
34 device_type = "cpu";
35 compatible = "arm,cortex-a72";
36 reg = <0x001>;
37 enable-method = "psci";
38 #cooling-cells = <2>;
39 clocks = <&cpu_clk 0>;
40 i-cache-size = <0xc000>;
41 i-cache-line-size = <64>;
42 i-cache-sets = <256>;
43 d-cache-size = <0x8000>;
44 d-cache-line-size = <64>;
45 d-cache-sets = <256>;
46 next-level-cache = <&l2>;
47 };
48
49 l2: l2-cache {
50 compatible = "cache";
51 cache-size = <0x80000>;
52 cache-line-size = <64>;
53 cache-sets = <512>;
54 cache-level = <2>;
55 cache-unified;
56 };
57 };
58
59 thermal-zones {
60 /delete-node/ ap-thermal-cpu2;
61 /delete-node/ ap-thermal-cpu3;
62 };
63};
1/*
2 * Copyright (C) 2016 Marvell Technology Group Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/*
44 * Device Tree file for Marvell Armada AP806.
45 */
46
47#include "armada-ap806.dtsi"
48
49/ {
50 model = "Marvell Armada AP806 Dual";
51 compatible = "marvell,armada-ap806-dual", "marvell,armada-ap806";
52
53 cpus {
54 #address-cells = <1>;
55 #size-cells = <0>;
56
57 cpu@000 {
58 device_type = "cpu";
59 compatible = "arm,cortex-a72", "arm,armv8";
60 reg = <0x000>;
61 enable-method = "psci";
62 };
63 cpu@001 {
64 device_type = "cpu";
65 compatible = "arm,cortex-a72", "arm,armv8";
66 reg = <0x001>;
67 enable-method = "psci";
68 };
69 };
70};