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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * mpc8xxx_wdt.c - MPC8xx/MPC83xx/MPC86xx watchdog userspace interface
4 *
5 * Authors: Dave Updegraff <dave@cray.org>
6 * Kumar Gala <galak@kernel.crashing.org>
7 * Attribution: from 83xx_wst: Florian Schirmer <jolt@tuxbox.org>
8 * ..and from sc520_wdt
9 * Copyright (c) 2008 MontaVista Software, Inc.
10 * Anton Vorontsov <avorontsov@ru.mvista.com>
11 *
12 * Note: it appears that you can only actually ENABLE or DISABLE the thing
13 * once after POR. Once enabled, you cannot disable, and vice versa.
14 */
15
16#include <linux/fs.h>
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/of.h>
20#include <linux/platform_device.h>
21#include <linux/module.h>
22#include <linux/watchdog.h>
23#include <linux/io.h>
24#include <linux/uaccess.h>
25#include <sysdev/fsl_soc.h>
26
27#define WATCHDOG_TIMEOUT 10
28
29struct mpc8xxx_wdt {
30 __be32 res0;
31 __be32 swcrr; /* System watchdog control register */
32#define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count. */
33#define SWCRR_SWF 0x00000008 /* Software Watchdog Freeze (mpc8xx). */
34#define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit. */
35#define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/
36#define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit. */
37 __be32 swcnr; /* System watchdog count register */
38 u8 res1[2];
39 __be16 swsrr; /* System watchdog service register */
40 u8 res2[0xF0];
41};
42
43struct mpc8xxx_wdt_type {
44 int prescaler;
45 bool hw_enabled;
46 u32 rsr_mask;
47};
48
49struct mpc8xxx_wdt_ddata {
50 struct mpc8xxx_wdt __iomem *base;
51 struct watchdog_device wdd;
52 spinlock_t lock;
53 u16 swtc;
54};
55
56static u16 timeout;
57module_param(timeout, ushort, 0);
58MODULE_PARM_DESC(timeout,
59 "Watchdog timeout in seconds. (1<timeout<65535, default="
60 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
61
62static bool reset = 1;
63module_param(reset, bool, 0);
64MODULE_PARM_DESC(reset,
65 "Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset");
66
67static bool nowayout = WATCHDOG_NOWAYOUT;
68module_param(nowayout, bool, 0);
69MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
70 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
71
72static void mpc8xxx_wdt_keepalive(struct mpc8xxx_wdt_ddata *ddata)
73{
74 /* Ping the WDT */
75 spin_lock(&ddata->lock);
76 out_be16(&ddata->base->swsrr, 0x556c);
77 out_be16(&ddata->base->swsrr, 0xaa39);
78 spin_unlock(&ddata->lock);
79}
80
81static int mpc8xxx_wdt_start(struct watchdog_device *w)
82{
83 struct mpc8xxx_wdt_ddata *ddata =
84 container_of(w, struct mpc8xxx_wdt_ddata, wdd);
85 u32 tmp = in_be32(&ddata->base->swcrr);
86
87 /* Good, fire up the show */
88 tmp &= ~(SWCRR_SWTC | SWCRR_SWF | SWCRR_SWEN | SWCRR_SWRI | SWCRR_SWPR);
89 tmp |= SWCRR_SWEN | SWCRR_SWPR | (ddata->swtc << 16);
90
91 if (reset)
92 tmp |= SWCRR_SWRI;
93
94 out_be32(&ddata->base->swcrr, tmp);
95
96 tmp = in_be32(&ddata->base->swcrr);
97 if (!(tmp & SWCRR_SWEN))
98 return -EOPNOTSUPP;
99
100 ddata->swtc = tmp >> 16;
101 set_bit(WDOG_HW_RUNNING, &ddata->wdd.status);
102
103 return 0;
104}
105
106static int mpc8xxx_wdt_ping(struct watchdog_device *w)
107{
108 struct mpc8xxx_wdt_ddata *ddata =
109 container_of(w, struct mpc8xxx_wdt_ddata, wdd);
110
111 mpc8xxx_wdt_keepalive(ddata);
112 return 0;
113}
114
115static struct watchdog_info mpc8xxx_wdt_info = {
116 .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT,
117 .firmware_version = 1,
118 .identity = "MPC8xxx",
119};
120
121static const struct watchdog_ops mpc8xxx_wdt_ops = {
122 .owner = THIS_MODULE,
123 .start = mpc8xxx_wdt_start,
124 .ping = mpc8xxx_wdt_ping,
125};
126
127static int mpc8xxx_wdt_probe(struct platform_device *ofdev)
128{
129 int ret;
130 struct resource *res;
131 const struct mpc8xxx_wdt_type *wdt_type;
132 struct mpc8xxx_wdt_ddata *ddata;
133 u32 freq = fsl_get_sys_freq();
134 bool enabled;
135 struct device *dev = &ofdev->dev;
136
137 wdt_type = of_device_get_match_data(dev);
138 if (!wdt_type)
139 return -EINVAL;
140
141 if (!freq || freq == -1)
142 return -EINVAL;
143
144 ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
145 if (!ddata)
146 return -ENOMEM;
147
148 ddata->base = devm_platform_ioremap_resource(ofdev, 0);
149 if (IS_ERR(ddata->base))
150 return PTR_ERR(ddata->base);
151
152 enabled = in_be32(&ddata->base->swcrr) & SWCRR_SWEN;
153 if (!enabled && wdt_type->hw_enabled) {
154 dev_info(dev, "could not be enabled in software\n");
155 return -ENODEV;
156 }
157
158 res = platform_get_resource(ofdev, IORESOURCE_MEM, 1);
159 if (res) {
160 bool status;
161 u32 __iomem *rsr = ioremap(res->start, resource_size(res));
162
163 if (!rsr)
164 return -ENOMEM;
165
166 status = in_be32(rsr) & wdt_type->rsr_mask;
167 ddata->wdd.bootstatus = status ? WDIOF_CARDRESET : 0;
168 /* clear reset status bits related to watchdog timer */
169 out_be32(rsr, wdt_type->rsr_mask);
170 iounmap(rsr);
171
172 dev_info(dev, "Last boot was %scaused by watchdog\n",
173 status ? "" : "not ");
174 }
175
176 spin_lock_init(&ddata->lock);
177
178 ddata->wdd.info = &mpc8xxx_wdt_info;
179 ddata->wdd.ops = &mpc8xxx_wdt_ops;
180
181 ddata->wdd.timeout = WATCHDOG_TIMEOUT;
182 watchdog_init_timeout(&ddata->wdd, timeout, dev);
183
184 watchdog_set_nowayout(&ddata->wdd, nowayout);
185
186 ddata->swtc = min(ddata->wdd.timeout * freq / wdt_type->prescaler,
187 0xffffU);
188
189 /*
190 * If the watchdog was previously enabled or we're running on
191 * MPC8xxx, we should ping the wdt from the kernel until the
192 * userspace handles it.
193 */
194 if (enabled)
195 mpc8xxx_wdt_start(&ddata->wdd);
196
197 ddata->wdd.max_hw_heartbeat_ms = (ddata->swtc * wdt_type->prescaler) /
198 (freq / 1000);
199 ddata->wdd.min_timeout = ddata->wdd.max_hw_heartbeat_ms / 1000;
200 if (ddata->wdd.timeout < ddata->wdd.min_timeout)
201 ddata->wdd.timeout = ddata->wdd.min_timeout;
202
203 ret = devm_watchdog_register_device(dev, &ddata->wdd);
204 if (ret)
205 return ret;
206
207 dev_info(dev,
208 "WDT driver for MPC8xxx initialized. mode:%s timeout=%d sec\n",
209 reset ? "reset" : "interrupt", ddata->wdd.timeout);
210
211 platform_set_drvdata(ofdev, ddata);
212 return 0;
213}
214
215static const struct of_device_id mpc8xxx_wdt_match[] = {
216 {
217 .compatible = "mpc83xx_wdt",
218 .data = &(struct mpc8xxx_wdt_type) {
219 .prescaler = 0x10000,
220 .rsr_mask = BIT(3), /* RSR Bit SWRS */
221 },
222 },
223 {
224 .compatible = "fsl,mpc8610-wdt",
225 .data = &(struct mpc8xxx_wdt_type) {
226 .prescaler = 0x10000,
227 .hw_enabled = true,
228 .rsr_mask = BIT(20), /* RSTRSCR Bit WDT_RR */
229 },
230 },
231 {
232 .compatible = "fsl,mpc823-wdt",
233 .data = &(struct mpc8xxx_wdt_type) {
234 .prescaler = 0x800,
235 .hw_enabled = true,
236 .rsr_mask = BIT(28), /* RSR Bit SWRS */
237 },
238 },
239 {},
240};
241MODULE_DEVICE_TABLE(of, mpc8xxx_wdt_match);
242
243static struct platform_driver mpc8xxx_wdt_driver = {
244 .probe = mpc8xxx_wdt_probe,
245 .driver = {
246 .name = "mpc8xxx_wdt",
247 .of_match_table = mpc8xxx_wdt_match,
248 },
249};
250
251static int __init mpc8xxx_wdt_init(void)
252{
253 return platform_driver_register(&mpc8xxx_wdt_driver);
254}
255arch_initcall(mpc8xxx_wdt_init);
256
257static void __exit mpc8xxx_wdt_exit(void)
258{
259 platform_driver_unregister(&mpc8xxx_wdt_driver);
260}
261module_exit(mpc8xxx_wdt_exit);
262
263MODULE_AUTHOR("Dave Updegraff, Kumar Gala");
264MODULE_DESCRIPTION("Driver for watchdog timer in MPC8xx/MPC83xx/MPC86xx "
265 "uProcessors");
266MODULE_LICENSE("GPL");
1/*
2 * mpc8xxx_wdt.c - MPC8xx/MPC83xx/MPC86xx watchdog userspace interface
3 *
4 * Authors: Dave Updegraff <dave@cray.org>
5 * Kumar Gala <galak@kernel.crashing.org>
6 * Attribution: from 83xx_wst: Florian Schirmer <jolt@tuxbox.org>
7 * ..and from sc520_wdt
8 * Copyright (c) 2008 MontaVista Software, Inc.
9 * Anton Vorontsov <avorontsov@ru.mvista.com>
10 *
11 * Note: it appears that you can only actually ENABLE or DISABLE the thing
12 * once after POR. Once enabled, you cannot disable, and vice versa.
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
18 */
19
20#include <linux/fs.h>
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <linux/timer.h>
24#include <linux/miscdevice.h>
25#include <linux/of_platform.h>
26#include <linux/module.h>
27#include <linux/watchdog.h>
28#include <linux/io.h>
29#include <linux/uaccess.h>
30#include <sysdev/fsl_soc.h>
31
32struct mpc8xxx_wdt {
33 __be32 res0;
34 __be32 swcrr; /* System watchdog control register */
35#define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count. */
36#define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit. */
37#define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/
38#define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit. */
39 __be32 swcnr; /* System watchdog count register */
40 u8 res1[2];
41 __be16 swsrr; /* System watchdog service register */
42 u8 res2[0xF0];
43};
44
45struct mpc8xxx_wdt_type {
46 int prescaler;
47 bool hw_enabled;
48};
49
50static struct mpc8xxx_wdt __iomem *wd_base;
51static int mpc8xxx_wdt_init_late(void);
52
53static u16 timeout = 0xffff;
54module_param(timeout, ushort, 0);
55MODULE_PARM_DESC(timeout,
56 "Watchdog timeout in ticks. (0<timeout<65536, default=65535)");
57
58static int reset = 1;
59module_param(reset, bool, 0);
60MODULE_PARM_DESC(reset,
61 "Watchdog Interrupt/Reset Mode. 0 = interrupt, 1 = reset");
62
63static int nowayout = WATCHDOG_NOWAYOUT;
64module_param(nowayout, int, 0);
65MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
66 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
67
68/*
69 * We always prescale, but if someone really doesn't want to they can set this
70 * to 0
71 */
72static int prescale = 1;
73static unsigned int timeout_sec;
74
75static unsigned long wdt_is_open;
76static DEFINE_SPINLOCK(wdt_spinlock);
77
78static void mpc8xxx_wdt_keepalive(void)
79{
80 /* Ping the WDT */
81 spin_lock(&wdt_spinlock);
82 out_be16(&wd_base->swsrr, 0x556c);
83 out_be16(&wd_base->swsrr, 0xaa39);
84 spin_unlock(&wdt_spinlock);
85}
86
87static void mpc8xxx_wdt_timer_ping(unsigned long arg);
88static DEFINE_TIMER(wdt_timer, mpc8xxx_wdt_timer_ping, 0, 0);
89
90static void mpc8xxx_wdt_timer_ping(unsigned long arg)
91{
92 mpc8xxx_wdt_keepalive();
93 /* We're pinging it twice faster than needed, just to be sure. */
94 mod_timer(&wdt_timer, jiffies + HZ * timeout_sec / 2);
95}
96
97static void mpc8xxx_wdt_pr_warn(const char *msg)
98{
99 pr_crit("mpc8xxx_wdt: %s, expect the %s soon!\n", msg,
100 reset ? "reset" : "machine check exception");
101}
102
103static ssize_t mpc8xxx_wdt_write(struct file *file, const char __user *buf,
104 size_t count, loff_t *ppos)
105{
106 if (count)
107 mpc8xxx_wdt_keepalive();
108 return count;
109}
110
111static int mpc8xxx_wdt_open(struct inode *inode, struct file *file)
112{
113 u32 tmp = SWCRR_SWEN;
114 if (test_and_set_bit(0, &wdt_is_open))
115 return -EBUSY;
116
117 /* Once we start the watchdog we can't stop it */
118 if (nowayout)
119 __module_get(THIS_MODULE);
120
121 /* Good, fire up the show */
122 if (prescale)
123 tmp |= SWCRR_SWPR;
124 if (reset)
125 tmp |= SWCRR_SWRI;
126
127 tmp |= timeout << 16;
128
129 out_be32(&wd_base->swcrr, tmp);
130
131 del_timer_sync(&wdt_timer);
132
133 return nonseekable_open(inode, file);
134}
135
136static int mpc8xxx_wdt_release(struct inode *inode, struct file *file)
137{
138 if (!nowayout)
139 mpc8xxx_wdt_timer_ping(0);
140 else
141 mpc8xxx_wdt_pr_warn("watchdog closed");
142 clear_bit(0, &wdt_is_open);
143 return 0;
144}
145
146static long mpc8xxx_wdt_ioctl(struct file *file, unsigned int cmd,
147 unsigned long arg)
148{
149 void __user *argp = (void __user *)arg;
150 int __user *p = argp;
151 static const struct watchdog_info ident = {
152 .options = WDIOF_KEEPALIVEPING,
153 .firmware_version = 1,
154 .identity = "MPC8xxx",
155 };
156
157 switch (cmd) {
158 case WDIOC_GETSUPPORT:
159 return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
160 case WDIOC_GETSTATUS:
161 case WDIOC_GETBOOTSTATUS:
162 return put_user(0, p);
163 case WDIOC_KEEPALIVE:
164 mpc8xxx_wdt_keepalive();
165 return 0;
166 case WDIOC_GETTIMEOUT:
167 return put_user(timeout_sec, p);
168 default:
169 return -ENOTTY;
170 }
171}
172
173static const struct file_operations mpc8xxx_wdt_fops = {
174 .owner = THIS_MODULE,
175 .llseek = no_llseek,
176 .write = mpc8xxx_wdt_write,
177 .unlocked_ioctl = mpc8xxx_wdt_ioctl,
178 .open = mpc8xxx_wdt_open,
179 .release = mpc8xxx_wdt_release,
180};
181
182static struct miscdevice mpc8xxx_wdt_miscdev = {
183 .minor = WATCHDOG_MINOR,
184 .name = "watchdog",
185 .fops = &mpc8xxx_wdt_fops,
186};
187
188static const struct of_device_id mpc8xxx_wdt_match[];
189static int __devinit mpc8xxx_wdt_probe(struct platform_device *ofdev)
190{
191 int ret;
192 const struct of_device_id *match;
193 struct device_node *np = ofdev->dev.of_node;
194 struct mpc8xxx_wdt_type *wdt_type;
195 u32 freq = fsl_get_sys_freq();
196 bool enabled;
197
198 match = of_match_device(mpc8xxx_wdt_match, &ofdev->dev);
199 if (!match)
200 return -EINVAL;
201 wdt_type = match->data;
202
203 if (!freq || freq == -1)
204 return -EINVAL;
205
206 wd_base = of_iomap(np, 0);
207 if (!wd_base)
208 return -ENOMEM;
209
210 enabled = in_be32(&wd_base->swcrr) & SWCRR_SWEN;
211 if (!enabled && wdt_type->hw_enabled) {
212 pr_info("mpc8xxx_wdt: could not be enabled in software\n");
213 ret = -ENOSYS;
214 goto err_unmap;
215 }
216
217 /* Calculate the timeout in seconds */
218 if (prescale)
219 timeout_sec = (timeout * wdt_type->prescaler) / freq;
220 else
221 timeout_sec = timeout / freq;
222
223#ifdef MODULE
224 ret = mpc8xxx_wdt_init_late();
225 if (ret)
226 goto err_unmap;
227#endif
228
229 pr_info("WDT driver for MPC8xxx initialized. mode:%s timeout=%d "
230 "(%d seconds)\n", reset ? "reset" : "interrupt", timeout,
231 timeout_sec);
232
233 /*
234 * If the watchdog was previously enabled or we're running on
235 * MPC8xxx, we should ping the wdt from the kernel until the
236 * userspace handles it.
237 */
238 if (enabled)
239 mpc8xxx_wdt_timer_ping(0);
240 return 0;
241err_unmap:
242 iounmap(wd_base);
243 wd_base = NULL;
244 return ret;
245}
246
247static int __devexit mpc8xxx_wdt_remove(struct platform_device *ofdev)
248{
249 mpc8xxx_wdt_pr_warn("watchdog removed");
250 del_timer_sync(&wdt_timer);
251 misc_deregister(&mpc8xxx_wdt_miscdev);
252 iounmap(wd_base);
253
254 return 0;
255}
256
257static const struct of_device_id mpc8xxx_wdt_match[] = {
258 {
259 .compatible = "mpc83xx_wdt",
260 .data = &(struct mpc8xxx_wdt_type) {
261 .prescaler = 0x10000,
262 },
263 },
264 {
265 .compatible = "fsl,mpc8610-wdt",
266 .data = &(struct mpc8xxx_wdt_type) {
267 .prescaler = 0x10000,
268 .hw_enabled = true,
269 },
270 },
271 {
272 .compatible = "fsl,mpc823-wdt",
273 .data = &(struct mpc8xxx_wdt_type) {
274 .prescaler = 0x800,
275 },
276 },
277 {},
278};
279MODULE_DEVICE_TABLE(of, mpc8xxx_wdt_match);
280
281static struct platform_driver mpc8xxx_wdt_driver = {
282 .probe = mpc8xxx_wdt_probe,
283 .remove = __devexit_p(mpc8xxx_wdt_remove),
284 .driver = {
285 .name = "mpc8xxx_wdt",
286 .owner = THIS_MODULE,
287 .of_match_table = mpc8xxx_wdt_match,
288 },
289};
290
291/*
292 * We do wdt initialization in two steps: arch_initcall probes the wdt
293 * very early to start pinging the watchdog (misc devices are not yet
294 * available), and later module_init() just registers the misc device.
295 */
296static int mpc8xxx_wdt_init_late(void)
297{
298 int ret;
299
300 if (!wd_base)
301 return -ENODEV;
302
303 ret = misc_register(&mpc8xxx_wdt_miscdev);
304 if (ret) {
305 pr_err("cannot register miscdev on minor=%d (err=%d)\n",
306 WATCHDOG_MINOR, ret);
307 return ret;
308 }
309 return 0;
310}
311#ifndef MODULE
312module_init(mpc8xxx_wdt_init_late);
313#endif
314
315static int __init mpc8xxx_wdt_init(void)
316{
317 return platform_driver_register(&mpc8xxx_wdt_driver);
318}
319arch_initcall(mpc8xxx_wdt_init);
320
321static void __exit mpc8xxx_wdt_exit(void)
322{
323 platform_driver_unregister(&mpc8xxx_wdt_driver);
324}
325module_exit(mpc8xxx_wdt_exit);
326
327MODULE_AUTHOR("Dave Updegraff, Kumar Gala");
328MODULE_DESCRIPTION("Driver for watchdog timer in MPC8xx/MPC83xx/MPC86xx "
329 "uProcessors");
330MODULE_LICENSE("GPL");
331MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);