1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 *  linux/arch/arm/mach-pxa/generic.c
  4 *
  5 *  Author:	Nicolas Pitre
  6 *  Created:	Jun 15, 2001
  7 *  Copyright:	MontaVista Software Inc.
  8 *
  9 * Code common to all PXA machines.
 10 *
 
 
 
 
 11 * Since this file should be linked before any other machine specific file,
 12 * the __initcall() here will be executed first.  This serves as default
 13 * initialization stuff for PXA machines which can be overridden later if
 14 * need be.
 15 */
 16#include <linux/gpio.h>
 17#include <linux/module.h>
 18#include <linux/kernel.h>
 19#include <linux/init.h>
 20#include <linux/soc/pxa/cpu.h>
 21#include <linux/soc/pxa/smemc.h>
 22#include <linux/clk/pxa.h>
 23
 
 
 24#include <asm/mach/map.h>
 25#include <asm/mach-types.h>
 26
 27#include "addr-map.h"
 28#include "irqs.h"
 29#include "reset.h"
 30#include "smemc.h"
 31#include "pxa3xx-regs.h"
 32
 33#include "generic.h"
 34#include <clocksource/pxa.h>
 35
 36void clear_reset_status(unsigned int mask)
 37{
 38	if (cpu_is_pxa2xx())
 39		pxa2xx_clear_reset_status(mask);
 40	else {
 41		/* RESET_STATUS_* has a 1:1 mapping with ARSR */
 42		ARSR = mask;
 43	}
 44}
 45
 46/*
 47 * For non device-tree builds, keep legacy timer init
 48 */
 49void __init pxa_timer_init(void)
 50{
 51	if (cpu_is_pxa25x())
 52		pxa25x_clocks_init(io_p2v(0x41300000));
 53	if (cpu_is_pxa27x())
 54		pxa27x_clocks_init(io_p2v(0x41300000));
 55	if (cpu_is_pxa3xx())
 56		pxa3xx_clocks_init(io_p2v(0x41340000), io_p2v(0x41350000));
 57	pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000));
 58}
 59
 60void pxa_smemc_set_pcmcia_timing(int sock, u32 mcmem, u32 mcatt, u32 mcio)
 61{
 62	__raw_writel(mcmem, MCMEM(sock));
 63	__raw_writel(mcatt, MCATT(sock));
 64	__raw_writel(mcio, MCIO(sock));
 65}
 66EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_timing);
 67
 68void pxa_smemc_set_pcmcia_socket(int nr)
 69{
 70	switch (nr) {
 71	case 0:
 72		__raw_writel(0, MECR);
 73		break;
 74	case 1:
 75		/*
 76		 * We have at least one socket, so set MECR:CIT
 77		 * (Card Is There)
 78		 */
 79		__raw_writel(MECR_CIT, MECR);
 80		break;
 81	case 2:
 82		/* Set CIT and MECR:NOS (Number Of Sockets) */
 83		__raw_writel(MECR_CIT | MECR_NOS, MECR);
 84		break;
 85	}
 86}
 87EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_socket);
 88
 89void __iomem *pxa_smemc_get_mdrefr(void)
 
 
 
 
 
 90{
 91	return MDREFR;
 
 
 
 
 92}
 
 93
 94/*
 95 * Intel PXA2xx internal register mapping.
 96 *
 97 * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
 98 *       and cache flush area.
 99 */
100static struct map_desc common_io_desc[] __initdata = {
101  	{	/* Devs */
102		.virtual	= (unsigned long)PERIPH_VIRT,
103		.pfn		= __phys_to_pfn(PERIPH_PHYS),
104		.length		= PERIPH_SIZE,
 
 
 
 
 
105		.type		= MT_DEVICE
106	}
107};
108
109void __init pxa_map_io(void)
110{
111	debug_ll_io_init();
112	iotable_init(ARRAY_AND_SIZE(common_io_desc));
113}

 
 1/*
 2 *  linux/arch/arm/mach-pxa/generic.c
 3 *
 4 *  Author:	Nicolas Pitre
 5 *  Created:	Jun 15, 2001
 6 *  Copyright:	MontaVista Software Inc.
 7 *
 8 * Code common to all PXA machines.
 9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * Since this file should be linked before any other machine specific file,
15 * the __initcall() here will be executed first.  This serves as default
16 * initialization stuff for PXA machines which can be overridden later if
17 * need be.
18 */
 
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/init.h>
 
 
 
22
23#include <mach/hardware.h>
24#include <asm/system.h>
25#include <asm/mach/map.h>
26#include <asm/mach-types.h>
27
28#include <mach/reset.h>
29#include <mach/gpio.h>
30#include <mach/smemc.h>
31#include <mach/pxa3xx-regs.h>
 
32
33#include "generic.h"
 
34
35void clear_reset_status(unsigned int mask)
36{
37	if (cpu_is_pxa2xx())
38		pxa2xx_clear_reset_status(mask);
39	else {
40		/* RESET_STATUS_* has a 1:1 mapping with ARSR */
41		ARSR = mask;
42	}
43}
44
45unsigned long get_clock_tick_rate(void)
 
 
 
46{
47	unsigned long clock_tick_rate;
 
 
 
 
 
 
 
48
49	if (cpu_is_pxa25x())
50		clock_tick_rate = 3686400;
51	else if (machine_is_mainstone())
52		clock_tick_rate = 3249600;
53	else
54		clock_tick_rate = 3250000;
 
55
56	return clock_tick_rate;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
57}
58EXPORT_SYMBOL(get_clock_tick_rate);
59
60/*
61 * Get the clock frequency as reflected by CCCR and the turbo flag.
62 * We assume these values have been applied via a fcs.
63 * If info is not 0 we also display the current settings.
64 */
65unsigned int get_clk_frequency_khz(int info)
66{
67	if (cpu_is_pxa25x())
68		return pxa25x_get_clk_frequency_khz(info);
69	else if (cpu_is_pxa27x())
70		return pxa27x_get_clk_frequency_khz(info);
71	return 0;
72}
73EXPORT_SYMBOL(get_clk_frequency_khz);
74
75/*
76 * Intel PXA2xx internal register mapping.
77 *
78 * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
79 *       and cache flush area.
80 */
81static struct map_desc common_io_desc[] __initdata = {
82  	{	/* Devs */
83		.virtual	=  0xf2000000,
84		.pfn		= __phys_to_pfn(0x40000000),
85		.length		= 0x02000000,
86		.type		= MT_DEVICE
87	}, {	/* UNCACHED_PHYS_0 */
88		.virtual	= 0xff000000,
89		.pfn		= __phys_to_pfn(0x00000000),
90		.length		= 0x00100000,
91		.type		= MT_DEVICE
92	}
93};
94
95void __init pxa_map_io(void)
96{
 
97	iotable_init(ARRAY_AND_SIZE(common_io_desc));
98}