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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 | /* SPDX-License-Identifier: GPL-2.0 */ /* *Copyright (C) 2022-2023 Linaro Ltd. */ #ifndef _REG_H_ #define _REG_H_ #include <linux/types.h> #include <linux/log2.h> #include <linux/bug.h> /** * struct reg - A register descriptor * @offset: Register offset relative to base of register memory * @stride: Distance between two instances, if parameterized * @fcount: Number of entries in the @fmask array * @fmask: Array of mask values defining position and width of fields * @name: Upper-case name of the register */ struct reg { u32 offset; u32 stride; u32 fcount; const u32 *fmask; /* BIT(nr) or GENMASK(h, l) */ const char *name; }; /* Helper macro for defining "simple" (non-parameterized) registers */ #define REG(__NAME, __reg_id, __offset) \ REG_STRIDE(__NAME, __reg_id, __offset, 0) /* Helper macro for defining parameterized registers, specifying stride */ #define REG_STRIDE(__NAME, __reg_id, __offset, __stride) \ static const struct reg reg_ ## __reg_id = { \ .name = #__NAME, \ .offset = __offset, \ .stride = __stride, \ } #define REG_FIELDS(__NAME, __name, __offset) \ REG_STRIDE_FIELDS(__NAME, __name, __offset, 0) #define REG_STRIDE_FIELDS(__NAME, __name, __offset, __stride) \ static const struct reg reg_ ## __name = { \ .name = #__NAME, \ .offset = __offset, \ .stride = __stride, \ .fcount = ARRAY_SIZE(reg_ ## __name ## _fmask), \ .fmask = reg_ ## __name ## _fmask, \ } /** * struct regs - Description of registers supported by hardware * @reg_count: Number of registers in the @reg[] array * @reg: Array of register descriptors */ struct regs { u32 reg_count; const struct reg **reg; }; static inline const struct reg *reg(const struct regs *regs, u32 reg_id) { if (WARN(reg_id >= regs->reg_count, "reg out of range (%u > %u)\n", reg_id, regs->reg_count - 1)) return NULL; return regs->reg[reg_id]; } /* Return the field mask for a field in a register, or 0 on error */ static inline u32 reg_fmask(const struct reg *reg, u32 field_id) { if (!reg || WARN_ON(field_id >= reg->fcount)) return 0; return reg->fmask[field_id]; } /* Return the mask for a single-bit field in a register, or 0 on error */ static inline u32 reg_bit(const struct reg *reg, u32 field_id) { u32 fmask = reg_fmask(reg, field_id); if (WARN_ON(!is_power_of_2(fmask))) return 0; return fmask; } /* Return the maximum value representable by the given field; always 2^n - 1 */ static inline u32 reg_field_max(const struct reg *reg, u32 field_id) { u32 fmask = reg_fmask(reg, field_id); return fmask ? fmask >> __ffs(fmask) : 0; } /* Encode a value into the given field of a register */ static inline u32 reg_encode(const struct reg *reg, u32 field_id, u32 val) { u32 fmask = reg_fmask(reg, field_id); if (!fmask) return 0; val <<= __ffs(fmask); if (WARN_ON(val & ~fmask)) return 0; return val; } /* Given a register value, decode (extract) the value in the given field */ static inline u32 reg_decode(const struct reg *reg, u32 field_id, u32 val) { u32 fmask = reg_fmask(reg, field_id); return fmask ? (val & fmask) >> __ffs(fmask) : 0; } /* Returns 0 for NULL reg; warning should have already been issued */ static inline u32 reg_offset(const struct reg *reg) { return reg ? reg->offset : 0; } /* Returns 0 for NULL reg; warning should have already been issued */ static inline u32 reg_n_offset(const struct reg *reg, u32 n) { return reg ? reg->offset + n * reg->stride : 0; } #endif /* _REG_H_ */ |