1/* SPDX-License-Identifier: GPL-2.0-only */
  2/* 10G controller driver for Samsung SoCs
  3 *
  4 * Copyright (C) 2013 Samsung Electronics Co., Ltd.
  5 *		http://www.samsung.com
  6 *
  7 * Author: Siva Reddy Kallam <siva.kallam@samsung.com>
  8 */
  9#ifndef __SXGBE_MTL_H__
 10#define __SXGBE_MTL_H__
 11
 12#define SXGBE_MTL_OPMODE_ESTMASK	0x3
 13#define SXGBE_MTL_OPMODE_RAAMASK	0x1
 14#define SXGBE_MTL_FCMASK		0x7
 15#define SXGBE_MTL_TX_FIFO_DIV		256
 16#define SXGBE_MTL_RX_FIFO_DIV		256
 17
 18#define SXGBE_MTL_RXQ_OP_FEP		BIT(4)
 19#define SXGBE_MTL_RXQ_OP_FUP		BIT(3)
 20#define SXGBE_MTL_ENABLE_FC		0x80
 21
 22#define ETS_WRR				0xFFFFFF9F
 23#define ETS_RST				0xFFFFFF9F
 24#define ETS_WFQ				0x00000020
 25#define ETS_DWRR			0x00000040
 26#define RAA_SP				0xFFFFFFFB
 27#define RAA_WSP				0x00000004
 28
 29#define RX_QUEUE_DYNAMIC		0x80808080
 30#define RX_FC_ACTIVE			8
 31#define RX_FC_DEACTIVE			13
 32
 33enum ttc_control {
 34	MTL_CONTROL_TTC_64 = 0x00000000,
 35	MTL_CONTROL_TTC_96 = 0x00000020,
 36	MTL_CONTROL_TTC_128 = 0x00000030,
 37	MTL_CONTROL_TTC_192 = 0x00000040,
 38	MTL_CONTROL_TTC_256 = 0x00000050,
 39	MTL_CONTROL_TTC_384 = 0x00000060,
 40	MTL_CONTROL_TTC_512 = 0x00000070,
 41};
 42
 43enum rtc_control {
 44	MTL_CONTROL_RTC_64 = 0x00000000,
 45	MTL_CONTROL_RTC_96 = 0x00000002,
 46	MTL_CONTROL_RTC_128 = 0x00000003,
 47};
 48
 49enum flow_control_th {
 50	MTL_FC_FULL_1K = 0x00000000,
 51	MTL_FC_FULL_2K = 0x00000001,
 52	MTL_FC_FULL_4K = 0x00000002,
 53	MTL_FC_FULL_5K = 0x00000003,
 54	MTL_FC_FULL_6K = 0x00000004,
 55	MTL_FC_FULL_8K = 0x00000005,
 56	MTL_FC_FULL_16K = 0x00000006,
 57	MTL_FC_FULL_24K = 0x00000007,
 58};
 59
 60struct sxgbe_mtl_ops {
 61	void (*mtl_init)(void __iomem *ioaddr, unsigned int etsalg,
 62			 unsigned int raa);
 63
 64	void (*mtl_set_txfifosize)(void __iomem *ioaddr, int queue_num,
 65				   int mtl_fifo);
 66
 67	void (*mtl_set_rxfifosize)(void __iomem *ioaddr, int queue_num,
 68				   int queue_fifo);
 69
 70	void (*mtl_enable_txqueue)(void __iomem *ioaddr, int queue_num);
 71
 72	void (*mtl_disable_txqueue)(void __iomem *ioaddr, int queue_num);
 73
 74	void (*set_tx_mtl_mode)(void __iomem *ioaddr, int queue_num,
 75				int tx_mode);
 76
 77	void (*set_rx_mtl_mode)(void __iomem *ioaddr, int queue_num,
 78				int rx_mode);
 79
 80	void (*mtl_dynamic_dma_rxqueue)(void __iomem *ioaddr);
 81
 82	void (*mtl_fc_active)(void __iomem *ioaddr, int queue_num,
 83			      int threshold);
 84
 85	void (*mtl_fc_deactive)(void __iomem *ioaddr, int queue_num,
 86				int threshold);
 87
 88	void (*mtl_fc_enable)(void __iomem *ioaddr, int queue_num);
 89
 90	void (*mtl_fep_enable)(void __iomem *ioaddr, int queue_num);
 91
 92	void (*mtl_fep_disable)(void __iomem *ioaddr, int queue_num);
 93
 94	void (*mtl_fup_enable)(void __iomem *ioaddr, int queue_num);
 95
 96	void (*mtl_fup_disable)(void __iomem *ioaddr, int queue_num);
 97};
 98
 99const struct sxgbe_mtl_ops *sxgbe_get_mtl_ops(void);
100
101#endif /* __SXGBE_MTL_H__ */