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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Thunderbolt driver - bus logic (NHI independent)
4 *
5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
6 * Copyright (C) 2018, Intel Corporation
7 */
8
9#ifndef TB_H_
10#define TB_H_
11
12#include <linux/nvmem-provider.h>
13#include <linux/pci.h>
14#include <linux/thunderbolt.h>
15#include <linux/uuid.h>
16#include <linux/bitfield.h>
17
18#include "tb_regs.h"
19#include "ctl.h"
20#include "dma_port.h"
21
22/* Keep link controller awake during update */
23#define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0)
24/* Disable CLx if not supported */
25#define QUIRK_NO_CLX BIT(1)
26
27/**
28 * struct tb_nvm - Structure holding NVM information
29 * @dev: Owner of the NVM
30 * @major: Major version number of the active NVM portion
31 * @minor: Minor version number of the active NVM portion
32 * @id: Identifier used with both NVM portions
33 * @active: Active portion NVMem device
34 * @active_size: Size in bytes of the active NVM
35 * @non_active: Non-active portion NVMem device
36 * @buf: Buffer where the NVM image is stored before it is written to
37 * the actual NVM flash device
38 * @buf_data_start: Where the actual image starts after skipping
39 * possible headers
40 * @buf_data_size: Number of bytes actually consumed by the new NVM
41 * image
42 * @authenticating: The device is authenticating the new NVM
43 * @flushed: The image has been flushed to the storage area
44 * @vops: Router vendor specific NVM operations (optional)
45 *
46 * The user of this structure needs to handle serialization of possible
47 * concurrent access.
48 */
49struct tb_nvm {
50 struct device *dev;
51 u32 major;
52 u32 minor;
53 int id;
54 struct nvmem_device *active;
55 size_t active_size;
56 struct nvmem_device *non_active;
57 void *buf;
58 void *buf_data_start;
59 size_t buf_data_size;
60 bool authenticating;
61 bool flushed;
62 const struct tb_nvm_vendor_ops *vops;
63};
64
65enum tb_nvm_write_ops {
66 WRITE_AND_AUTHENTICATE = 1,
67 WRITE_ONLY = 2,
68 AUTHENTICATE_ONLY = 3,
69};
70
71#define TB_SWITCH_KEY_SIZE 32
72#define TB_SWITCH_MAX_DEPTH 6
73#define USB4_SWITCH_MAX_DEPTH 5
74
75/**
76 * enum tb_switch_tmu_mode - TMU mode
77 * @TB_SWITCH_TMU_MODE_OFF: TMU is off
78 * @TB_SWITCH_TMU_MODE_LOWRES: Uni-directional, normal mode
79 * @TB_SWITCH_TMU_MODE_HIFI_UNI: Uni-directional, HiFi mode
80 * @TB_SWITCH_TMU_MODE_HIFI_BI: Bi-directional, HiFi mode
81 * @TB_SWITCH_TMU_MODE_MEDRES_ENHANCED_UNI: Enhanced Uni-directional, MedRes mode
82 *
83 * Ordering is based on TMU accuracy level (highest last).
84 */
85enum tb_switch_tmu_mode {
86 TB_SWITCH_TMU_MODE_OFF,
87 TB_SWITCH_TMU_MODE_LOWRES,
88 TB_SWITCH_TMU_MODE_HIFI_UNI,
89 TB_SWITCH_TMU_MODE_HIFI_BI,
90 TB_SWITCH_TMU_MODE_MEDRES_ENHANCED_UNI,
91};
92
93/**
94 * struct tb_switch_tmu - Structure holding router TMU configuration
95 * @cap: Offset to the TMU capability (%0 if not found)
96 * @has_ucap: Does the switch support uni-directional mode
97 * @mode: TMU mode related to the upstream router. Reflects the HW
98 * setting. Don't care for host router.
99 * @mode_request: TMU mode requested to set. Related to upstream router.
100 * Don't care for host router.
101 */
102struct tb_switch_tmu {
103 int cap;
104 bool has_ucap;
105 enum tb_switch_tmu_mode mode;
106 enum tb_switch_tmu_mode mode_request;
107};
108
109/**
110 * struct tb_switch - a thunderbolt switch
111 * @dev: Device for the switch
112 * @config: Switch configuration
113 * @ports: Ports in this switch
114 * @dma_port: If the switch has port supporting DMA configuration based
115 * mailbox this will hold the pointer to that (%NULL
116 * otherwise). If set it also means the switch has
117 * upgradeable NVM.
118 * @tmu: The switch TMU configuration
119 * @tb: Pointer to the domain the switch belongs to
120 * @uid: Unique ID of the switch
121 * @uuid: UUID of the switch (or %NULL if not supported)
122 * @vendor: Vendor ID of the switch
123 * @device: Device ID of the switch
124 * @vendor_name: Name of the vendor (or %NULL if not known)
125 * @device_name: Name of the device (or %NULL if not known)
126 * @link_speed: Speed of the link in Gb/s
127 * @link_width: Width of the upstream facing link
128 * @preferred_link_width: Router preferred link width (only set for Gen 4 links)
129 * @link_usb4: Upstream link is USB4
130 * @generation: Switch Thunderbolt generation
131 * @cap_plug_events: Offset to the plug events capability (%0 if not found)
132 * @cap_vsec_tmu: Offset to the TMU vendor specific capability (%0 if not found)
133 * @cap_lc: Offset to the link controller capability (%0 if not found)
134 * @cap_lp: Offset to the low power (CLx for TBT) capability (%0 if not found)
135 * @is_unplugged: The switch is going away
136 * @drom: DROM of the switch (%NULL if not found)
137 * @nvm: Pointer to the NVM if the switch has one (%NULL otherwise)
138 * @no_nvm_upgrade: Prevent NVM upgrade of this switch
139 * @safe_mode: The switch is in safe-mode
140 * @boot: Whether the switch was already authorized on boot or not
141 * @rpm: The switch supports runtime PM
142 * @authorized: Whether the switch is authorized by user or policy
143 * @security_level: Switch supported security level
144 * @debugfs_dir: Pointer to the debugfs structure
145 * @key: Contains the key used to challenge the device or %NULL if not
146 * supported. Size of the key is %TB_SWITCH_KEY_SIZE.
147 * @connection_id: Connection ID used with ICM messaging
148 * @connection_key: Connection key used with ICM messaging
149 * @link: Root switch link this switch is connected (ICM only)
150 * @depth: Depth in the chain this switch is connected (ICM only)
151 * @rpm_complete: Completion used to wait for runtime resume to
152 * complete (ICM only)
153 * @quirks: Quirks used for this Thunderbolt switch
154 * @credit_allocation: Are the below buffer allocation parameters valid
155 * @max_usb3_credits: Router preferred number of buffers for USB 3.x
156 * @min_dp_aux_credits: Router preferred minimum number of buffers for DP AUX
157 * @min_dp_main_credits: Router preferred minimum number of buffers for DP MAIN
158 * @max_pcie_credits: Router preferred number of buffers for PCIe
159 * @max_dma_credits: Router preferred number of buffers for DMA/P2P
160 * @clx: CLx states on the upstream link of the router
161 *
162 * When the switch is being added or removed to the domain (other
163 * switches) you need to have domain lock held.
164 *
165 * In USB4 terminology this structure represents a router.
166 */
167struct tb_switch {
168 struct device dev;
169 struct tb_regs_switch_header config;
170 struct tb_port *ports;
171 struct tb_dma_port *dma_port;
172 struct tb_switch_tmu tmu;
173 struct tb *tb;
174 u64 uid;
175 uuid_t *uuid;
176 u16 vendor;
177 u16 device;
178 const char *vendor_name;
179 const char *device_name;
180 unsigned int link_speed;
181 enum tb_link_width link_width;
182 enum tb_link_width preferred_link_width;
183 bool link_usb4;
184 unsigned int generation;
185 int cap_plug_events;
186 int cap_vsec_tmu;
187 int cap_lc;
188 int cap_lp;
189 bool is_unplugged;
190 u8 *drom;
191 struct tb_nvm *nvm;
192 bool no_nvm_upgrade;
193 bool safe_mode;
194 bool boot;
195 bool rpm;
196 unsigned int authorized;
197 enum tb_security_level security_level;
198 struct dentry *debugfs_dir;
199 u8 *key;
200 u8 connection_id;
201 u8 connection_key;
202 u8 link;
203 u8 depth;
204 struct completion rpm_complete;
205 unsigned long quirks;
206 bool credit_allocation;
207 unsigned int max_usb3_credits;
208 unsigned int min_dp_aux_credits;
209 unsigned int min_dp_main_credits;
210 unsigned int max_pcie_credits;
211 unsigned int max_dma_credits;
212 unsigned int clx;
213};
214
215/**
216 * struct tb_bandwidth_group - Bandwidth management group
217 * @tb: Pointer to the domain the group belongs to
218 * @index: Index of the group (aka Group_ID). Valid values %1-%7
219 * @ports: DP IN adapters belonging to this group are linked here
220 *
221 * Any tunnel that requires isochronous bandwidth (that's DP for now) is
222 * attached to a bandwidth group. All tunnels going through the same
223 * USB4 links share the same group and can dynamically distribute the
224 * bandwidth within the group.
225 */
226struct tb_bandwidth_group {
227 struct tb *tb;
228 int index;
229 struct list_head ports;
230};
231
232/**
233 * struct tb_port - a thunderbolt port, part of a tb_switch
234 * @config: Cached port configuration read from registers
235 * @sw: Switch the port belongs to
236 * @remote: Remote port (%NULL if not connected)
237 * @xdomain: Remote host (%NULL if not connected)
238 * @cap_phy: Offset, zero if not found
239 * @cap_tmu: Offset of the adapter specific TMU capability (%0 if not present)
240 * @cap_adap: Offset of the adapter specific capability (%0 if not present)
241 * @cap_usb4: Offset to the USB4 port capability (%0 if not present)
242 * @usb4: Pointer to the USB4 port structure (only if @cap_usb4 is != %0)
243 * @port: Port number on switch
244 * @disabled: Disabled by eeprom or enabled but not implemented
245 * @bonded: true if the port is bonded (two lanes combined as one)
246 * @dual_link_port: If the switch is connected using two ports, points
247 * to the other port.
248 * @link_nr: Is this primary or secondary port on the dual_link.
249 * @in_hopids: Currently allocated input HopIDs
250 * @out_hopids: Currently allocated output HopIDs
251 * @list: Used to link ports to DP resources list
252 * @total_credits: Total number of buffers available for this port
253 * @ctl_credits: Buffers reserved for control path
254 * @dma_credits: Number of credits allocated for DMA tunneling for all
255 * DMA paths through this port.
256 * @group: Bandwidth allocation group the adapter is assigned to. Only
257 * used for DP IN adapters for now.
258 * @group_list: The adapter is linked to the group's list of ports through this
259 * @max_bw: Maximum possible bandwidth through this adapter if set to
260 * non-zero.
261 *
262 * In USB4 terminology this structure represents an adapter (protocol or
263 * lane adapter).
264 */
265struct tb_port {
266 struct tb_regs_port_header config;
267 struct tb_switch *sw;
268 struct tb_port *remote;
269 struct tb_xdomain *xdomain;
270 int cap_phy;
271 int cap_tmu;
272 int cap_adap;
273 int cap_usb4;
274 struct usb4_port *usb4;
275 u8 port;
276 bool disabled;
277 bool bonded;
278 struct tb_port *dual_link_port;
279 u8 link_nr:1;
280 struct ida in_hopids;
281 struct ida out_hopids;
282 struct list_head list;
283 unsigned int total_credits;
284 unsigned int ctl_credits;
285 unsigned int dma_credits;
286 struct tb_bandwidth_group *group;
287 struct list_head group_list;
288 unsigned int max_bw;
289};
290
291/**
292 * struct usb4_port - USB4 port device
293 * @dev: Device for the port
294 * @port: Pointer to the lane 0 adapter
295 * @can_offline: Does the port have necessary platform support to moved
296 * it into offline mode and back
297 * @offline: The port is currently in offline mode
298 * @margining: Pointer to margining structure if enabled
299 */
300struct usb4_port {
301 struct device dev;
302 struct tb_port *port;
303 bool can_offline;
304 bool offline;
305#ifdef CONFIG_USB4_DEBUGFS_MARGINING
306 struct tb_margining *margining;
307#endif
308};
309
310/**
311 * tb_retimer: Thunderbolt retimer
312 * @dev: Device for the retimer
313 * @tb: Pointer to the domain the retimer belongs to
314 * @index: Retimer index facing the router USB4 port
315 * @vendor: Vendor ID of the retimer
316 * @device: Device ID of the retimer
317 * @port: Pointer to the lane 0 adapter
318 * @nvm: Pointer to the NVM if the retimer has one (%NULL otherwise)
319 * @no_nvm_upgrade: Prevent NVM upgrade of this retimer
320 * @auth_status: Status of last NVM authentication
321 */
322struct tb_retimer {
323 struct device dev;
324 struct tb *tb;
325 u8 index;
326 u32 vendor;
327 u32 device;
328 struct tb_port *port;
329 struct tb_nvm *nvm;
330 bool no_nvm_upgrade;
331 u32 auth_status;
332};
333
334/**
335 * struct tb_path_hop - routing information for a tb_path
336 * @in_port: Ingress port of a switch
337 * @out_port: Egress port of a switch where the packet is routed out
338 * (must be on the same switch than @in_port)
339 * @in_hop_index: HopID where the path configuration entry is placed in
340 * the path config space of @in_port.
341 * @in_counter_index: Used counter index (not used in the driver
342 * currently, %-1 to disable)
343 * @next_hop_index: HopID of the packet when it is routed out from @out_port
344 * @initial_credits: Number of initial flow control credits allocated for
345 * the path
346 * @nfc_credits: Number of non-flow controlled buffers allocated for the
347 * @in_port.
348 * @pm_support: Set path PM packet support bit to 1 (for USB4 v2 routers)
349 *
350 * Hop configuration is always done on the IN port of a switch.
351 * in_port and out_port have to be on the same switch. Packets arriving on
352 * in_port with "hop" = in_hop_index will get routed to through out_port. The
353 * next hop to take (on out_port->remote) is determined by
354 * next_hop_index. When routing packet to another switch (out->remote is
355 * set) the @next_hop_index must match the @in_hop_index of that next
356 * hop to make routing possible.
357 *
358 * in_counter_index is the index of a counter (in TB_CFG_COUNTERS) on the in
359 * port.
360 */
361struct tb_path_hop {
362 struct tb_port *in_port;
363 struct tb_port *out_port;
364 int in_hop_index;
365 int in_counter_index;
366 int next_hop_index;
367 unsigned int initial_credits;
368 unsigned int nfc_credits;
369 bool pm_support;
370};
371
372/**
373 * enum tb_path_port - path options mask
374 * @TB_PATH_NONE: Do not activate on any hop on path
375 * @TB_PATH_SOURCE: Activate on the first hop (out of src)
376 * @TB_PATH_INTERNAL: Activate on the intermediate hops (not the first/last)
377 * @TB_PATH_DESTINATION: Activate on the last hop (into dst)
378 * @TB_PATH_ALL: Activate on all hops on the path
379 */
380enum tb_path_port {
381 TB_PATH_NONE = 0,
382 TB_PATH_SOURCE = 1,
383 TB_PATH_INTERNAL = 2,
384 TB_PATH_DESTINATION = 4,
385 TB_PATH_ALL = 7,
386};
387
388/**
389 * struct tb_path - a unidirectional path between two ports
390 * @tb: Pointer to the domain structure
391 * @name: Name of the path (used for debugging)
392 * @ingress_shared_buffer: Shared buffering used for ingress ports on the path
393 * @egress_shared_buffer: Shared buffering used for egress ports on the path
394 * @ingress_fc_enable: Flow control for ingress ports on the path
395 * @egress_fc_enable: Flow control for egress ports on the path
396 * @priority: Priority group if the path
397 * @weight: Weight of the path inside the priority group
398 * @drop_packages: Drop packages from queue tail or head
399 * @activated: Is the path active
400 * @clear_fc: Clear all flow control from the path config space entries
401 * when deactivating this path
402 * @hops: Path hops
403 * @path_length: How many hops the path uses
404 * @alloc_hopid: Does this path consume port HopID
405 *
406 * A path consists of a number of hops (see &struct tb_path_hop). To
407 * establish a PCIe tunnel two paths have to be created between the two
408 * PCIe ports.
409 */
410struct tb_path {
411 struct tb *tb;
412 const char *name;
413 enum tb_path_port ingress_shared_buffer;
414 enum tb_path_port egress_shared_buffer;
415 enum tb_path_port ingress_fc_enable;
416 enum tb_path_port egress_fc_enable;
417
418 unsigned int priority:3;
419 int weight:4;
420 bool drop_packages;
421 bool activated;
422 bool clear_fc;
423 struct tb_path_hop *hops;
424 int path_length;
425 bool alloc_hopid;
426};
427
428/* HopIDs 0-7 are reserved by the Thunderbolt protocol */
429#define TB_PATH_MIN_HOPID 8
430/*
431 * Support paths from the farthest (depth 6) router to the host and back
432 * to the same level (not necessarily to the same router).
433 */
434#define TB_PATH_MAX_HOPS (7 * 2)
435
436/* Possible wake types */
437#define TB_WAKE_ON_CONNECT BIT(0)
438#define TB_WAKE_ON_DISCONNECT BIT(1)
439#define TB_WAKE_ON_USB4 BIT(2)
440#define TB_WAKE_ON_USB3 BIT(3)
441#define TB_WAKE_ON_PCIE BIT(4)
442#define TB_WAKE_ON_DP BIT(5)
443
444/* CL states */
445#define TB_CL0S BIT(0)
446#define TB_CL1 BIT(1)
447#define TB_CL2 BIT(2)
448
449/**
450 * struct tb_cm_ops - Connection manager specific operations vector
451 * @driver_ready: Called right after control channel is started. Used by
452 * ICM to send driver ready message to the firmware.
453 * @start: Starts the domain
454 * @stop: Stops the domain
455 * @suspend_noirq: Connection manager specific suspend_noirq
456 * @resume_noirq: Connection manager specific resume_noirq
457 * @suspend: Connection manager specific suspend
458 * @freeze_noirq: Connection manager specific freeze_noirq
459 * @thaw_noirq: Connection manager specific thaw_noirq
460 * @complete: Connection manager specific complete
461 * @runtime_suspend: Connection manager specific runtime_suspend
462 * @runtime_resume: Connection manager specific runtime_resume
463 * @runtime_suspend_switch: Runtime suspend a switch
464 * @runtime_resume_switch: Runtime resume a switch
465 * @handle_event: Handle thunderbolt event
466 * @get_boot_acl: Get boot ACL list
467 * @set_boot_acl: Set boot ACL list
468 * @disapprove_switch: Disapprove switch (disconnect PCIe tunnel)
469 * @approve_switch: Approve switch
470 * @add_switch_key: Add key to switch
471 * @challenge_switch_key: Challenge switch using key
472 * @disconnect_pcie_paths: Disconnects PCIe paths before NVM update
473 * @approve_xdomain_paths: Approve (establish) XDomain DMA paths
474 * @disconnect_xdomain_paths: Disconnect XDomain DMA paths
475 * @usb4_switch_op: Optional proxy for USB4 router operations. If set
476 * this will be called whenever USB4 router operation is
477 * performed. If this returns %-EOPNOTSUPP then the
478 * native USB4 router operation is called.
479 * @usb4_switch_nvm_authenticate_status: Optional callback that the CM
480 * implementation can be used to
481 * return status of USB4 NVM_AUTH
482 * router operation.
483 */
484struct tb_cm_ops {
485 int (*driver_ready)(struct tb *tb);
486 int (*start)(struct tb *tb);
487 void (*stop)(struct tb *tb);
488 int (*suspend_noirq)(struct tb *tb);
489 int (*resume_noirq)(struct tb *tb);
490 int (*suspend)(struct tb *tb);
491 int (*freeze_noirq)(struct tb *tb);
492 int (*thaw_noirq)(struct tb *tb);
493 void (*complete)(struct tb *tb);
494 int (*runtime_suspend)(struct tb *tb);
495 int (*runtime_resume)(struct tb *tb);
496 int (*runtime_suspend_switch)(struct tb_switch *sw);
497 int (*runtime_resume_switch)(struct tb_switch *sw);
498 void (*handle_event)(struct tb *tb, enum tb_cfg_pkg_type,
499 const void *buf, size_t size);
500 int (*get_boot_acl)(struct tb *tb, uuid_t *uuids, size_t nuuids);
501 int (*set_boot_acl)(struct tb *tb, const uuid_t *uuids, size_t nuuids);
502 int (*disapprove_switch)(struct tb *tb, struct tb_switch *sw);
503 int (*approve_switch)(struct tb *tb, struct tb_switch *sw);
504 int (*add_switch_key)(struct tb *tb, struct tb_switch *sw);
505 int (*challenge_switch_key)(struct tb *tb, struct tb_switch *sw,
506 const u8 *challenge, u8 *response);
507 int (*disconnect_pcie_paths)(struct tb *tb);
508 int (*approve_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd,
509 int transmit_path, int transmit_ring,
510 int receive_path, int receive_ring);
511 int (*disconnect_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd,
512 int transmit_path, int transmit_ring,
513 int receive_path, int receive_ring);
514 int (*usb4_switch_op)(struct tb_switch *sw, u16 opcode, u32 *metadata,
515 u8 *status, const void *tx_data, size_t tx_data_len,
516 void *rx_data, size_t rx_data_len);
517 int (*usb4_switch_nvm_authenticate_status)(struct tb_switch *sw,
518 u32 *status);
519};
520
521static inline void *tb_priv(struct tb *tb)
522{
523 return (void *)tb->privdata;
524}
525
526#define TB_AUTOSUSPEND_DELAY 15000 /* ms */
527
528/* helper functions & macros */
529
530/**
531 * tb_upstream_port() - return the upstream port of a switch
532 *
533 * Every switch has an upstream port (for the root switch it is the NHI).
534 *
535 * During switch alloc/init tb_upstream_port()->remote may be NULL, even for
536 * non root switches (on the NHI port remote is always NULL).
537 *
538 * Return: Returns the upstream port of the switch.
539 */
540static inline struct tb_port *tb_upstream_port(struct tb_switch *sw)
541{
542 return &sw->ports[sw->config.upstream_port_number];
543}
544
545/**
546 * tb_is_upstream_port() - Is the port upstream facing
547 * @port: Port to check
548 *
549 * Returns true if @port is upstream facing port. In case of dual link
550 * ports both return true.
551 */
552static inline bool tb_is_upstream_port(const struct tb_port *port)
553{
554 const struct tb_port *upstream_port = tb_upstream_port(port->sw);
555 return port == upstream_port || port->dual_link_port == upstream_port;
556}
557
558static inline u64 tb_route(const struct tb_switch *sw)
559{
560 return ((u64) sw->config.route_hi) << 32 | sw->config.route_lo;
561}
562
563static inline struct tb_port *tb_port_at(u64 route, struct tb_switch *sw)
564{
565 u8 port;
566
567 port = route >> (sw->config.depth * 8);
568 if (WARN_ON(port > sw->config.max_port_number))
569 return NULL;
570 return &sw->ports[port];
571}
572
573static inline const char *tb_width_name(enum tb_link_width width)
574{
575 switch (width) {
576 case TB_LINK_WIDTH_SINGLE:
577 return "symmetric, single lane";
578 case TB_LINK_WIDTH_DUAL:
579 return "symmetric, dual lanes";
580 case TB_LINK_WIDTH_ASYM_TX:
581 return "asymmetric, 3 transmitters, 1 receiver";
582 case TB_LINK_WIDTH_ASYM_RX:
583 return "asymmetric, 3 receivers, 1 transmitter";
584 default:
585 return "unknown";
586 }
587}
588
589/**
590 * tb_port_has_remote() - Does the port have switch connected downstream
591 * @port: Port to check
592 *
593 * Returns true only when the port is primary port and has remote set.
594 */
595static inline bool tb_port_has_remote(const struct tb_port *port)
596{
597 if (tb_is_upstream_port(port))
598 return false;
599 if (!port->remote)
600 return false;
601 if (port->dual_link_port && port->link_nr)
602 return false;
603
604 return true;
605}
606
607static inline bool tb_port_is_null(const struct tb_port *port)
608{
609 return port && port->port && port->config.type == TB_TYPE_PORT;
610}
611
612static inline bool tb_port_is_nhi(const struct tb_port *port)
613{
614 return port && port->config.type == TB_TYPE_NHI;
615}
616
617static inline bool tb_port_is_pcie_down(const struct tb_port *port)
618{
619 return port && port->config.type == TB_TYPE_PCIE_DOWN;
620}
621
622static inline bool tb_port_is_pcie_up(const struct tb_port *port)
623{
624 return port && port->config.type == TB_TYPE_PCIE_UP;
625}
626
627static inline bool tb_port_is_dpin(const struct tb_port *port)
628{
629 return port && port->config.type == TB_TYPE_DP_HDMI_IN;
630}
631
632static inline bool tb_port_is_dpout(const struct tb_port *port)
633{
634 return port && port->config.type == TB_TYPE_DP_HDMI_OUT;
635}
636
637static inline bool tb_port_is_usb3_down(const struct tb_port *port)
638{
639 return port && port->config.type == TB_TYPE_USB3_DOWN;
640}
641
642static inline bool tb_port_is_usb3_up(const struct tb_port *port)
643{
644 return port && port->config.type == TB_TYPE_USB3_UP;
645}
646
647static inline int tb_sw_read(struct tb_switch *sw, void *buffer,
648 enum tb_cfg_space space, u32 offset, u32 length)
649{
650 if (sw->is_unplugged)
651 return -ENODEV;
652 return tb_cfg_read(sw->tb->ctl,
653 buffer,
654 tb_route(sw),
655 0,
656 space,
657 offset,
658 length);
659}
660
661static inline int tb_sw_write(struct tb_switch *sw, const void *buffer,
662 enum tb_cfg_space space, u32 offset, u32 length)
663{
664 if (sw->is_unplugged)
665 return -ENODEV;
666 return tb_cfg_write(sw->tb->ctl,
667 buffer,
668 tb_route(sw),
669 0,
670 space,
671 offset,
672 length);
673}
674
675static inline int tb_port_read(struct tb_port *port, void *buffer,
676 enum tb_cfg_space space, u32 offset, u32 length)
677{
678 if (port->sw->is_unplugged)
679 return -ENODEV;
680 return tb_cfg_read(port->sw->tb->ctl,
681 buffer,
682 tb_route(port->sw),
683 port->port,
684 space,
685 offset,
686 length);
687}
688
689static inline int tb_port_write(struct tb_port *port, const void *buffer,
690 enum tb_cfg_space space, u32 offset, u32 length)
691{
692 if (port->sw->is_unplugged)
693 return -ENODEV;
694 return tb_cfg_write(port->sw->tb->ctl,
695 buffer,
696 tb_route(port->sw),
697 port->port,
698 space,
699 offset,
700 length);
701}
702
703#define tb_err(tb, fmt, arg...) dev_err(&(tb)->nhi->pdev->dev, fmt, ## arg)
704#define tb_WARN(tb, fmt, arg...) dev_WARN(&(tb)->nhi->pdev->dev, fmt, ## arg)
705#define tb_warn(tb, fmt, arg...) dev_warn(&(tb)->nhi->pdev->dev, fmt, ## arg)
706#define tb_info(tb, fmt, arg...) dev_info(&(tb)->nhi->pdev->dev, fmt, ## arg)
707#define tb_dbg(tb, fmt, arg...) dev_dbg(&(tb)->nhi->pdev->dev, fmt, ## arg)
708
709#define __TB_SW_PRINT(level, sw, fmt, arg...) \
710 do { \
711 const struct tb_switch *__sw = (sw); \
712 level(__sw->tb, "%llx: " fmt, \
713 tb_route(__sw), ## arg); \
714 } while (0)
715#define tb_sw_WARN(sw, fmt, arg...) __TB_SW_PRINT(tb_WARN, sw, fmt, ##arg)
716#define tb_sw_warn(sw, fmt, arg...) __TB_SW_PRINT(tb_warn, sw, fmt, ##arg)
717#define tb_sw_info(sw, fmt, arg...) __TB_SW_PRINT(tb_info, sw, fmt, ##arg)
718#define tb_sw_dbg(sw, fmt, arg...) __TB_SW_PRINT(tb_dbg, sw, fmt, ##arg)
719
720#define __TB_PORT_PRINT(level, _port, fmt, arg...) \
721 do { \
722 const struct tb_port *__port = (_port); \
723 level(__port->sw->tb, "%llx:%u: " fmt, \
724 tb_route(__port->sw), __port->port, ## arg); \
725 } while (0)
726#define tb_port_WARN(port, fmt, arg...) \
727 __TB_PORT_PRINT(tb_WARN, port, fmt, ##arg)
728#define tb_port_warn(port, fmt, arg...) \
729 __TB_PORT_PRINT(tb_warn, port, fmt, ##arg)
730#define tb_port_info(port, fmt, arg...) \
731 __TB_PORT_PRINT(tb_info, port, fmt, ##arg)
732#define tb_port_dbg(port, fmt, arg...) \
733 __TB_PORT_PRINT(tb_dbg, port, fmt, ##arg)
734
735struct tb *icm_probe(struct tb_nhi *nhi);
736struct tb *tb_probe(struct tb_nhi *nhi);
737
738extern struct device_type tb_domain_type;
739extern struct device_type tb_retimer_type;
740extern struct device_type tb_switch_type;
741extern struct device_type usb4_port_device_type;
742
743int tb_domain_init(void);
744void tb_domain_exit(void);
745int tb_xdomain_init(void);
746void tb_xdomain_exit(void);
747
748struct tb *tb_domain_alloc(struct tb_nhi *nhi, int timeout_msec, size_t privsize);
749int tb_domain_add(struct tb *tb);
750void tb_domain_remove(struct tb *tb);
751int tb_domain_suspend_noirq(struct tb *tb);
752int tb_domain_resume_noirq(struct tb *tb);
753int tb_domain_suspend(struct tb *tb);
754int tb_domain_freeze_noirq(struct tb *tb);
755int tb_domain_thaw_noirq(struct tb *tb);
756void tb_domain_complete(struct tb *tb);
757int tb_domain_runtime_suspend(struct tb *tb);
758int tb_domain_runtime_resume(struct tb *tb);
759int tb_domain_disapprove_switch(struct tb *tb, struct tb_switch *sw);
760int tb_domain_approve_switch(struct tb *tb, struct tb_switch *sw);
761int tb_domain_approve_switch_key(struct tb *tb, struct tb_switch *sw);
762int tb_domain_challenge_switch_key(struct tb *tb, struct tb_switch *sw);
763int tb_domain_disconnect_pcie_paths(struct tb *tb);
764int tb_domain_approve_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
765 int transmit_path, int transmit_ring,
766 int receive_path, int receive_ring);
767int tb_domain_disconnect_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
768 int transmit_path, int transmit_ring,
769 int receive_path, int receive_ring);
770int tb_domain_disconnect_all_paths(struct tb *tb);
771
772static inline struct tb *tb_domain_get(struct tb *tb)
773{
774 if (tb)
775 get_device(&tb->dev);
776 return tb;
777}
778
779static inline void tb_domain_put(struct tb *tb)
780{
781 put_device(&tb->dev);
782}
783
784struct tb_nvm *tb_nvm_alloc(struct device *dev);
785int tb_nvm_read_version(struct tb_nvm *nvm);
786int tb_nvm_validate(struct tb_nvm *nvm);
787int tb_nvm_write_headers(struct tb_nvm *nvm);
788int tb_nvm_add_active(struct tb_nvm *nvm, nvmem_reg_read_t reg_read);
789int tb_nvm_write_buf(struct tb_nvm *nvm, unsigned int offset, void *val,
790 size_t bytes);
791int tb_nvm_add_non_active(struct tb_nvm *nvm, nvmem_reg_write_t reg_write);
792void tb_nvm_free(struct tb_nvm *nvm);
793void tb_nvm_exit(void);
794
795typedef int (*read_block_fn)(void *, unsigned int, void *, size_t);
796typedef int (*write_block_fn)(void *, unsigned int, const void *, size_t);
797
798int tb_nvm_read_data(unsigned int address, void *buf, size_t size,
799 unsigned int retries, read_block_fn read_block,
800 void *read_block_data);
801int tb_nvm_write_data(unsigned int address, const void *buf, size_t size,
802 unsigned int retries, write_block_fn write_next_block,
803 void *write_block_data);
804
805int tb_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
806 size_t size);
807struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent,
808 u64 route);
809struct tb_switch *tb_switch_alloc_safe_mode(struct tb *tb,
810 struct device *parent, u64 route);
811int tb_switch_configure(struct tb_switch *sw);
812int tb_switch_configuration_valid(struct tb_switch *sw);
813int tb_switch_add(struct tb_switch *sw);
814void tb_switch_remove(struct tb_switch *sw);
815void tb_switch_suspend(struct tb_switch *sw, bool runtime);
816int tb_switch_resume(struct tb_switch *sw);
817int tb_switch_reset(struct tb_switch *sw);
818int tb_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
819 u32 value, int timeout_msec);
820void tb_sw_set_unplugged(struct tb_switch *sw);
821struct tb_port *tb_switch_find_port(struct tb_switch *sw,
822 enum tb_port_type type);
823struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link,
824 u8 depth);
825struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid);
826struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route);
827
828/**
829 * tb_switch_for_each_port() - Iterate over each switch port
830 * @sw: Switch whose ports to iterate
831 * @p: Port used as iterator
832 *
833 * Iterates over each switch port skipping the control port (port %0).
834 */
835#define tb_switch_for_each_port(sw, p) \
836 for ((p) = &(sw)->ports[1]; \
837 (p) <= &(sw)->ports[(sw)->config.max_port_number]; (p)++)
838
839static inline struct tb_switch *tb_switch_get(struct tb_switch *sw)
840{
841 if (sw)
842 get_device(&sw->dev);
843 return sw;
844}
845
846static inline void tb_switch_put(struct tb_switch *sw)
847{
848 put_device(&sw->dev);
849}
850
851static inline bool tb_is_switch(const struct device *dev)
852{
853 return dev->type == &tb_switch_type;
854}
855
856static inline struct tb_switch *tb_to_switch(const struct device *dev)
857{
858 if (tb_is_switch(dev))
859 return container_of(dev, struct tb_switch, dev);
860 return NULL;
861}
862
863static inline struct tb_switch *tb_switch_parent(struct tb_switch *sw)
864{
865 return tb_to_switch(sw->dev.parent);
866}
867
868/**
869 * tb_switch_downstream_port() - Return downstream facing port of parent router
870 * @sw: Device router pointer
871 *
872 * Only call for device routers. Returns the downstream facing port of
873 * the parent router.
874 */
875static inline struct tb_port *tb_switch_downstream_port(struct tb_switch *sw)
876{
877 if (WARN_ON(!tb_route(sw)))
878 return NULL;
879 return tb_port_at(tb_route(sw), tb_switch_parent(sw));
880}
881
882/**
883 * tb_switch_depth() - Returns depth of the connected router
884 * @sw: Router
885 */
886static inline int tb_switch_depth(const struct tb_switch *sw)
887{
888 return sw->config.depth;
889}
890
891static inline bool tb_switch_is_light_ridge(const struct tb_switch *sw)
892{
893 return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
894 sw->config.device_id == PCI_DEVICE_ID_INTEL_LIGHT_RIDGE;
895}
896
897static inline bool tb_switch_is_eagle_ridge(const struct tb_switch *sw)
898{
899 return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
900 sw->config.device_id == PCI_DEVICE_ID_INTEL_EAGLE_RIDGE;
901}
902
903static inline bool tb_switch_is_cactus_ridge(const struct tb_switch *sw)
904{
905 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
906 switch (sw->config.device_id) {
907 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C:
908 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C:
909 return true;
910 }
911 }
912 return false;
913}
914
915static inline bool tb_switch_is_falcon_ridge(const struct tb_switch *sw)
916{
917 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
918 switch (sw->config.device_id) {
919 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE:
920 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE:
921 return true;
922 }
923 }
924 return false;
925}
926
927static inline bool tb_switch_is_alpine_ridge(const struct tb_switch *sw)
928{
929 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
930 switch (sw->config.device_id) {
931 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE:
932 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE:
933 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE:
934 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE:
935 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE:
936 return true;
937 }
938 }
939 return false;
940}
941
942static inline bool tb_switch_is_titan_ridge(const struct tb_switch *sw)
943{
944 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
945 switch (sw->config.device_id) {
946 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE:
947 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE:
948 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE:
949 return true;
950 }
951 }
952 return false;
953}
954
955static inline bool tb_switch_is_tiger_lake(const struct tb_switch *sw)
956{
957 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
958 switch (sw->config.device_id) {
959 case PCI_DEVICE_ID_INTEL_TGL_NHI0:
960 case PCI_DEVICE_ID_INTEL_TGL_NHI1:
961 case PCI_DEVICE_ID_INTEL_TGL_H_NHI0:
962 case PCI_DEVICE_ID_INTEL_TGL_H_NHI1:
963 return true;
964 }
965 }
966 return false;
967}
968
969/**
970 * tb_switch_is_icm() - Is the switch handled by ICM firmware
971 * @sw: Switch to check
972 *
973 * In case there is a need to differentiate whether ICM firmware or SW CM
974 * is handling @sw this function can be called. It is valid to call this
975 * after tb_switch_alloc() and tb_switch_configure() has been called
976 * (latter only for SW CM case).
977 */
978static inline bool tb_switch_is_icm(const struct tb_switch *sw)
979{
980 return !sw->config.enabled;
981}
982
983int tb_switch_set_link_width(struct tb_switch *sw, enum tb_link_width width);
984int tb_switch_configure_link(struct tb_switch *sw);
985void tb_switch_unconfigure_link(struct tb_switch *sw);
986
987bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
988int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
989void tb_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
990
991int tb_switch_tmu_init(struct tb_switch *sw);
992int tb_switch_tmu_post_time(struct tb_switch *sw);
993int tb_switch_tmu_disable(struct tb_switch *sw);
994int tb_switch_tmu_enable(struct tb_switch *sw);
995int tb_switch_tmu_configure(struct tb_switch *sw, enum tb_switch_tmu_mode mode);
996
997/**
998 * tb_switch_tmu_is_configured() - Is given TMU mode configured
999 * @sw: Router whose mode to check
1000 * @mode: Mode to check
1001 *
1002 * Checks if given router TMU mode is configured to @mode. Note the
1003 * router TMU might not be enabled to this mode.
1004 */
1005static inline bool tb_switch_tmu_is_configured(const struct tb_switch *sw,
1006 enum tb_switch_tmu_mode mode)
1007{
1008 return sw->tmu.mode_request == mode;
1009}
1010
1011/**
1012 * tb_switch_tmu_is_enabled() - Checks if the specified TMU mode is enabled
1013 * @sw: Router whose TMU mode to check
1014 *
1015 * Return true if hardware TMU configuration matches the requested
1016 * configuration (and is not %TB_SWITCH_TMU_MODE_OFF).
1017 */
1018static inline bool tb_switch_tmu_is_enabled(const struct tb_switch *sw)
1019{
1020 return sw->tmu.mode != TB_SWITCH_TMU_MODE_OFF &&
1021 sw->tmu.mode == sw->tmu.mode_request;
1022}
1023
1024bool tb_port_clx_is_enabled(struct tb_port *port, unsigned int clx);
1025
1026int tb_switch_clx_init(struct tb_switch *sw);
1027int tb_switch_clx_enable(struct tb_switch *sw, unsigned int clx);
1028int tb_switch_clx_disable(struct tb_switch *sw);
1029
1030/**
1031 * tb_switch_clx_is_enabled() - Checks if the CLx is enabled
1032 * @sw: Router to check for the CLx
1033 * @clx: The CLx states to check for
1034 *
1035 * Checks if the specified CLx is enabled on the router upstream link.
1036 * Returns true if any of the given states is enabled.
1037 *
1038 * Not applicable for a host router.
1039 */
1040static inline bool tb_switch_clx_is_enabled(const struct tb_switch *sw,
1041 unsigned int clx)
1042{
1043 return sw->clx & clx;
1044}
1045
1046int tb_switch_pcie_l1_enable(struct tb_switch *sw);
1047
1048int tb_switch_xhci_connect(struct tb_switch *sw);
1049void tb_switch_xhci_disconnect(struct tb_switch *sw);
1050
1051int tb_port_state(struct tb_port *port);
1052int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged);
1053int tb_port_add_nfc_credits(struct tb_port *port, int credits);
1054int tb_port_clear_counter(struct tb_port *port, int counter);
1055int tb_port_unlock(struct tb_port *port);
1056int tb_port_enable(struct tb_port *port);
1057int tb_port_disable(struct tb_port *port);
1058int tb_port_alloc_in_hopid(struct tb_port *port, int hopid, int max_hopid);
1059void tb_port_release_in_hopid(struct tb_port *port, int hopid);
1060int tb_port_alloc_out_hopid(struct tb_port *port, int hopid, int max_hopid);
1061void tb_port_release_out_hopid(struct tb_port *port, int hopid);
1062struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end,
1063 struct tb_port *prev);
1064
1065/**
1066 * tb_port_path_direction_downstream() - Checks if path directed downstream
1067 * @src: Source adapter
1068 * @dst: Destination adapter
1069 *
1070 * Returns %true only if the specified path from source adapter (@src)
1071 * to destination adapter (@dst) is directed downstream.
1072 */
1073static inline bool
1074tb_port_path_direction_downstream(const struct tb_port *src,
1075 const struct tb_port *dst)
1076{
1077 return src->sw->config.depth < dst->sw->config.depth;
1078}
1079
1080static inline bool tb_port_use_credit_allocation(const struct tb_port *port)
1081{
1082 return tb_port_is_null(port) && port->sw->credit_allocation;
1083}
1084
1085/**
1086 * tb_for_each_port_on_path() - Iterate over each port on path
1087 * @src: Source port
1088 * @dst: Destination port
1089 * @p: Port used as iterator
1090 *
1091 * Walks over each port on path from @src to @dst.
1092 */
1093#define tb_for_each_port_on_path(src, dst, p) \
1094 for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \
1095 (p) = tb_next_port_on_path((src), (dst), (p)))
1096
1097/**
1098 * tb_for_each_upstream_port_on_path() - Iterate over each upstreamm port on path
1099 * @src: Source port
1100 * @dst: Destination port
1101 * @p: Port used as iterator
1102 *
1103 * Walks over each upstream lane adapter on path from @src to @dst.
1104 */
1105#define tb_for_each_upstream_port_on_path(src, dst, p) \
1106 for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \
1107 (p) = tb_next_port_on_path((src), (dst), (p))) \
1108 if (!tb_port_is_null((p)) || !tb_is_upstream_port((p))) {\
1109 continue; \
1110 } else
1111
1112int tb_port_get_link_speed(struct tb_port *port);
1113int tb_port_get_link_generation(struct tb_port *port);
1114int tb_port_get_link_width(struct tb_port *port);
1115bool tb_port_width_supported(struct tb_port *port, unsigned int width);
1116int tb_port_set_link_width(struct tb_port *port, enum tb_link_width width);
1117int tb_port_lane_bonding_enable(struct tb_port *port);
1118void tb_port_lane_bonding_disable(struct tb_port *port);
1119int tb_port_wait_for_link_width(struct tb_port *port, unsigned int width,
1120 int timeout_msec);
1121int tb_port_update_credits(struct tb_port *port);
1122
1123int tb_switch_find_vse_cap(struct tb_switch *sw, enum tb_switch_vse_cap vsec);
1124int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap);
1125int tb_switch_next_cap(struct tb_switch *sw, unsigned int offset);
1126int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap);
1127int tb_port_next_cap(struct tb_port *port, unsigned int offset);
1128bool tb_port_is_enabled(struct tb_port *port);
1129
1130bool tb_usb3_port_is_enabled(struct tb_port *port);
1131int tb_usb3_port_enable(struct tb_port *port, bool enable);
1132
1133bool tb_pci_port_is_enabled(struct tb_port *port);
1134int tb_pci_port_enable(struct tb_port *port, bool enable);
1135
1136int tb_dp_port_hpd_is_active(struct tb_port *port);
1137int tb_dp_port_hpd_clear(struct tb_port *port);
1138int tb_dp_port_set_hops(struct tb_port *port, unsigned int video,
1139 unsigned int aux_tx, unsigned int aux_rx);
1140bool tb_dp_port_is_enabled(struct tb_port *port);
1141int tb_dp_port_enable(struct tb_port *port, bool enable);
1142
1143struct tb_path *tb_path_discover(struct tb_port *src, int src_hopid,
1144 struct tb_port *dst, int dst_hopid,
1145 struct tb_port **last, const char *name,
1146 bool alloc_hopid);
1147struct tb_path *tb_path_alloc(struct tb *tb, struct tb_port *src, int src_hopid,
1148 struct tb_port *dst, int dst_hopid, int link_nr,
1149 const char *name);
1150void tb_path_free(struct tb_path *path);
1151int tb_path_activate(struct tb_path *path);
1152void tb_path_deactivate(struct tb_path *path);
1153bool tb_path_is_invalid(struct tb_path *path);
1154bool tb_path_port_on_path(const struct tb_path *path,
1155 const struct tb_port *port);
1156
1157/**
1158 * tb_path_for_each_hop() - Iterate over each hop on path
1159 * @path: Path whose hops to iterate
1160 * @hop: Hop used as iterator
1161 *
1162 * Iterates over each hop on path.
1163 */
1164#define tb_path_for_each_hop(path, hop) \
1165 for ((hop) = &(path)->hops[0]; \
1166 (hop) <= &(path)->hops[(path)->path_length - 1]; (hop)++)
1167
1168int tb_drom_read(struct tb_switch *sw);
1169int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid);
1170
1171int tb_lc_read_uuid(struct tb_switch *sw, u32 *uuid);
1172int tb_lc_configure_port(struct tb_port *port);
1173void tb_lc_unconfigure_port(struct tb_port *port);
1174int tb_lc_configure_xdomain(struct tb_port *port);
1175void tb_lc_unconfigure_xdomain(struct tb_port *port);
1176int tb_lc_start_lane_initialization(struct tb_port *port);
1177bool tb_lc_is_clx_supported(struct tb_port *port);
1178bool tb_lc_is_usb_plugged(struct tb_port *port);
1179bool tb_lc_is_xhci_connected(struct tb_port *port);
1180int tb_lc_xhci_connect(struct tb_port *port);
1181void tb_lc_xhci_disconnect(struct tb_port *port);
1182int tb_lc_set_wake(struct tb_switch *sw, unsigned int flags);
1183int tb_lc_set_sleep(struct tb_switch *sw);
1184bool tb_lc_lane_bonding_possible(struct tb_switch *sw);
1185bool tb_lc_dp_sink_query(struct tb_switch *sw, struct tb_port *in);
1186int tb_lc_dp_sink_alloc(struct tb_switch *sw, struct tb_port *in);
1187int tb_lc_dp_sink_dealloc(struct tb_switch *sw, struct tb_port *in);
1188int tb_lc_force_power(struct tb_switch *sw);
1189
1190static inline int tb_route_length(u64 route)
1191{
1192 return (fls64(route) + TB_ROUTE_SHIFT - 1) / TB_ROUTE_SHIFT;
1193}
1194
1195/**
1196 * tb_downstream_route() - get route to downstream switch
1197 *
1198 * Port must not be the upstream port (otherwise a loop is created).
1199 *
1200 * Return: Returns a route to the switch behind @port.
1201 */
1202static inline u64 tb_downstream_route(struct tb_port *port)
1203{
1204 return tb_route(port->sw)
1205 | ((u64) port->port << (port->sw->config.depth * 8));
1206}
1207
1208bool tb_is_xdomain_enabled(void);
1209bool tb_xdomain_handle_request(struct tb *tb, enum tb_cfg_pkg_type type,
1210 const void *buf, size_t size);
1211struct tb_xdomain *tb_xdomain_alloc(struct tb *tb, struct device *parent,
1212 u64 route, const uuid_t *local_uuid,
1213 const uuid_t *remote_uuid);
1214void tb_xdomain_add(struct tb_xdomain *xd);
1215void tb_xdomain_remove(struct tb_xdomain *xd);
1216struct tb_xdomain *tb_xdomain_find_by_link_depth(struct tb *tb, u8 link,
1217 u8 depth);
1218
1219static inline struct tb_switch *tb_xdomain_parent(struct tb_xdomain *xd)
1220{
1221 return tb_to_switch(xd->dev.parent);
1222}
1223
1224/**
1225 * tb_xdomain_downstream_port() - Return downstream facing port of parent router
1226 * @xd: Xdomain pointer
1227 *
1228 * Returns the downstream port the XDomain is connected to.
1229 */
1230static inline struct tb_port *tb_xdomain_downstream_port(struct tb_xdomain *xd)
1231{
1232 return tb_port_at(xd->route, tb_xdomain_parent(xd));
1233}
1234
1235int tb_retimer_nvm_read(struct tb_retimer *rt, unsigned int address, void *buf,
1236 size_t size);
1237int tb_retimer_scan(struct tb_port *port, bool add);
1238void tb_retimer_remove_all(struct tb_port *port);
1239
1240static inline bool tb_is_retimer(const struct device *dev)
1241{
1242 return dev->type == &tb_retimer_type;
1243}
1244
1245static inline struct tb_retimer *tb_to_retimer(struct device *dev)
1246{
1247 if (tb_is_retimer(dev))
1248 return container_of(dev, struct tb_retimer, dev);
1249 return NULL;
1250}
1251
1252/**
1253 * usb4_switch_version() - Returns USB4 version of the router
1254 * @sw: Router to check
1255 *
1256 * Returns major version of USB4 router (%1 for v1, %2 for v2 and so
1257 * on). Can be called to pre-USB4 router too and in that case returns %0.
1258 */
1259static inline unsigned int usb4_switch_version(const struct tb_switch *sw)
1260{
1261 return FIELD_GET(USB4_VERSION_MAJOR_MASK, sw->config.thunderbolt_version);
1262}
1263
1264/**
1265 * tb_switch_is_usb4() - Is the switch USB4 compliant
1266 * @sw: Switch to check
1267 *
1268 * Returns true if the @sw is USB4 compliant router, false otherwise.
1269 */
1270static inline bool tb_switch_is_usb4(const struct tb_switch *sw)
1271{
1272 return usb4_switch_version(sw) > 0;
1273}
1274
1275int usb4_switch_setup(struct tb_switch *sw);
1276int usb4_switch_configuration_valid(struct tb_switch *sw);
1277int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid);
1278int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
1279 size_t size);
1280bool usb4_switch_lane_bonding_possible(struct tb_switch *sw);
1281int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags);
1282int usb4_switch_set_sleep(struct tb_switch *sw);
1283int usb4_switch_nvm_sector_size(struct tb_switch *sw);
1284int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
1285 size_t size);
1286int usb4_switch_nvm_set_offset(struct tb_switch *sw, unsigned int address);
1287int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
1288 const void *buf, size_t size);
1289int usb4_switch_nvm_authenticate(struct tb_switch *sw);
1290int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status);
1291int usb4_switch_credits_init(struct tb_switch *sw);
1292bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
1293int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1294int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1295struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
1296 const struct tb_port *port);
1297struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
1298 const struct tb_port *port);
1299int usb4_switch_add_ports(struct tb_switch *sw);
1300void usb4_switch_remove_ports(struct tb_switch *sw);
1301
1302int usb4_port_unlock(struct tb_port *port);
1303int usb4_port_hotplug_enable(struct tb_port *port);
1304int usb4_port_configure(struct tb_port *port);
1305void usb4_port_unconfigure(struct tb_port *port);
1306int usb4_port_configure_xdomain(struct tb_port *port, struct tb_xdomain *xd);
1307void usb4_port_unconfigure_xdomain(struct tb_port *port);
1308int usb4_port_router_offline(struct tb_port *port);
1309int usb4_port_router_online(struct tb_port *port);
1310int usb4_port_enumerate_retimers(struct tb_port *port);
1311bool usb4_port_clx_supported(struct tb_port *port);
1312int usb4_port_margining_caps(struct tb_port *port, u32 *caps);
1313
1314bool usb4_port_asym_supported(struct tb_port *port);
1315int usb4_port_asym_set_link_width(struct tb_port *port, enum tb_link_width width);
1316int usb4_port_asym_start(struct tb_port *port);
1317
1318int usb4_port_hw_margin(struct tb_port *port, unsigned int lanes,
1319 unsigned int ber_level, bool timing, bool right_high,
1320 u32 *results);
1321int usb4_port_sw_margin(struct tb_port *port, unsigned int lanes, bool timing,
1322 bool right_high, u32 counter);
1323int usb4_port_sw_margin_errors(struct tb_port *port, u32 *errors);
1324
1325int usb4_port_retimer_set_inbound_sbtx(struct tb_port *port, u8 index);
1326int usb4_port_retimer_unset_inbound_sbtx(struct tb_port *port, u8 index);
1327int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1328 u8 size);
1329int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1330 const void *buf, u8 size);
1331int usb4_port_retimer_is_last(struct tb_port *port, u8 index);
1332int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index);
1333int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1334 unsigned int address);
1335int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index,
1336 unsigned int address, const void *buf,
1337 size_t size);
1338int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index);
1339int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1340 u32 *status);
1341int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1342 unsigned int address, void *buf, size_t size);
1343
1344int usb4_usb3_port_max_link_rate(struct tb_port *port);
1345int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
1346 int *downstream_bw);
1347int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
1348 int *downstream_bw);
1349int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
1350 int *downstream_bw);
1351
1352int usb4_dp_port_set_cm_id(struct tb_port *port, int cm_id);
1353bool usb4_dp_port_bandwidth_mode_supported(struct tb_port *port);
1354bool usb4_dp_port_bandwidth_mode_enabled(struct tb_port *port);
1355int usb4_dp_port_set_cm_bandwidth_mode_supported(struct tb_port *port,
1356 bool supported);
1357int usb4_dp_port_group_id(struct tb_port *port);
1358int usb4_dp_port_set_group_id(struct tb_port *port, int group_id);
1359int usb4_dp_port_nrd(struct tb_port *port, int *rate, int *lanes);
1360int usb4_dp_port_set_nrd(struct tb_port *port, int rate, int lanes);
1361int usb4_dp_port_granularity(struct tb_port *port);
1362int usb4_dp_port_set_granularity(struct tb_port *port, int granularity);
1363int usb4_dp_port_set_estimated_bandwidth(struct tb_port *port, int bw);
1364int usb4_dp_port_allocated_bandwidth(struct tb_port *port);
1365int usb4_dp_port_allocate_bandwidth(struct tb_port *port, int bw);
1366int usb4_dp_port_requested_bandwidth(struct tb_port *port);
1367
1368int usb4_pci_port_set_ext_encapsulation(struct tb_port *port, bool enable);
1369
1370static inline bool tb_is_usb4_port_device(const struct device *dev)
1371{
1372 return dev->type == &usb4_port_device_type;
1373}
1374
1375static inline struct usb4_port *tb_to_usb4_port_device(struct device *dev)
1376{
1377 if (tb_is_usb4_port_device(dev))
1378 return container_of(dev, struct usb4_port, dev);
1379 return NULL;
1380}
1381
1382struct usb4_port *usb4_port_device_add(struct tb_port *port);
1383void usb4_port_device_remove(struct usb4_port *usb4);
1384int usb4_port_device_resume(struct usb4_port *usb4);
1385
1386static inline bool usb4_port_device_is_offline(const struct usb4_port *usb4)
1387{
1388 return usb4->offline;
1389}
1390
1391void tb_check_quirks(struct tb_switch *sw);
1392
1393#ifdef CONFIG_ACPI
1394bool tb_acpi_add_links(struct tb_nhi *nhi);
1395
1396bool tb_acpi_is_native(void);
1397bool tb_acpi_may_tunnel_usb3(void);
1398bool tb_acpi_may_tunnel_dp(void);
1399bool tb_acpi_may_tunnel_pcie(void);
1400bool tb_acpi_is_xdomain_allowed(void);
1401
1402int tb_acpi_init(void);
1403void tb_acpi_exit(void);
1404int tb_acpi_power_on_retimers(struct tb_port *port);
1405int tb_acpi_power_off_retimers(struct tb_port *port);
1406#else
1407static inline bool tb_acpi_add_links(struct tb_nhi *nhi) { return false; }
1408
1409static inline bool tb_acpi_is_native(void) { return true; }
1410static inline bool tb_acpi_may_tunnel_usb3(void) { return true; }
1411static inline bool tb_acpi_may_tunnel_dp(void) { return true; }
1412static inline bool tb_acpi_may_tunnel_pcie(void) { return true; }
1413static inline bool tb_acpi_is_xdomain_allowed(void) { return true; }
1414
1415static inline int tb_acpi_init(void) { return 0; }
1416static inline void tb_acpi_exit(void) { }
1417static inline int tb_acpi_power_on_retimers(struct tb_port *port) { return 0; }
1418static inline int tb_acpi_power_off_retimers(struct tb_port *port) { return 0; }
1419#endif
1420
1421#ifdef CONFIG_DEBUG_FS
1422void tb_debugfs_init(void);
1423void tb_debugfs_exit(void);
1424void tb_switch_debugfs_init(struct tb_switch *sw);
1425void tb_switch_debugfs_remove(struct tb_switch *sw);
1426void tb_xdomain_debugfs_init(struct tb_xdomain *xd);
1427void tb_xdomain_debugfs_remove(struct tb_xdomain *xd);
1428void tb_service_debugfs_init(struct tb_service *svc);
1429void tb_service_debugfs_remove(struct tb_service *svc);
1430#else
1431static inline void tb_debugfs_init(void) { }
1432static inline void tb_debugfs_exit(void) { }
1433static inline void tb_switch_debugfs_init(struct tb_switch *sw) { }
1434static inline void tb_switch_debugfs_remove(struct tb_switch *sw) { }
1435static inline void tb_xdomain_debugfs_init(struct tb_xdomain *xd) { }
1436static inline void tb_xdomain_debugfs_remove(struct tb_xdomain *xd) { }
1437static inline void tb_service_debugfs_init(struct tb_service *svc) { }
1438static inline void tb_service_debugfs_remove(struct tb_service *svc) { }
1439#endif
1440
1441#endif
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Thunderbolt driver - bus logic (NHI independent)
4 *
5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
6 * Copyright (C) 2018, Intel Corporation
7 */
8
9#ifndef TB_H_
10#define TB_H_
11
12#include <linux/nvmem-provider.h>
13#include <linux/pci.h>
14#include <linux/thunderbolt.h>
15#include <linux/uuid.h>
16#include <linux/bitfield.h>
17
18#include "tb_regs.h"
19#include "ctl.h"
20#include "dma_port.h"
21
22/* Keep link controller awake during update */
23#define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0)
24/* Disable CLx if not supported */
25#define QUIRK_NO_CLX BIT(1)
26/* Need to keep power on while USB4 port is in redrive mode */
27#define QUIRK_KEEP_POWER_IN_DP_REDRIVE BIT(2)
28
29/**
30 * struct tb_nvm - Structure holding NVM information
31 * @dev: Owner of the NVM
32 * @major: Major version number of the active NVM portion
33 * @minor: Minor version number of the active NVM portion
34 * @id: Identifier used with both NVM portions
35 * @active: Active portion NVMem device
36 * @active_size: Size in bytes of the active NVM
37 * @non_active: Non-active portion NVMem device
38 * @buf: Buffer where the NVM image is stored before it is written to
39 * the actual NVM flash device
40 * @buf_data_start: Where the actual image starts after skipping
41 * possible headers
42 * @buf_data_size: Number of bytes actually consumed by the new NVM
43 * image
44 * @authenticating: The device is authenticating the new NVM
45 * @flushed: The image has been flushed to the storage area
46 * @vops: Router vendor specific NVM operations (optional)
47 *
48 * The user of this structure needs to handle serialization of possible
49 * concurrent access.
50 */
51struct tb_nvm {
52 struct device *dev;
53 u32 major;
54 u32 minor;
55 int id;
56 struct nvmem_device *active;
57 size_t active_size;
58 struct nvmem_device *non_active;
59 void *buf;
60 void *buf_data_start;
61 size_t buf_data_size;
62 bool authenticating;
63 bool flushed;
64 const struct tb_nvm_vendor_ops *vops;
65};
66
67enum tb_nvm_write_ops {
68 WRITE_AND_AUTHENTICATE = 1,
69 WRITE_ONLY = 2,
70 AUTHENTICATE_ONLY = 3,
71};
72
73#define TB_SWITCH_KEY_SIZE 32
74#define TB_SWITCH_MAX_DEPTH 6
75#define USB4_SWITCH_MAX_DEPTH 5
76
77/**
78 * enum tb_switch_tmu_mode - TMU mode
79 * @TB_SWITCH_TMU_MODE_OFF: TMU is off
80 * @TB_SWITCH_TMU_MODE_LOWRES: Uni-directional, normal mode
81 * @TB_SWITCH_TMU_MODE_HIFI_UNI: Uni-directional, HiFi mode
82 * @TB_SWITCH_TMU_MODE_HIFI_BI: Bi-directional, HiFi mode
83 * @TB_SWITCH_TMU_MODE_MEDRES_ENHANCED_UNI: Enhanced Uni-directional, MedRes mode
84 *
85 * Ordering is based on TMU accuracy level (highest last).
86 */
87enum tb_switch_tmu_mode {
88 TB_SWITCH_TMU_MODE_OFF,
89 TB_SWITCH_TMU_MODE_LOWRES,
90 TB_SWITCH_TMU_MODE_HIFI_UNI,
91 TB_SWITCH_TMU_MODE_HIFI_BI,
92 TB_SWITCH_TMU_MODE_MEDRES_ENHANCED_UNI,
93};
94
95/**
96 * struct tb_switch_tmu - Structure holding router TMU configuration
97 * @cap: Offset to the TMU capability (%0 if not found)
98 * @has_ucap: Does the switch support uni-directional mode
99 * @mode: TMU mode related to the upstream router. Reflects the HW
100 * setting. Don't care for host router.
101 * @mode_request: TMU mode requested to set. Related to upstream router.
102 * Don't care for host router.
103 */
104struct tb_switch_tmu {
105 int cap;
106 bool has_ucap;
107 enum tb_switch_tmu_mode mode;
108 enum tb_switch_tmu_mode mode_request;
109};
110
111/**
112 * struct tb_switch - a thunderbolt switch
113 * @dev: Device for the switch
114 * @config: Switch configuration
115 * @ports: Ports in this switch
116 * @dma_port: If the switch has port supporting DMA configuration based
117 * mailbox this will hold the pointer to that (%NULL
118 * otherwise). If set it also means the switch has
119 * upgradeable NVM.
120 * @tmu: The switch TMU configuration
121 * @tb: Pointer to the domain the switch belongs to
122 * @uid: Unique ID of the switch
123 * @uuid: UUID of the switch (or %NULL if not supported)
124 * @vendor: Vendor ID of the switch
125 * @device: Device ID of the switch
126 * @vendor_name: Name of the vendor (or %NULL if not known)
127 * @device_name: Name of the device (or %NULL if not known)
128 * @link_speed: Speed of the link in Gb/s
129 * @link_width: Width of the upstream facing link
130 * @preferred_link_width: Router preferred link width (only set for Gen 4 links)
131 * @link_usb4: Upstream link is USB4
132 * @generation: Switch Thunderbolt generation
133 * @cap_plug_events: Offset to the plug events capability (%0 if not found)
134 * @cap_vsec_tmu: Offset to the TMU vendor specific capability (%0 if not found)
135 * @cap_lc: Offset to the link controller capability (%0 if not found)
136 * @cap_lp: Offset to the low power (CLx for TBT) capability (%0 if not found)
137 * @is_unplugged: The switch is going away
138 * @drom: DROM of the switch (%NULL if not found)
139 * @nvm: Pointer to the NVM if the switch has one (%NULL otherwise)
140 * @no_nvm_upgrade: Prevent NVM upgrade of this switch
141 * @safe_mode: The switch is in safe-mode
142 * @boot: Whether the switch was already authorized on boot or not
143 * @rpm: The switch supports runtime PM
144 * @authorized: Whether the switch is authorized by user or policy
145 * @security_level: Switch supported security level
146 * @debugfs_dir: Pointer to the debugfs structure
147 * @key: Contains the key used to challenge the device or %NULL if not
148 * supported. Size of the key is %TB_SWITCH_KEY_SIZE.
149 * @connection_id: Connection ID used with ICM messaging
150 * @connection_key: Connection key used with ICM messaging
151 * @link: Root switch link this switch is connected (ICM only)
152 * @depth: Depth in the chain this switch is connected (ICM only)
153 * @rpm_complete: Completion used to wait for runtime resume to
154 * complete (ICM only)
155 * @quirks: Quirks used for this Thunderbolt switch
156 * @credit_allocation: Are the below buffer allocation parameters valid
157 * @max_usb3_credits: Router preferred number of buffers for USB 3.x
158 * @min_dp_aux_credits: Router preferred minimum number of buffers for DP AUX
159 * @min_dp_main_credits: Router preferred minimum number of buffers for DP MAIN
160 * @max_pcie_credits: Router preferred number of buffers for PCIe
161 * @max_dma_credits: Router preferred number of buffers for DMA/P2P
162 * @clx: CLx states on the upstream link of the router
163 *
164 * When the switch is being added or removed to the domain (other
165 * switches) you need to have domain lock held.
166 *
167 * In USB4 terminology this structure represents a router.
168 */
169struct tb_switch {
170 struct device dev;
171 struct tb_regs_switch_header config;
172 struct tb_port *ports;
173 struct tb_dma_port *dma_port;
174 struct tb_switch_tmu tmu;
175 struct tb *tb;
176 u64 uid;
177 uuid_t *uuid;
178 u16 vendor;
179 u16 device;
180 const char *vendor_name;
181 const char *device_name;
182 unsigned int link_speed;
183 enum tb_link_width link_width;
184 enum tb_link_width preferred_link_width;
185 bool link_usb4;
186 unsigned int generation;
187 int cap_plug_events;
188 int cap_vsec_tmu;
189 int cap_lc;
190 int cap_lp;
191 bool is_unplugged;
192 u8 *drom;
193 struct tb_nvm *nvm;
194 bool no_nvm_upgrade;
195 bool safe_mode;
196 bool boot;
197 bool rpm;
198 unsigned int authorized;
199 enum tb_security_level security_level;
200 struct dentry *debugfs_dir;
201 u8 *key;
202 u8 connection_id;
203 u8 connection_key;
204 u8 link;
205 u8 depth;
206 struct completion rpm_complete;
207 unsigned long quirks;
208 bool credit_allocation;
209 unsigned int max_usb3_credits;
210 unsigned int min_dp_aux_credits;
211 unsigned int min_dp_main_credits;
212 unsigned int max_pcie_credits;
213 unsigned int max_dma_credits;
214 unsigned int clx;
215};
216
217/**
218 * struct tb_bandwidth_group - Bandwidth management group
219 * @tb: Pointer to the domain the group belongs to
220 * @index: Index of the group (aka Group_ID). Valid values %1-%7
221 * @ports: DP IN adapters belonging to this group are linked here
222 * @reserved: Bandwidth released by one tunnel in the group, available
223 * to others. This is reported as part of estimated_bw for
224 * the group.
225 * @release_work: Worker to release the @reserved if it is not used by
226 * any of the tunnels.
227 *
228 * Any tunnel that requires isochronous bandwidth (that's DP for now) is
229 * attached to a bandwidth group. All tunnels going through the same
230 * USB4 links share the same group and can dynamically distribute the
231 * bandwidth within the group.
232 */
233struct tb_bandwidth_group {
234 struct tb *tb;
235 int index;
236 struct list_head ports;
237 int reserved;
238 struct delayed_work release_work;
239};
240
241/**
242 * struct tb_port - a thunderbolt port, part of a tb_switch
243 * @config: Cached port configuration read from registers
244 * @sw: Switch the port belongs to
245 * @remote: Remote port (%NULL if not connected)
246 * @xdomain: Remote host (%NULL if not connected)
247 * @cap_phy: Offset, zero if not found
248 * @cap_tmu: Offset of the adapter specific TMU capability (%0 if not present)
249 * @cap_adap: Offset of the adapter specific capability (%0 if not present)
250 * @cap_usb4: Offset to the USB4 port capability (%0 if not present)
251 * @usb4: Pointer to the USB4 port structure (only if @cap_usb4 is != %0)
252 * @port: Port number on switch
253 * @disabled: Disabled by eeprom or enabled but not implemented
254 * @bonded: true if the port is bonded (two lanes combined as one)
255 * @dual_link_port: If the switch is connected using two ports, points
256 * to the other port.
257 * @link_nr: Is this primary or secondary port on the dual_link.
258 * @in_hopids: Currently allocated input HopIDs
259 * @out_hopids: Currently allocated output HopIDs
260 * @list: Used to link ports to DP resources list
261 * @total_credits: Total number of buffers available for this port
262 * @ctl_credits: Buffers reserved for control path
263 * @dma_credits: Number of credits allocated for DMA tunneling for all
264 * DMA paths through this port.
265 * @group: Bandwidth allocation group the adapter is assigned to. Only
266 * used for DP IN adapters for now.
267 * @group_list: The adapter is linked to the group's list of ports through this
268 * @max_bw: Maximum possible bandwidth through this adapter if set to
269 * non-zero.
270 * @redrive: For DP IN, if true the adapter is in redrive mode.
271 *
272 * In USB4 terminology this structure represents an adapter (protocol or
273 * lane adapter).
274 */
275struct tb_port {
276 struct tb_regs_port_header config;
277 struct tb_switch *sw;
278 struct tb_port *remote;
279 struct tb_xdomain *xdomain;
280 int cap_phy;
281 int cap_tmu;
282 int cap_adap;
283 int cap_usb4;
284 struct usb4_port *usb4;
285 u8 port;
286 bool disabled;
287 bool bonded;
288 struct tb_port *dual_link_port;
289 u8 link_nr:1;
290 struct ida in_hopids;
291 struct ida out_hopids;
292 struct list_head list;
293 unsigned int total_credits;
294 unsigned int ctl_credits;
295 unsigned int dma_credits;
296 struct tb_bandwidth_group *group;
297 struct list_head group_list;
298 unsigned int max_bw;
299 bool redrive;
300};
301
302/**
303 * struct usb4_port - USB4 port device
304 * @dev: Device for the port
305 * @port: Pointer to the lane 0 adapter
306 * @can_offline: Does the port have necessary platform support to moved
307 * it into offline mode and back
308 * @offline: The port is currently in offline mode
309 * @margining: Pointer to margining structure if enabled
310 */
311struct usb4_port {
312 struct device dev;
313 struct tb_port *port;
314 bool can_offline;
315 bool offline;
316#ifdef CONFIG_USB4_DEBUGFS_MARGINING
317 struct tb_margining *margining;
318#endif
319};
320
321/**
322 * tb_retimer: Thunderbolt retimer
323 * @dev: Device for the retimer
324 * @tb: Pointer to the domain the retimer belongs to
325 * @index: Retimer index facing the router USB4 port
326 * @vendor: Vendor ID of the retimer
327 * @device: Device ID of the retimer
328 * @port: Pointer to the lane 0 adapter
329 * @nvm: Pointer to the NVM if the retimer has one (%NULL otherwise)
330 * @no_nvm_upgrade: Prevent NVM upgrade of this retimer
331 * @auth_status: Status of last NVM authentication
332 */
333struct tb_retimer {
334 struct device dev;
335 struct tb *tb;
336 u8 index;
337 u32 vendor;
338 u32 device;
339 struct tb_port *port;
340 struct tb_nvm *nvm;
341 bool no_nvm_upgrade;
342 u32 auth_status;
343};
344
345/**
346 * struct tb_path_hop - routing information for a tb_path
347 * @in_port: Ingress port of a switch
348 * @out_port: Egress port of a switch where the packet is routed out
349 * (must be on the same switch than @in_port)
350 * @in_hop_index: HopID where the path configuration entry is placed in
351 * the path config space of @in_port.
352 * @in_counter_index: Used counter index (not used in the driver
353 * currently, %-1 to disable)
354 * @next_hop_index: HopID of the packet when it is routed out from @out_port
355 * @initial_credits: Number of initial flow control credits allocated for
356 * the path
357 * @nfc_credits: Number of non-flow controlled buffers allocated for the
358 * @in_port.
359 * @pm_support: Set path PM packet support bit to 1 (for USB4 v2 routers)
360 *
361 * Hop configuration is always done on the IN port of a switch.
362 * in_port and out_port have to be on the same switch. Packets arriving on
363 * in_port with "hop" = in_hop_index will get routed to through out_port. The
364 * next hop to take (on out_port->remote) is determined by
365 * next_hop_index. When routing packet to another switch (out->remote is
366 * set) the @next_hop_index must match the @in_hop_index of that next
367 * hop to make routing possible.
368 *
369 * in_counter_index is the index of a counter (in TB_CFG_COUNTERS) on the in
370 * port.
371 */
372struct tb_path_hop {
373 struct tb_port *in_port;
374 struct tb_port *out_port;
375 int in_hop_index;
376 int in_counter_index;
377 int next_hop_index;
378 unsigned int initial_credits;
379 unsigned int nfc_credits;
380 bool pm_support;
381};
382
383/**
384 * enum tb_path_port - path options mask
385 * @TB_PATH_NONE: Do not activate on any hop on path
386 * @TB_PATH_SOURCE: Activate on the first hop (out of src)
387 * @TB_PATH_INTERNAL: Activate on the intermediate hops (not the first/last)
388 * @TB_PATH_DESTINATION: Activate on the last hop (into dst)
389 * @TB_PATH_ALL: Activate on all hops on the path
390 */
391enum tb_path_port {
392 TB_PATH_NONE = 0,
393 TB_PATH_SOURCE = 1,
394 TB_PATH_INTERNAL = 2,
395 TB_PATH_DESTINATION = 4,
396 TB_PATH_ALL = 7,
397};
398
399/**
400 * struct tb_path - a unidirectional path between two ports
401 * @tb: Pointer to the domain structure
402 * @name: Name of the path (used for debugging)
403 * @ingress_shared_buffer: Shared buffering used for ingress ports on the path
404 * @egress_shared_buffer: Shared buffering used for egress ports on the path
405 * @ingress_fc_enable: Flow control for ingress ports on the path
406 * @egress_fc_enable: Flow control for egress ports on the path
407 * @priority: Priority group if the path
408 * @weight: Weight of the path inside the priority group
409 * @drop_packages: Drop packages from queue tail or head
410 * @activated: Is the path active
411 * @clear_fc: Clear all flow control from the path config space entries
412 * when deactivating this path
413 * @hops: Path hops
414 * @path_length: How many hops the path uses
415 * @alloc_hopid: Does this path consume port HopID
416 *
417 * A path consists of a number of hops (see &struct tb_path_hop). To
418 * establish a PCIe tunnel two paths have to be created between the two
419 * PCIe ports.
420 */
421struct tb_path {
422 struct tb *tb;
423 const char *name;
424 enum tb_path_port ingress_shared_buffer;
425 enum tb_path_port egress_shared_buffer;
426 enum tb_path_port ingress_fc_enable;
427 enum tb_path_port egress_fc_enable;
428
429 unsigned int priority:3;
430 int weight:4;
431 bool drop_packages;
432 bool activated;
433 bool clear_fc;
434 struct tb_path_hop *hops;
435 int path_length;
436 bool alloc_hopid;
437};
438
439/* HopIDs 0-7 are reserved by the Thunderbolt protocol */
440#define TB_PATH_MIN_HOPID 8
441/*
442 * Support paths from the farthest (depth 6) router to the host and back
443 * to the same level (not necessarily to the same router).
444 */
445#define TB_PATH_MAX_HOPS (7 * 2)
446
447/* Possible wake types */
448#define TB_WAKE_ON_CONNECT BIT(0)
449#define TB_WAKE_ON_DISCONNECT BIT(1)
450#define TB_WAKE_ON_USB4 BIT(2)
451#define TB_WAKE_ON_USB3 BIT(3)
452#define TB_WAKE_ON_PCIE BIT(4)
453#define TB_WAKE_ON_DP BIT(5)
454
455/* CL states */
456#define TB_CL0S BIT(0)
457#define TB_CL1 BIT(1)
458#define TB_CL2 BIT(2)
459
460/**
461 * struct tb_cm_ops - Connection manager specific operations vector
462 * @driver_ready: Called right after control channel is started. Used by
463 * ICM to send driver ready message to the firmware.
464 * @start: Starts the domain
465 * @stop: Stops the domain
466 * @deinit: Perform any cleanup after the domain is stopped but before
467 * it is unregistered. Called without @tb->lock taken. Optional.
468 * @suspend_noirq: Connection manager specific suspend_noirq
469 * @resume_noirq: Connection manager specific resume_noirq
470 * @suspend: Connection manager specific suspend
471 * @freeze_noirq: Connection manager specific freeze_noirq
472 * @thaw_noirq: Connection manager specific thaw_noirq
473 * @complete: Connection manager specific complete
474 * @runtime_suspend: Connection manager specific runtime_suspend
475 * @runtime_resume: Connection manager specific runtime_resume
476 * @runtime_suspend_switch: Runtime suspend a switch
477 * @runtime_resume_switch: Runtime resume a switch
478 * @handle_event: Handle thunderbolt event
479 * @get_boot_acl: Get boot ACL list
480 * @set_boot_acl: Set boot ACL list
481 * @disapprove_switch: Disapprove switch (disconnect PCIe tunnel)
482 * @approve_switch: Approve switch
483 * @add_switch_key: Add key to switch
484 * @challenge_switch_key: Challenge switch using key
485 * @disconnect_pcie_paths: Disconnects PCIe paths before NVM update
486 * @approve_xdomain_paths: Approve (establish) XDomain DMA paths
487 * @disconnect_xdomain_paths: Disconnect XDomain DMA paths
488 * @usb4_switch_op: Optional proxy for USB4 router operations. If set
489 * this will be called whenever USB4 router operation is
490 * performed. If this returns %-EOPNOTSUPP then the
491 * native USB4 router operation is called.
492 * @usb4_switch_nvm_authenticate_status: Optional callback that the CM
493 * implementation can be used to
494 * return status of USB4 NVM_AUTH
495 * router operation.
496 */
497struct tb_cm_ops {
498 int (*driver_ready)(struct tb *tb);
499 int (*start)(struct tb *tb, bool reset);
500 void (*stop)(struct tb *tb);
501 void (*deinit)(struct tb *tb);
502 int (*suspend_noirq)(struct tb *tb);
503 int (*resume_noirq)(struct tb *tb);
504 int (*suspend)(struct tb *tb);
505 int (*freeze_noirq)(struct tb *tb);
506 int (*thaw_noirq)(struct tb *tb);
507 void (*complete)(struct tb *tb);
508 int (*runtime_suspend)(struct tb *tb);
509 int (*runtime_resume)(struct tb *tb);
510 int (*runtime_suspend_switch)(struct tb_switch *sw);
511 int (*runtime_resume_switch)(struct tb_switch *sw);
512 void (*handle_event)(struct tb *tb, enum tb_cfg_pkg_type,
513 const void *buf, size_t size);
514 int (*get_boot_acl)(struct tb *tb, uuid_t *uuids, size_t nuuids);
515 int (*set_boot_acl)(struct tb *tb, const uuid_t *uuids, size_t nuuids);
516 int (*disapprove_switch)(struct tb *tb, struct tb_switch *sw);
517 int (*approve_switch)(struct tb *tb, struct tb_switch *sw);
518 int (*add_switch_key)(struct tb *tb, struct tb_switch *sw);
519 int (*challenge_switch_key)(struct tb *tb, struct tb_switch *sw,
520 const u8 *challenge, u8 *response);
521 int (*disconnect_pcie_paths)(struct tb *tb);
522 int (*approve_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd,
523 int transmit_path, int transmit_ring,
524 int receive_path, int receive_ring);
525 int (*disconnect_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd,
526 int transmit_path, int transmit_ring,
527 int receive_path, int receive_ring);
528 int (*usb4_switch_op)(struct tb_switch *sw, u16 opcode, u32 *metadata,
529 u8 *status, const void *tx_data, size_t tx_data_len,
530 void *rx_data, size_t rx_data_len);
531 int (*usb4_switch_nvm_authenticate_status)(struct tb_switch *sw,
532 u32 *status);
533};
534
535static inline void *tb_priv(struct tb *tb)
536{
537 return (void *)tb->privdata;
538}
539
540#define TB_AUTOSUSPEND_DELAY 15000 /* ms */
541
542/* helper functions & macros */
543
544/**
545 * tb_upstream_port() - return the upstream port of a switch
546 *
547 * Every switch has an upstream port (for the root switch it is the NHI).
548 *
549 * During switch alloc/init tb_upstream_port()->remote may be NULL, even for
550 * non root switches (on the NHI port remote is always NULL).
551 *
552 * Return: Returns the upstream port of the switch.
553 */
554static inline struct tb_port *tb_upstream_port(struct tb_switch *sw)
555{
556 return &sw->ports[sw->config.upstream_port_number];
557}
558
559/**
560 * tb_is_upstream_port() - Is the port upstream facing
561 * @port: Port to check
562 *
563 * Returns true if @port is upstream facing port. In case of dual link
564 * ports both return true.
565 */
566static inline bool tb_is_upstream_port(const struct tb_port *port)
567{
568 const struct tb_port *upstream_port = tb_upstream_port(port->sw);
569 return port == upstream_port || port->dual_link_port == upstream_port;
570}
571
572static inline u64 tb_route(const struct tb_switch *sw)
573{
574 return ((u64) sw->config.route_hi) << 32 | sw->config.route_lo;
575}
576
577static inline struct tb_port *tb_port_at(u64 route, struct tb_switch *sw)
578{
579 u8 port;
580
581 port = route >> (sw->config.depth * 8);
582 if (WARN_ON(port > sw->config.max_port_number))
583 return NULL;
584 return &sw->ports[port];
585}
586
587static inline const char *tb_width_name(enum tb_link_width width)
588{
589 switch (width) {
590 case TB_LINK_WIDTH_SINGLE:
591 return "symmetric, single lane";
592 case TB_LINK_WIDTH_DUAL:
593 return "symmetric, dual lanes";
594 case TB_LINK_WIDTH_ASYM_TX:
595 return "asymmetric, 3 transmitters, 1 receiver";
596 case TB_LINK_WIDTH_ASYM_RX:
597 return "asymmetric, 3 receivers, 1 transmitter";
598 default:
599 return "unknown";
600 }
601}
602
603/**
604 * tb_port_has_remote() - Does the port have switch connected downstream
605 * @port: Port to check
606 *
607 * Returns true only when the port is primary port and has remote set.
608 */
609static inline bool tb_port_has_remote(const struct tb_port *port)
610{
611 if (tb_is_upstream_port(port))
612 return false;
613 if (!port->remote)
614 return false;
615 if (port->dual_link_port && port->link_nr)
616 return false;
617
618 return true;
619}
620
621static inline bool tb_port_is_null(const struct tb_port *port)
622{
623 return port && port->port && port->config.type == TB_TYPE_PORT;
624}
625
626static inline bool tb_port_is_nhi(const struct tb_port *port)
627{
628 return port && port->config.type == TB_TYPE_NHI;
629}
630
631static inline bool tb_port_is_pcie_down(const struct tb_port *port)
632{
633 return port && port->config.type == TB_TYPE_PCIE_DOWN;
634}
635
636static inline bool tb_port_is_pcie_up(const struct tb_port *port)
637{
638 return port && port->config.type == TB_TYPE_PCIE_UP;
639}
640
641static inline bool tb_port_is_dpin(const struct tb_port *port)
642{
643 return port && port->config.type == TB_TYPE_DP_HDMI_IN;
644}
645
646static inline bool tb_port_is_dpout(const struct tb_port *port)
647{
648 return port && port->config.type == TB_TYPE_DP_HDMI_OUT;
649}
650
651static inline bool tb_port_is_usb3_down(const struct tb_port *port)
652{
653 return port && port->config.type == TB_TYPE_USB3_DOWN;
654}
655
656static inline bool tb_port_is_usb3_up(const struct tb_port *port)
657{
658 return port && port->config.type == TB_TYPE_USB3_UP;
659}
660
661static inline int tb_sw_read(struct tb_switch *sw, void *buffer,
662 enum tb_cfg_space space, u32 offset, u32 length)
663{
664 if (sw->is_unplugged)
665 return -ENODEV;
666 return tb_cfg_read(sw->tb->ctl,
667 buffer,
668 tb_route(sw),
669 0,
670 space,
671 offset,
672 length);
673}
674
675static inline int tb_sw_write(struct tb_switch *sw, const void *buffer,
676 enum tb_cfg_space space, u32 offset, u32 length)
677{
678 if (sw->is_unplugged)
679 return -ENODEV;
680 return tb_cfg_write(sw->tb->ctl,
681 buffer,
682 tb_route(sw),
683 0,
684 space,
685 offset,
686 length);
687}
688
689static inline int tb_port_read(struct tb_port *port, void *buffer,
690 enum tb_cfg_space space, u32 offset, u32 length)
691{
692 if (port->sw->is_unplugged)
693 return -ENODEV;
694 return tb_cfg_read(port->sw->tb->ctl,
695 buffer,
696 tb_route(port->sw),
697 port->port,
698 space,
699 offset,
700 length);
701}
702
703static inline int tb_port_write(struct tb_port *port, const void *buffer,
704 enum tb_cfg_space space, u32 offset, u32 length)
705{
706 if (port->sw->is_unplugged)
707 return -ENODEV;
708 return tb_cfg_write(port->sw->tb->ctl,
709 buffer,
710 tb_route(port->sw),
711 port->port,
712 space,
713 offset,
714 length);
715}
716
717#define tb_err(tb, fmt, arg...) dev_err(&(tb)->nhi->pdev->dev, fmt, ## arg)
718#define tb_WARN(tb, fmt, arg...) dev_WARN(&(tb)->nhi->pdev->dev, fmt, ## arg)
719#define tb_warn(tb, fmt, arg...) dev_warn(&(tb)->nhi->pdev->dev, fmt, ## arg)
720#define tb_info(tb, fmt, arg...) dev_info(&(tb)->nhi->pdev->dev, fmt, ## arg)
721#define tb_dbg(tb, fmt, arg...) dev_dbg(&(tb)->nhi->pdev->dev, fmt, ## arg)
722
723#define __TB_SW_PRINT(level, sw, fmt, arg...) \
724 do { \
725 const struct tb_switch *__sw = (sw); \
726 level(__sw->tb, "%llx: " fmt, \
727 tb_route(__sw), ## arg); \
728 } while (0)
729#define tb_sw_WARN(sw, fmt, arg...) __TB_SW_PRINT(tb_WARN, sw, fmt, ##arg)
730#define tb_sw_warn(sw, fmt, arg...) __TB_SW_PRINT(tb_warn, sw, fmt, ##arg)
731#define tb_sw_info(sw, fmt, arg...) __TB_SW_PRINT(tb_info, sw, fmt, ##arg)
732#define tb_sw_dbg(sw, fmt, arg...) __TB_SW_PRINT(tb_dbg, sw, fmt, ##arg)
733
734#define __TB_PORT_PRINT(level, _port, fmt, arg...) \
735 do { \
736 const struct tb_port *__port = (_port); \
737 level(__port->sw->tb, "%llx:%u: " fmt, \
738 tb_route(__port->sw), __port->port, ## arg); \
739 } while (0)
740#define tb_port_WARN(port, fmt, arg...) \
741 __TB_PORT_PRINT(tb_WARN, port, fmt, ##arg)
742#define tb_port_warn(port, fmt, arg...) \
743 __TB_PORT_PRINT(tb_warn, port, fmt, ##arg)
744#define tb_port_info(port, fmt, arg...) \
745 __TB_PORT_PRINT(tb_info, port, fmt, ##arg)
746#define tb_port_dbg(port, fmt, arg...) \
747 __TB_PORT_PRINT(tb_dbg, port, fmt, ##arg)
748
749struct tb *icm_probe(struct tb_nhi *nhi);
750struct tb *tb_probe(struct tb_nhi *nhi);
751
752extern const struct device_type tb_domain_type;
753extern const struct device_type tb_retimer_type;
754extern const struct device_type tb_switch_type;
755extern const struct device_type usb4_port_device_type;
756
757int tb_domain_init(void);
758void tb_domain_exit(void);
759int tb_xdomain_init(void);
760void tb_xdomain_exit(void);
761
762struct tb *tb_domain_alloc(struct tb_nhi *nhi, int timeout_msec, size_t privsize);
763int tb_domain_add(struct tb *tb, bool reset);
764void tb_domain_remove(struct tb *tb);
765int tb_domain_suspend_noirq(struct tb *tb);
766int tb_domain_resume_noirq(struct tb *tb);
767int tb_domain_suspend(struct tb *tb);
768int tb_domain_freeze_noirq(struct tb *tb);
769int tb_domain_thaw_noirq(struct tb *tb);
770void tb_domain_complete(struct tb *tb);
771int tb_domain_runtime_suspend(struct tb *tb);
772int tb_domain_runtime_resume(struct tb *tb);
773int tb_domain_disapprove_switch(struct tb *tb, struct tb_switch *sw);
774int tb_domain_approve_switch(struct tb *tb, struct tb_switch *sw);
775int tb_domain_approve_switch_key(struct tb *tb, struct tb_switch *sw);
776int tb_domain_challenge_switch_key(struct tb *tb, struct tb_switch *sw);
777int tb_domain_disconnect_pcie_paths(struct tb *tb);
778int tb_domain_approve_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
779 int transmit_path, int transmit_ring,
780 int receive_path, int receive_ring);
781int tb_domain_disconnect_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
782 int transmit_path, int transmit_ring,
783 int receive_path, int receive_ring);
784int tb_domain_disconnect_all_paths(struct tb *tb);
785
786static inline struct tb *tb_domain_get(struct tb *tb)
787{
788 if (tb)
789 get_device(&tb->dev);
790 return tb;
791}
792
793static inline void tb_domain_put(struct tb *tb)
794{
795 put_device(&tb->dev);
796}
797
798struct tb_nvm *tb_nvm_alloc(struct device *dev);
799int tb_nvm_read_version(struct tb_nvm *nvm);
800int tb_nvm_validate(struct tb_nvm *nvm);
801int tb_nvm_write_headers(struct tb_nvm *nvm);
802int tb_nvm_add_active(struct tb_nvm *nvm, nvmem_reg_read_t reg_read);
803int tb_nvm_write_buf(struct tb_nvm *nvm, unsigned int offset, void *val,
804 size_t bytes);
805int tb_nvm_add_non_active(struct tb_nvm *nvm, nvmem_reg_write_t reg_write);
806void tb_nvm_free(struct tb_nvm *nvm);
807void tb_nvm_exit(void);
808
809typedef int (*read_block_fn)(void *, unsigned int, void *, size_t);
810typedef int (*write_block_fn)(void *, unsigned int, const void *, size_t);
811
812int tb_nvm_read_data(unsigned int address, void *buf, size_t size,
813 unsigned int retries, read_block_fn read_block,
814 void *read_block_data);
815int tb_nvm_write_data(unsigned int address, const void *buf, size_t size,
816 unsigned int retries, write_block_fn write_next_block,
817 void *write_block_data);
818
819int tb_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
820 size_t size);
821struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent,
822 u64 route);
823struct tb_switch *tb_switch_alloc_safe_mode(struct tb *tb,
824 struct device *parent, u64 route);
825int tb_switch_configure(struct tb_switch *sw);
826int tb_switch_configuration_valid(struct tb_switch *sw);
827int tb_switch_add(struct tb_switch *sw);
828void tb_switch_remove(struct tb_switch *sw);
829void tb_switch_suspend(struct tb_switch *sw, bool runtime);
830int tb_switch_resume(struct tb_switch *sw, bool runtime);
831int tb_switch_reset(struct tb_switch *sw);
832int tb_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
833 u32 value, int timeout_msec);
834void tb_sw_set_unplugged(struct tb_switch *sw);
835struct tb_port *tb_switch_find_port(struct tb_switch *sw,
836 enum tb_port_type type);
837struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link,
838 u8 depth);
839struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid);
840struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route);
841
842/**
843 * tb_switch_for_each_port() - Iterate over each switch port
844 * @sw: Switch whose ports to iterate
845 * @p: Port used as iterator
846 *
847 * Iterates over each switch port skipping the control port (port %0).
848 */
849#define tb_switch_for_each_port(sw, p) \
850 for ((p) = &(sw)->ports[1]; \
851 (p) <= &(sw)->ports[(sw)->config.max_port_number]; (p)++)
852
853static inline struct tb_switch *tb_switch_get(struct tb_switch *sw)
854{
855 if (sw)
856 get_device(&sw->dev);
857 return sw;
858}
859
860static inline void tb_switch_put(struct tb_switch *sw)
861{
862 put_device(&sw->dev);
863}
864
865static inline bool tb_is_switch(const struct device *dev)
866{
867 return dev->type == &tb_switch_type;
868}
869
870static inline struct tb_switch *tb_to_switch(const struct device *dev)
871{
872 if (tb_is_switch(dev))
873 return container_of(dev, struct tb_switch, dev);
874 return NULL;
875}
876
877static inline struct tb_switch *tb_switch_parent(struct tb_switch *sw)
878{
879 return tb_to_switch(sw->dev.parent);
880}
881
882/**
883 * tb_switch_downstream_port() - Return downstream facing port of parent router
884 * @sw: Device router pointer
885 *
886 * Only call for device routers. Returns the downstream facing port of
887 * the parent router.
888 */
889static inline struct tb_port *tb_switch_downstream_port(struct tb_switch *sw)
890{
891 if (WARN_ON(!tb_route(sw)))
892 return NULL;
893 return tb_port_at(tb_route(sw), tb_switch_parent(sw));
894}
895
896/**
897 * tb_switch_depth() - Returns depth of the connected router
898 * @sw: Router
899 */
900static inline int tb_switch_depth(const struct tb_switch *sw)
901{
902 return sw->config.depth;
903}
904
905static inline bool tb_switch_is_light_ridge(const struct tb_switch *sw)
906{
907 return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
908 sw->config.device_id == PCI_DEVICE_ID_INTEL_LIGHT_RIDGE;
909}
910
911static inline bool tb_switch_is_eagle_ridge(const struct tb_switch *sw)
912{
913 return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
914 sw->config.device_id == PCI_DEVICE_ID_INTEL_EAGLE_RIDGE;
915}
916
917static inline bool tb_switch_is_cactus_ridge(const struct tb_switch *sw)
918{
919 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
920 switch (sw->config.device_id) {
921 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C:
922 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C:
923 return true;
924 }
925 }
926 return false;
927}
928
929static inline bool tb_switch_is_falcon_ridge(const struct tb_switch *sw)
930{
931 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
932 switch (sw->config.device_id) {
933 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE:
934 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE:
935 return true;
936 }
937 }
938 return false;
939}
940
941static inline bool tb_switch_is_alpine_ridge(const struct tb_switch *sw)
942{
943 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
944 switch (sw->config.device_id) {
945 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE:
946 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE:
947 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE:
948 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE:
949 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE:
950 return true;
951 }
952 }
953 return false;
954}
955
956static inline bool tb_switch_is_titan_ridge(const struct tb_switch *sw)
957{
958 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
959 switch (sw->config.device_id) {
960 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE:
961 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE:
962 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE:
963 return true;
964 }
965 }
966 return false;
967}
968
969static inline bool tb_switch_is_tiger_lake(const struct tb_switch *sw)
970{
971 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
972 switch (sw->config.device_id) {
973 case PCI_DEVICE_ID_INTEL_TGL_NHI0:
974 case PCI_DEVICE_ID_INTEL_TGL_NHI1:
975 case PCI_DEVICE_ID_INTEL_TGL_H_NHI0:
976 case PCI_DEVICE_ID_INTEL_TGL_H_NHI1:
977 return true;
978 }
979 }
980 return false;
981}
982
983/**
984 * tb_switch_is_icm() - Is the switch handled by ICM firmware
985 * @sw: Switch to check
986 *
987 * In case there is a need to differentiate whether ICM firmware or SW CM
988 * is handling @sw this function can be called. It is valid to call this
989 * after tb_switch_alloc() and tb_switch_configure() has been called
990 * (latter only for SW CM case).
991 */
992static inline bool tb_switch_is_icm(const struct tb_switch *sw)
993{
994 return !sw->config.enabled;
995}
996
997int tb_switch_set_link_width(struct tb_switch *sw, enum tb_link_width width);
998int tb_switch_configure_link(struct tb_switch *sw);
999void tb_switch_unconfigure_link(struct tb_switch *sw);
1000
1001bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
1002int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1003void tb_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1004
1005int tb_switch_tmu_init(struct tb_switch *sw);
1006int tb_switch_tmu_post_time(struct tb_switch *sw);
1007int tb_switch_tmu_disable(struct tb_switch *sw);
1008int tb_switch_tmu_enable(struct tb_switch *sw);
1009int tb_switch_tmu_configure(struct tb_switch *sw, enum tb_switch_tmu_mode mode);
1010
1011/**
1012 * tb_switch_tmu_is_configured() - Is given TMU mode configured
1013 * @sw: Router whose mode to check
1014 * @mode: Mode to check
1015 *
1016 * Checks if given router TMU mode is configured to @mode. Note the
1017 * router TMU might not be enabled to this mode.
1018 */
1019static inline bool tb_switch_tmu_is_configured(const struct tb_switch *sw,
1020 enum tb_switch_tmu_mode mode)
1021{
1022 return sw->tmu.mode_request == mode;
1023}
1024
1025/**
1026 * tb_switch_tmu_is_enabled() - Checks if the specified TMU mode is enabled
1027 * @sw: Router whose TMU mode to check
1028 *
1029 * Return true if hardware TMU configuration matches the requested
1030 * configuration (and is not %TB_SWITCH_TMU_MODE_OFF).
1031 */
1032static inline bool tb_switch_tmu_is_enabled(const struct tb_switch *sw)
1033{
1034 return sw->tmu.mode != TB_SWITCH_TMU_MODE_OFF &&
1035 sw->tmu.mode == sw->tmu.mode_request;
1036}
1037
1038bool tb_port_clx_is_enabled(struct tb_port *port, unsigned int clx);
1039
1040int tb_switch_clx_init(struct tb_switch *sw);
1041int tb_switch_clx_enable(struct tb_switch *sw, unsigned int clx);
1042int tb_switch_clx_disable(struct tb_switch *sw);
1043
1044/**
1045 * tb_switch_clx_is_enabled() - Checks if the CLx is enabled
1046 * @sw: Router to check for the CLx
1047 * @clx: The CLx states to check for
1048 *
1049 * Checks if the specified CLx is enabled on the router upstream link.
1050 * Returns true if any of the given states is enabled.
1051 *
1052 * Not applicable for a host router.
1053 */
1054static inline bool tb_switch_clx_is_enabled(const struct tb_switch *sw,
1055 unsigned int clx)
1056{
1057 return sw->clx & clx;
1058}
1059
1060int tb_switch_pcie_l1_enable(struct tb_switch *sw);
1061
1062int tb_switch_xhci_connect(struct tb_switch *sw);
1063void tb_switch_xhci_disconnect(struct tb_switch *sw);
1064
1065int tb_port_state(struct tb_port *port);
1066int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged);
1067int tb_port_add_nfc_credits(struct tb_port *port, int credits);
1068int tb_port_clear_counter(struct tb_port *port, int counter);
1069int tb_port_unlock(struct tb_port *port);
1070int tb_port_enable(struct tb_port *port);
1071int tb_port_disable(struct tb_port *port);
1072int tb_port_alloc_in_hopid(struct tb_port *port, int hopid, int max_hopid);
1073void tb_port_release_in_hopid(struct tb_port *port, int hopid);
1074int tb_port_alloc_out_hopid(struct tb_port *port, int hopid, int max_hopid);
1075void tb_port_release_out_hopid(struct tb_port *port, int hopid);
1076struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end,
1077 struct tb_port *prev);
1078
1079/**
1080 * tb_port_path_direction_downstream() - Checks if path directed downstream
1081 * @src: Source adapter
1082 * @dst: Destination adapter
1083 *
1084 * Returns %true only if the specified path from source adapter (@src)
1085 * to destination adapter (@dst) is directed downstream.
1086 */
1087static inline bool
1088tb_port_path_direction_downstream(const struct tb_port *src,
1089 const struct tb_port *dst)
1090{
1091 return src->sw->config.depth < dst->sw->config.depth;
1092}
1093
1094static inline bool tb_port_use_credit_allocation(const struct tb_port *port)
1095{
1096 return tb_port_is_null(port) && port->sw->credit_allocation;
1097}
1098
1099/**
1100 * tb_for_each_port_on_path() - Iterate over each port on path
1101 * @src: Source port
1102 * @dst: Destination port
1103 * @p: Port used as iterator
1104 *
1105 * Walks over each port on path from @src to @dst.
1106 */
1107#define tb_for_each_port_on_path(src, dst, p) \
1108 for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \
1109 (p) = tb_next_port_on_path((src), (dst), (p)))
1110
1111/**
1112 * tb_for_each_upstream_port_on_path() - Iterate over each upstreamm port on path
1113 * @src: Source port
1114 * @dst: Destination port
1115 * @p: Port used as iterator
1116 *
1117 * Walks over each upstream lane adapter on path from @src to @dst.
1118 */
1119#define tb_for_each_upstream_port_on_path(src, dst, p) \
1120 for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \
1121 (p) = tb_next_port_on_path((src), (dst), (p))) \
1122 if (!tb_port_is_null((p)) || !tb_is_upstream_port((p))) {\
1123 continue; \
1124 } else
1125
1126int tb_port_get_link_speed(struct tb_port *port);
1127int tb_port_get_link_generation(struct tb_port *port);
1128int tb_port_get_link_width(struct tb_port *port);
1129bool tb_port_width_supported(struct tb_port *port, unsigned int width);
1130int tb_port_set_link_width(struct tb_port *port, enum tb_link_width width);
1131int tb_port_lane_bonding_enable(struct tb_port *port);
1132void tb_port_lane_bonding_disable(struct tb_port *port);
1133int tb_port_wait_for_link_width(struct tb_port *port, unsigned int width,
1134 int timeout_msec);
1135int tb_port_update_credits(struct tb_port *port);
1136
1137int tb_switch_find_vse_cap(struct tb_switch *sw, enum tb_switch_vse_cap vsec);
1138int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap);
1139int tb_switch_next_cap(struct tb_switch *sw, unsigned int offset);
1140int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap);
1141int tb_port_next_cap(struct tb_port *port, unsigned int offset);
1142bool tb_port_is_enabled(struct tb_port *port);
1143
1144bool tb_usb3_port_is_enabled(struct tb_port *port);
1145int tb_usb3_port_enable(struct tb_port *port, bool enable);
1146
1147bool tb_pci_port_is_enabled(struct tb_port *port);
1148int tb_pci_port_enable(struct tb_port *port, bool enable);
1149
1150int tb_dp_port_hpd_is_active(struct tb_port *port);
1151int tb_dp_port_hpd_clear(struct tb_port *port);
1152int tb_dp_port_set_hops(struct tb_port *port, unsigned int video,
1153 unsigned int aux_tx, unsigned int aux_rx);
1154bool tb_dp_port_is_enabled(struct tb_port *port);
1155int tb_dp_port_enable(struct tb_port *port, bool enable);
1156
1157struct tb_path *tb_path_discover(struct tb_port *src, int src_hopid,
1158 struct tb_port *dst, int dst_hopid,
1159 struct tb_port **last, const char *name,
1160 bool alloc_hopid);
1161struct tb_path *tb_path_alloc(struct tb *tb, struct tb_port *src, int src_hopid,
1162 struct tb_port *dst, int dst_hopid, int link_nr,
1163 const char *name);
1164void tb_path_free(struct tb_path *path);
1165int tb_path_activate(struct tb_path *path);
1166void tb_path_deactivate(struct tb_path *path);
1167int tb_path_deactivate_hop(struct tb_port *port, int hop_index);
1168bool tb_path_is_invalid(struct tb_path *path);
1169bool tb_path_port_on_path(const struct tb_path *path,
1170 const struct tb_port *port);
1171
1172/**
1173 * tb_path_for_each_hop() - Iterate over each hop on path
1174 * @path: Path whose hops to iterate
1175 * @hop: Hop used as iterator
1176 *
1177 * Iterates over each hop on path.
1178 */
1179#define tb_path_for_each_hop(path, hop) \
1180 for ((hop) = &(path)->hops[0]; \
1181 (hop) <= &(path)->hops[(path)->path_length - 1]; (hop)++)
1182
1183int tb_drom_read(struct tb_switch *sw);
1184int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid);
1185
1186int tb_lc_read_uuid(struct tb_switch *sw, u32 *uuid);
1187int tb_lc_reset_port(struct tb_port *port);
1188int tb_lc_configure_port(struct tb_port *port);
1189void tb_lc_unconfigure_port(struct tb_port *port);
1190int tb_lc_configure_xdomain(struct tb_port *port);
1191void tb_lc_unconfigure_xdomain(struct tb_port *port);
1192int tb_lc_start_lane_initialization(struct tb_port *port);
1193bool tb_lc_is_clx_supported(struct tb_port *port);
1194bool tb_lc_is_usb_plugged(struct tb_port *port);
1195bool tb_lc_is_xhci_connected(struct tb_port *port);
1196int tb_lc_xhci_connect(struct tb_port *port);
1197void tb_lc_xhci_disconnect(struct tb_port *port);
1198int tb_lc_set_wake(struct tb_switch *sw, unsigned int flags);
1199int tb_lc_set_sleep(struct tb_switch *sw);
1200bool tb_lc_lane_bonding_possible(struct tb_switch *sw);
1201bool tb_lc_dp_sink_query(struct tb_switch *sw, struct tb_port *in);
1202int tb_lc_dp_sink_alloc(struct tb_switch *sw, struct tb_port *in);
1203int tb_lc_dp_sink_dealloc(struct tb_switch *sw, struct tb_port *in);
1204int tb_lc_force_power(struct tb_switch *sw);
1205
1206static inline int tb_route_length(u64 route)
1207{
1208 return (fls64(route) + TB_ROUTE_SHIFT - 1) / TB_ROUTE_SHIFT;
1209}
1210
1211/**
1212 * tb_downstream_route() - get route to downstream switch
1213 *
1214 * Port must not be the upstream port (otherwise a loop is created).
1215 *
1216 * Return: Returns a route to the switch behind @port.
1217 */
1218static inline u64 tb_downstream_route(struct tb_port *port)
1219{
1220 return tb_route(port->sw)
1221 | ((u64) port->port << (port->sw->config.depth * 8));
1222}
1223
1224bool tb_is_xdomain_enabled(void);
1225bool tb_xdomain_handle_request(struct tb *tb, enum tb_cfg_pkg_type type,
1226 const void *buf, size_t size);
1227struct tb_xdomain *tb_xdomain_alloc(struct tb *tb, struct device *parent,
1228 u64 route, const uuid_t *local_uuid,
1229 const uuid_t *remote_uuid);
1230void tb_xdomain_add(struct tb_xdomain *xd);
1231void tb_xdomain_remove(struct tb_xdomain *xd);
1232struct tb_xdomain *tb_xdomain_find_by_link_depth(struct tb *tb, u8 link,
1233 u8 depth);
1234
1235static inline struct tb_switch *tb_xdomain_parent(struct tb_xdomain *xd)
1236{
1237 return tb_to_switch(xd->dev.parent);
1238}
1239
1240/**
1241 * tb_xdomain_downstream_port() - Return downstream facing port of parent router
1242 * @xd: Xdomain pointer
1243 *
1244 * Returns the downstream port the XDomain is connected to.
1245 */
1246static inline struct tb_port *tb_xdomain_downstream_port(struct tb_xdomain *xd)
1247{
1248 return tb_port_at(xd->route, tb_xdomain_parent(xd));
1249}
1250
1251int tb_retimer_nvm_read(struct tb_retimer *rt, unsigned int address, void *buf,
1252 size_t size);
1253int tb_retimer_scan(struct tb_port *port, bool add);
1254void tb_retimer_remove_all(struct tb_port *port);
1255
1256static inline bool tb_is_retimer(const struct device *dev)
1257{
1258 return dev->type == &tb_retimer_type;
1259}
1260
1261static inline struct tb_retimer *tb_to_retimer(struct device *dev)
1262{
1263 if (tb_is_retimer(dev))
1264 return container_of(dev, struct tb_retimer, dev);
1265 return NULL;
1266}
1267
1268/**
1269 * usb4_switch_version() - Returns USB4 version of the router
1270 * @sw: Router to check
1271 *
1272 * Returns major version of USB4 router (%1 for v1, %2 for v2 and so
1273 * on). Can be called to pre-USB4 router too and in that case returns %0.
1274 */
1275static inline unsigned int usb4_switch_version(const struct tb_switch *sw)
1276{
1277 return FIELD_GET(USB4_VERSION_MAJOR_MASK, sw->config.thunderbolt_version);
1278}
1279
1280/**
1281 * tb_switch_is_usb4() - Is the switch USB4 compliant
1282 * @sw: Switch to check
1283 *
1284 * Returns true if the @sw is USB4 compliant router, false otherwise.
1285 */
1286static inline bool tb_switch_is_usb4(const struct tb_switch *sw)
1287{
1288 return usb4_switch_version(sw) > 0;
1289}
1290
1291void usb4_switch_check_wakes(struct tb_switch *sw);
1292int usb4_switch_setup(struct tb_switch *sw);
1293int usb4_switch_configuration_valid(struct tb_switch *sw);
1294int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid);
1295int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
1296 size_t size);
1297bool usb4_switch_lane_bonding_possible(struct tb_switch *sw);
1298int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags);
1299int usb4_switch_set_sleep(struct tb_switch *sw);
1300int usb4_switch_nvm_sector_size(struct tb_switch *sw);
1301int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
1302 size_t size);
1303int usb4_switch_nvm_set_offset(struct tb_switch *sw, unsigned int address);
1304int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
1305 const void *buf, size_t size);
1306int usb4_switch_nvm_authenticate(struct tb_switch *sw);
1307int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status);
1308int usb4_switch_credits_init(struct tb_switch *sw);
1309bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
1310int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1311int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1312struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
1313 const struct tb_port *port);
1314struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
1315 const struct tb_port *port);
1316int usb4_switch_add_ports(struct tb_switch *sw);
1317void usb4_switch_remove_ports(struct tb_switch *sw);
1318
1319int usb4_port_unlock(struct tb_port *port);
1320int usb4_port_hotplug_enable(struct tb_port *port);
1321int usb4_port_reset(struct tb_port *port);
1322int usb4_port_configure(struct tb_port *port);
1323void usb4_port_unconfigure(struct tb_port *port);
1324int usb4_port_configure_xdomain(struct tb_port *port, struct tb_xdomain *xd);
1325void usb4_port_unconfigure_xdomain(struct tb_port *port);
1326int usb4_port_router_offline(struct tb_port *port);
1327int usb4_port_router_online(struct tb_port *port);
1328int usb4_port_enumerate_retimers(struct tb_port *port);
1329bool usb4_port_clx_supported(struct tb_port *port);
1330int usb4_port_margining_caps(struct tb_port *port, u32 *caps);
1331
1332bool usb4_port_asym_supported(struct tb_port *port);
1333int usb4_port_asym_set_link_width(struct tb_port *port, enum tb_link_width width);
1334int usb4_port_asym_start(struct tb_port *port);
1335
1336int usb4_port_hw_margin(struct tb_port *port, unsigned int lanes,
1337 unsigned int ber_level, bool timing, bool right_high,
1338 u32 *results);
1339int usb4_port_sw_margin(struct tb_port *port, unsigned int lanes, bool timing,
1340 bool right_high, u32 counter);
1341int usb4_port_sw_margin_errors(struct tb_port *port, u32 *errors);
1342
1343int usb4_port_retimer_set_inbound_sbtx(struct tb_port *port, u8 index);
1344int usb4_port_retimer_unset_inbound_sbtx(struct tb_port *port, u8 index);
1345int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1346 u8 size);
1347int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1348 const void *buf, u8 size);
1349int usb4_port_retimer_is_last(struct tb_port *port, u8 index);
1350int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index);
1351int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1352 unsigned int address);
1353int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index,
1354 unsigned int address, const void *buf,
1355 size_t size);
1356int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index);
1357int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1358 u32 *status);
1359int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1360 unsigned int address, void *buf, size_t size);
1361
1362int usb4_usb3_port_max_link_rate(struct tb_port *port);
1363int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
1364 int *downstream_bw);
1365int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
1366 int *downstream_bw);
1367int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
1368 int *downstream_bw);
1369
1370int usb4_dp_port_set_cm_id(struct tb_port *port, int cm_id);
1371bool usb4_dp_port_bandwidth_mode_supported(struct tb_port *port);
1372bool usb4_dp_port_bandwidth_mode_enabled(struct tb_port *port);
1373int usb4_dp_port_set_cm_bandwidth_mode_supported(struct tb_port *port,
1374 bool supported);
1375int usb4_dp_port_group_id(struct tb_port *port);
1376int usb4_dp_port_set_group_id(struct tb_port *port, int group_id);
1377int usb4_dp_port_nrd(struct tb_port *port, int *rate, int *lanes);
1378int usb4_dp_port_set_nrd(struct tb_port *port, int rate, int lanes);
1379int usb4_dp_port_granularity(struct tb_port *port);
1380int usb4_dp_port_set_granularity(struct tb_port *port, int granularity);
1381int usb4_dp_port_set_estimated_bandwidth(struct tb_port *port, int bw);
1382int usb4_dp_port_allocated_bandwidth(struct tb_port *port);
1383int usb4_dp_port_allocate_bandwidth(struct tb_port *port, int bw);
1384int usb4_dp_port_requested_bandwidth(struct tb_port *port);
1385
1386int usb4_pci_port_set_ext_encapsulation(struct tb_port *port, bool enable);
1387
1388static inline bool tb_is_usb4_port_device(const struct device *dev)
1389{
1390 return dev->type == &usb4_port_device_type;
1391}
1392
1393static inline struct usb4_port *tb_to_usb4_port_device(struct device *dev)
1394{
1395 if (tb_is_usb4_port_device(dev))
1396 return container_of(dev, struct usb4_port, dev);
1397 return NULL;
1398}
1399
1400struct usb4_port *usb4_port_device_add(struct tb_port *port);
1401void usb4_port_device_remove(struct usb4_port *usb4);
1402int usb4_port_device_resume(struct usb4_port *usb4);
1403
1404static inline bool usb4_port_device_is_offline(const struct usb4_port *usb4)
1405{
1406 return usb4->offline;
1407}
1408
1409void tb_check_quirks(struct tb_switch *sw);
1410
1411#ifdef CONFIG_ACPI
1412bool tb_acpi_add_links(struct tb_nhi *nhi);
1413
1414bool tb_acpi_is_native(void);
1415bool tb_acpi_may_tunnel_usb3(void);
1416bool tb_acpi_may_tunnel_dp(void);
1417bool tb_acpi_may_tunnel_pcie(void);
1418bool tb_acpi_is_xdomain_allowed(void);
1419
1420int tb_acpi_init(void);
1421void tb_acpi_exit(void);
1422int tb_acpi_power_on_retimers(struct tb_port *port);
1423int tb_acpi_power_off_retimers(struct tb_port *port);
1424#else
1425static inline bool tb_acpi_add_links(struct tb_nhi *nhi) { return false; }
1426
1427static inline bool tb_acpi_is_native(void) { return true; }
1428static inline bool tb_acpi_may_tunnel_usb3(void) { return true; }
1429static inline bool tb_acpi_may_tunnel_dp(void) { return true; }
1430static inline bool tb_acpi_may_tunnel_pcie(void) { return true; }
1431static inline bool tb_acpi_is_xdomain_allowed(void) { return true; }
1432
1433static inline int tb_acpi_init(void) { return 0; }
1434static inline void tb_acpi_exit(void) { }
1435static inline int tb_acpi_power_on_retimers(struct tb_port *port) { return 0; }
1436static inline int tb_acpi_power_off_retimers(struct tb_port *port) { return 0; }
1437#endif
1438
1439#ifdef CONFIG_DEBUG_FS
1440void tb_debugfs_init(void);
1441void tb_debugfs_exit(void);
1442void tb_switch_debugfs_init(struct tb_switch *sw);
1443void tb_switch_debugfs_remove(struct tb_switch *sw);
1444void tb_xdomain_debugfs_init(struct tb_xdomain *xd);
1445void tb_xdomain_debugfs_remove(struct tb_xdomain *xd);
1446void tb_service_debugfs_init(struct tb_service *svc);
1447void tb_service_debugfs_remove(struct tb_service *svc);
1448#else
1449static inline void tb_debugfs_init(void) { }
1450static inline void tb_debugfs_exit(void) { }
1451static inline void tb_switch_debugfs_init(struct tb_switch *sw) { }
1452static inline void tb_switch_debugfs_remove(struct tb_switch *sw) { }
1453static inline void tb_xdomain_debugfs_init(struct tb_xdomain *xd) { }
1454static inline void tb_xdomain_debugfs_remove(struct tb_xdomain *xd) { }
1455static inline void tb_service_debugfs_init(struct tb_service *svc) { }
1456static inline void tb_service_debugfs_remove(struct tb_service *svc) { }
1457#endif
1458
1459#endif