1/*
   2 * Copyright (c) 2008-2011 Atheros Communications Inc.
   3 *
   4 * Permission to use, copy, modify, and/or distribute this software for any
   5 * purpose with or without fee is hereby granted, provided that the above
   6 * copyright notice and this permission notice appear in all copies.
   7 *
   8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15 */
  16
  17#ifndef ATH9K_H
  18#define ATH9K_H
  19
  20#include <linux/etherdevice.h>
  21#include <linux/device.h>
  22#include <linux/interrupt.h>
  23#include <linux/kstrtox.h>
  24#include <linux/leds.h>
  25#include <linux/completion.h>
  26#include <linux/time.h>
  27#include <linux/hw_random.h>
  28
  29#include "common.h"
  30#include "debug.h"
  31#include "mci.h"
  32#include "dfs.h"
  33
  34struct ath_node;
  35struct ath_vif;
  36
  37extern struct ieee80211_ops ath9k_ops;
  38extern int ath9k_modparam_nohwcrypt;
  39extern int ath9k_led_blink;
  40extern bool is_ath9k_unloaded;
  41extern int ath9k_use_chanctx;
  42
  43/*************************/
  44/* Descriptor Management */
  45/*************************/
  46
  47#define ATH_TXSTATUS_RING_SIZE 512
  48
  49/* Macro to expand scalars to 64-bit objects */
  50#define	ito64(x) (sizeof(x) == 1) ?			\
  51	(((unsigned long long int)(x)) & (0xff)) :	\
  52	(sizeof(x) == 2) ?				\
  53	(((unsigned long long int)(x)) & 0xffff) :	\
  54	((sizeof(x) == 4) ?				\
  55	 (((unsigned long long int)(x)) & 0xffffffff) : \
  56	 (unsigned long long int)(x))
  57
  58#define ATH_TXBUF_RESET(_bf) do {				\
  59		(_bf)->bf_lastbf = NULL;			\
  60		(_bf)->bf_next = NULL;				\
  61		memset(&((_bf)->bf_state), 0,			\
  62		       sizeof(struct ath_buf_state));		\
  63	} while (0)
  64
  65#define	DS2PHYS(_dd, _ds)						\
  66	((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
  67#define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
  68#define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
  69
  70struct ath_descdma {
  71	void *dd_desc;
  72	dma_addr_t dd_desc_paddr;
  73	u32 dd_desc_len;
  74};
  75
  76int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
  77		      struct list_head *head, const char *name,
  78		      int nbuf, int ndesc, bool is_tx);
  79
  80/***********/
  81/* RX / TX */
  82/***********/
  83
  84#define	ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
  85
  86/* increment with wrap-around */
  87#define INCR(_l, _sz)   do {			\
  88		(_l)++;				\
  89		(_l) &= ((_sz) - 1);		\
  90	} while (0)
  91
  92#define ATH_RXBUF               512
  93#define ATH_TXBUF               512
  94#define ATH_TXBUF_RESERVE       5
  95#define ATH_TXMAXTRY            13
  96#define ATH_MAX_SW_RETRIES      30
  97
  98#define TID_TO_WME_AC(_tid)				\
  99	((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE :	\
 100	 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK :	\
 101	 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI :	\
 102	 IEEE80211_AC_VO)
 103
 104#define ATH_AGGR_DELIM_SZ          4
 105#define ATH_AGGR_MINPLEN           256 /* in bytes, minimum packet length */
 106/* number of delimiters for encryption padding */
 107#define ATH_AGGR_ENCRYPTDELIM      10
 108/* minimum h/w qdepth to be sustained to maximize aggregation */
 109#define ATH_AGGR_MIN_QDEPTH        2
 110/* minimum h/w qdepth for non-aggregated traffic */
 111#define ATH_NON_AGGR_MIN_QDEPTH    8
 112#define ATH_HW_CHECK_POLL_INT      1000
 113#define ATH_TXFIFO_DEPTH           8
 114#define ATH_TX_ERROR               0x01
 115
 116/* Stop tx traffic 1ms before the GO goes away */
 117#define ATH_P2P_PS_STOP_TIME       1000
 118
 119#define IEEE80211_SEQ_SEQ_SHIFT    4
 120#define IEEE80211_SEQ_MAX          4096
 121#define IEEE80211_WEP_IVLEN        3
 122#define IEEE80211_WEP_KIDLEN       1
 123#define IEEE80211_WEP_CRCLEN       4
 124#define IEEE80211_MAX_MPDU_LEN     (3840 + FCS_LEN +		\
 125				    (IEEE80211_WEP_IVLEN +	\
 126				     IEEE80211_WEP_KIDLEN +	\
 127				     IEEE80211_WEP_CRCLEN))
 128
 129/* return whether a bit at index _n in bitmap _bm is set
 130 * _sz is the size of the bitmap  */
 131#define ATH_BA_ISSET(_bm, _n)  (((_n) < (WME_BA_BMP_SIZE)) &&		\
 132				((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
 133
 134/* return block-ack bitmap index given sequence and starting sequence */
 135#define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
 136
 137/* return the seqno for _start + _offset */
 138#define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1))
 139
 140/* returns delimiter padding required given the packet length */
 141#define ATH_AGGR_GET_NDELIM(_len)					\
 142       (((_len) >= ATH_AGGR_MINPLEN) ? 0 :                             \
 143        DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
 144
 145#define BAW_WITHIN(_start, _bawsz, _seqno) \
 146	((((_seqno) - (_start)) & 4095) < (_bawsz))
 147
 148#define ATH_AN_2_TID(_an, _tidno) ath_node_to_tid(_an, _tidno)
 149
 150#define IS_HT_RATE(rate)   (rate & 0x80)
 151#define IS_CCK_RATE(rate)  ((rate >= 0x18) && (rate <= 0x1e))
 152#define IS_OFDM_RATE(rate) ((rate >= 0x8) && (rate <= 0xf))
 153
 154enum {
 155       WLAN_RC_PHY_OFDM,
 156       WLAN_RC_PHY_CCK,
 157};
 158
 159struct ath_txq {
 160	int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
 161	u32 axq_qnum; /* ath9k hardware queue number */
 162	void *axq_link;
 163	struct list_head axq_q;
 164	spinlock_t axq_lock;
 165	u32 axq_depth;
 166	u32 axq_ampdu_depth;
 167	bool axq_tx_inprogress;
 168	struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
 169	u8 txq_headidx;
 170	u8 txq_tailidx;
 171	int pending_frames;
 172	struct sk_buff_head complete_q;
 173};
 174
 175struct ath_frame_info {
 176	struct ath_buf *bf;
 177	u16 framelen;
 178	s8 txq;
 179	u8 keyix;
 180	u8 rtscts_rate;
 181	u8 retries : 6;
 182	u8 dyn_smps : 1;
 183	u8 baw_tracked : 1;
 184	u8 tx_power;
 185	enum ath9k_key_type keytype:2;
 186};
 187
 188struct ath_rxbuf {
 189	struct list_head list;
 190	struct sk_buff *bf_mpdu;
 191	void *bf_desc;
 192	dma_addr_t bf_daddr;
 193	dma_addr_t bf_buf_addr;
 194};
 195
 196/**
 197 * enum buffer_type - Buffer type flags
 198 *
 199 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
 200 * @BUF_AGGR: Indicates whether the buffer can be aggregated
 201 *	(used in aggregation scheduling)
 202 */
 203enum buffer_type {
 204	BUF_AMPDU		= BIT(0),
 205	BUF_AGGR		= BIT(1),
 206};
 207
 208#define bf_isampdu(bf)		(bf->bf_state.bf_type & BUF_AMPDU)
 209#define bf_isaggr(bf)		(bf->bf_state.bf_type & BUF_AGGR)
 210
 211struct ath_buf_state {
 212	u8 bf_type;
 213	u8 bfs_paprd;
 214	u8 ndelim;
 215	bool stale;
 216	u16 seqno;
 217	unsigned long bfs_paprd_timestamp;
 218};
 219
 220struct ath_buf {
 221	struct list_head list;
 222	struct ath_buf *bf_lastbf;	/* last buf of this unit (a frame or
 223					   an aggregate) */
 224	struct ath_buf *bf_next;	/* next subframe in the aggregate */
 225	struct sk_buff *bf_mpdu;	/* enclosing frame structure */
 226	void *bf_desc;			/* virtual addr of desc */
 227	dma_addr_t bf_daddr;		/* physical addr of desc */
 228	dma_addr_t bf_buf_addr;	/* physical addr of data buffer, for DMA */
 229	struct ieee80211_tx_rate rates[4];
 230	struct ath_buf_state bf_state;
 231};
 232
 233struct ath_atx_tid {
 234	struct list_head list;
 235	struct sk_buff_head retry_q;
 236	struct ath_node *an;
 237	struct ath_txq *txq;
 238	unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
 239	u16 seq_start;
 240	u16 seq_next;
 241	u16 baw_size;
 242	u8 tidno;
 243	int baw_head;   /* first un-acked tx buffer */
 244	int baw_tail;   /* next unused tx buffer slot */
 245
 246	s8 bar_index;
 247	bool active;
 248	bool clear_ps_filter;
 249};
 250
 251void ath_tx_queue_tid(struct ath_softc *sc, struct ath_atx_tid *tid);
 252
 253struct ath_node {
 254	struct ath_softc *sc;
 255	struct ieee80211_sta *sta; /* station struct we're part of */
 256	struct ieee80211_vif *vif; /* interface with which we're associated */
 257
 258	u16 maxampdu;
 259	u8 mpdudensity;
 260	s8 ps_key;
 261
 262	bool sleeping;
 263	bool no_ps_filter;
 264
 265#ifdef CONFIG_ATH9K_STATION_STATISTICS
 266	struct ath_rx_rate_stats rx_rate_stats;
 267#endif
 268	u8 key_idx[4];
 269
 270	int ackto;
 271	struct list_head list;
 272};
 273
 274struct ath_tx_control {
 275	struct ath_txq *txq;
 276	struct ath_node *an;
 277	struct ieee80211_sta *sta;
 278	u8 paprd;
 279};
 280
 281
 282/**
 283 * @txq_map:  Index is mac80211 queue number.  This is
 284 *  not necessarily the same as the hardware queue number
 285 *  (axq_qnum).
 286 */
 287struct ath_tx {
 288	u32 txqsetup;
 289	spinlock_t txbuflock;
 290	struct list_head txbuf;
 291	struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
 292	struct ath_descdma txdma;
 293	struct ath_txq *txq_map[IEEE80211_NUM_ACS];
 294	struct ath_txq *uapsdq;
 295	u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32];
 296};
 297
 298struct ath_rx_edma {
 299	struct sk_buff_head rx_fifo;
 300	u32 rx_fifo_hwsize;
 301};
 302
 303struct ath_rx {
 304	u8 defant;
 305	u8 rxotherant;
 306	bool discard_next;
 307	u32 *rxlink;
 308	u32 num_pkts;
 309	struct list_head rxbuf;
 310	struct ath_descdma rxdma;
 311	struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
 312
 313	struct ath_rxbuf *buf_hold;
 314	struct sk_buff *frag;
 315
 316	u32 ampdu_ref;
 317};
 318
 319/*******************/
 320/* Channel Context */
 321/*******************/
 322
 323struct ath_acq {
 324	struct list_head acq_new;
 325	struct list_head acq_old;
 326	spinlock_t lock;
 327};
 328
 329struct ath_chanctx {
 330	struct cfg80211_chan_def chandef;
 331	struct list_head vifs;
 332	struct ath_acq acq[IEEE80211_NUM_ACS];
 333	int hw_queue_base;
 334
 335	/* do not dereference, use for comparison only */
 336	struct ieee80211_vif *primary_sta;
 337
 338	struct ath_beacon_config beacon;
 339	struct ath9k_hw_cal_data caldata;
 340	struct timespec64 tsf_ts;
 341	u64 tsf_val;
 342	u32 last_beacon;
 343
 344	int flush_timeout;
 345	u16 txpower;
 346	u16 cur_txpower;
 347	bool offchannel;
 348	bool stopped;
 349	bool active;
 350	bool assigned;
 351	bool switch_after_beacon;
 352
 353	short nvifs;
 354	short nvifs_assigned;
 355	unsigned int rxfilter;
 356};
 357
 358enum ath_chanctx_event {
 359	ATH_CHANCTX_EVENT_BEACON_PREPARE,
 360	ATH_CHANCTX_EVENT_BEACON_SENT,
 361	ATH_CHANCTX_EVENT_TSF_TIMER,
 362	ATH_CHANCTX_EVENT_BEACON_RECEIVED,
 363	ATH_CHANCTX_EVENT_AUTHORIZED,
 364	ATH_CHANCTX_EVENT_SWITCH,
 365	ATH_CHANCTX_EVENT_ASSIGN,
 366	ATH_CHANCTX_EVENT_UNASSIGN,
 367	ATH_CHANCTX_EVENT_CHANGE,
 368	ATH_CHANCTX_EVENT_ENABLE_MULTICHANNEL,
 369};
 370
 371enum ath_chanctx_state {
 372	ATH_CHANCTX_STATE_IDLE,
 373	ATH_CHANCTX_STATE_WAIT_FOR_BEACON,
 374	ATH_CHANCTX_STATE_WAIT_FOR_TIMER,
 375	ATH_CHANCTX_STATE_SWITCH,
 376	ATH_CHANCTX_STATE_FORCE_ACTIVE,
 377};
 378
 379struct ath_chanctx_sched {
 380	bool beacon_pending;
 381	bool beacon_adjust;
 382	bool offchannel_pending;
 383	bool wait_switch;
 384	bool force_noa_update;
 385	bool extend_absence;
 386	bool mgd_prepare_tx;
 387	enum ath_chanctx_state state;
 388	u8 beacon_miss;
 389
 390	u32 next_tbtt;
 391	u32 switch_start_time;
 392	unsigned int offchannel_duration;
 393	unsigned int channel_switch_time;
 394
 395	/* backup, in case the hardware timer fails */
 396	struct timer_list timer;
 397};
 398
 399enum ath_offchannel_state {
 400	ATH_OFFCHANNEL_IDLE,
 401	ATH_OFFCHANNEL_PROBE_SEND,
 402	ATH_OFFCHANNEL_PROBE_WAIT,
 403	ATH_OFFCHANNEL_SUSPEND,
 404	ATH_OFFCHANNEL_ROC_START,
 405	ATH_OFFCHANNEL_ROC_WAIT,
 406	ATH_OFFCHANNEL_ROC_DONE,
 407};
 408
 409enum ath_roc_complete_reason {
 410	ATH_ROC_COMPLETE_EXPIRE,
 411	ATH_ROC_COMPLETE_ABORT,
 412	ATH_ROC_COMPLETE_CANCEL,
 413};
 414
 415struct ath_offchannel {
 416	struct ath_chanctx chan;
 417	struct timer_list timer;
 418	struct cfg80211_scan_request *scan_req;
 419	struct ieee80211_vif *scan_vif;
 420	int scan_idx;
 421	enum ath_offchannel_state state;
 422	struct ieee80211_channel *roc_chan;
 423	struct ieee80211_vif *roc_vif;
 424	int roc_duration;
 425	int duration;
 426};
 427
 428static inline struct ath_atx_tid *
 429ath_node_to_tid(struct ath_node *an, u8 tidno)
 430{
 431	struct ieee80211_sta *sta = an->sta;
 432	struct ieee80211_vif *vif = an->vif;
 433	struct ieee80211_txq *txq;
 434
 435	BUG_ON(!vif);
 436	if (sta)
 437		txq = sta->txq[tidno % ARRAY_SIZE(sta->txq)];
 438	else
 439		txq = vif->txq;
 440
 441	return (struct ath_atx_tid *) txq->drv_priv;
 442}
 443
 444#define case_rtn_string(val) case val: return #val
 445
 446#define ath_for_each_chanctx(_sc, _ctx)                             \
 447	for (ctx = &sc->chanctx[0];                                 \
 448	     ctx <= &sc->chanctx[ARRAY_SIZE(sc->chanctx) - 1];      \
 449	     ctx++)
 450
 451void ath_chanctx_init(struct ath_softc *sc);
 452void ath_chanctx_set_channel(struct ath_softc *sc, struct ath_chanctx *ctx,
 453			     struct cfg80211_chan_def *chandef);
 454
 455#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
 456
 457static inline struct ath_chanctx *
 458ath_chanctx_get(struct ieee80211_chanctx_conf *ctx)
 459{
 460	struct ath_chanctx **ptr = (void *) ctx->drv_priv;
 461	return *ptr;
 462}
 463
 464bool ath9k_is_chanctx_enabled(void);
 465void ath9k_fill_chanctx_ops(void);
 466void ath9k_init_channel_context(struct ath_softc *sc);
 467void ath9k_offchannel_init(struct ath_softc *sc);
 468void ath9k_deinit_channel_context(struct ath_softc *sc);
 469int ath9k_init_p2p(struct ath_softc *sc);
 470void ath9k_deinit_p2p(struct ath_softc *sc);
 471void ath9k_p2p_remove_vif(struct ath_softc *sc,
 472			  struct ieee80211_vif *vif);
 473void ath9k_p2p_beacon_sync(struct ath_softc *sc);
 474void ath9k_p2p_bss_info_changed(struct ath_softc *sc,
 475				struct ieee80211_vif *vif);
 476void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp,
 477			  struct sk_buff *skb);
 478void ath9k_p2p_ps_timer(void *priv);
 479void ath9k_chanctx_wake_queues(struct ath_softc *sc, struct ath_chanctx *ctx);
 480void ath9k_chanctx_stop_queues(struct ath_softc *sc, struct ath_chanctx *ctx);
 481void ath_chanctx_check_active(struct ath_softc *sc, struct ath_chanctx *ctx);
 482
 483void ath_chanctx_beacon_recv_ev(struct ath_softc *sc,
 484				enum ath_chanctx_event ev);
 485void ath_chanctx_beacon_sent_ev(struct ath_softc *sc,
 486				enum ath_chanctx_event ev);
 487void ath_chanctx_event(struct ath_softc *sc, struct ieee80211_vif *vif,
 488		       enum ath_chanctx_event ev);
 489void ath_chanctx_set_next(struct ath_softc *sc, bool force);
 490void ath_offchannel_next(struct ath_softc *sc);
 491void ath_scan_complete(struct ath_softc *sc, bool abort);
 492void ath_roc_complete(struct ath_softc *sc,
 493		      enum ath_roc_complete_reason reason);
 494struct ath_chanctx* ath_is_go_chanctx_present(struct ath_softc *sc);
 495
 496#else
 497
 498static inline bool ath9k_is_chanctx_enabled(void)
 499{
 500	return false;
 501}
 502static inline void ath9k_fill_chanctx_ops(void)
 503{
 504}
 505static inline void ath9k_init_channel_context(struct ath_softc *sc)
 506{
 507}
 508static inline void ath9k_offchannel_init(struct ath_softc *sc)
 509{
 510}
 511static inline void ath9k_deinit_channel_context(struct ath_softc *sc)
 512{
 513}
 514static inline void ath_chanctx_beacon_recv_ev(struct ath_softc *sc,
 515					      enum ath_chanctx_event ev)
 516{
 517}
 518static inline void ath_chanctx_beacon_sent_ev(struct ath_softc *sc,
 519					      enum ath_chanctx_event ev)
 520{
 521}
 522static inline void ath_chanctx_event(struct ath_softc *sc,
 523				     struct ieee80211_vif *vif,
 524				     enum ath_chanctx_event ev)
 525{
 526}
 527static inline int ath9k_init_p2p(struct ath_softc *sc)
 528{
 529	return 0;
 530}
 531static inline void ath9k_deinit_p2p(struct ath_softc *sc)
 532{
 533}
 534static inline void ath9k_p2p_remove_vif(struct ath_softc *sc,
 535					struct ieee80211_vif *vif)
 536{
 537}
 538static inline void ath9k_p2p_beacon_sync(struct ath_softc *sc)
 539{
 540}
 541static inline void ath9k_p2p_bss_info_changed(struct ath_softc *sc,
 542					      struct ieee80211_vif *vif)
 543{
 544}
 545static inline void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp,
 546					struct sk_buff *skb)
 547{
 548}
 549static inline void ath9k_p2p_ps_timer(struct ath_softc *sc)
 550{
 551}
 552static inline void ath9k_chanctx_wake_queues(struct ath_softc *sc,
 553					     struct ath_chanctx *ctx)
 554{
 555}
 556static inline void ath9k_chanctx_stop_queues(struct ath_softc *sc,
 557					     struct ath_chanctx *ctx)
 558{
 559}
 560static inline void ath_chanctx_check_active(struct ath_softc *sc,
 561					    struct ath_chanctx *ctx)
 562{
 563}
 564
 565#endif /* CONFIG_ATH9K_CHANNEL_CONTEXT */
 566
 567static inline void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq)
 568{
 569	spin_lock_bh(&txq->axq_lock);
 570}
 571static inline void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq)
 572{
 573	spin_unlock_bh(&txq->axq_lock);
 574}
 575
 576void ath_startrecv(struct ath_softc *sc);
 577bool ath_stoprecv(struct ath_softc *sc);
 578u32 ath_calcrxfilter(struct ath_softc *sc);
 579int ath_rx_init(struct ath_softc *sc, int nbufs);
 580void ath_rx_cleanup(struct ath_softc *sc);
 581int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
 582struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
 583void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
 584void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
 585bool ath_drain_all_txq(struct ath_softc *sc);
 586void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
 587void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
 588void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
 589void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
 590void ath_txq_schedule_all(struct ath_softc *sc);
 591int ath_tx_init(struct ath_softc *sc, int nbufs);
 592int ath_txq_update(struct ath_softc *sc, int qnum,
 593		   struct ath9k_tx_queue_info *q);
 594u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen,
 595		     int width, int half_gi, bool shortPreamble);
 596void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
 597void ath_assign_seq(struct ath_common *common, struct sk_buff *skb);
 598int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
 599		 struct ath_tx_control *txctl);
 600void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
 601		 struct sk_buff *skb);
 602void ath_tx_tasklet(struct ath_softc *sc);
 603void ath_tx_edma_tasklet(struct ath_softc *sc);
 604int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
 605		      u16 tid, u16 *ssn);
 606void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
 607
 608void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
 609void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
 610		       struct ath_node *an);
 611void ath9k_release_buffered_frames(struct ieee80211_hw *hw,
 612				   struct ieee80211_sta *sta,
 613				   u16 tids, int nframes,
 614				   enum ieee80211_frame_release_type reason,
 615				   bool more_data);
 616void ath9k_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *queue);
 617
 618/********/
 619/* VIFs */
 620/********/
 621
 622#define P2P_DEFAULT_CTWIN 10
 623
 624struct ath_vif {
 625	struct list_head list;
 626
 627	u16 seq_no;
 628
 629	/* BSS info */
 630	u8 bssid[ETH_ALEN] __aligned(2);
 631	u16 aid;
 632	bool assoc;
 633
 634	struct ieee80211_vif *vif;
 635	struct ath_node mcast_node;
 636	int av_bslot;
 637	__le64 tsf_adjust; /* TSF adjustment for staggered beacons */
 638	struct ath_buf *av_bcbuf;
 639	struct ath_chanctx *chanctx;
 640
 641	/* P2P Client */
 642	struct ieee80211_noa_data noa;
 643
 644	/* P2P GO */
 645	u8 noa_index;
 646	u32 offchannel_start;
 647	u32 offchannel_duration;
 648
 649	/* These are used for both periodic and one-shot */
 650	u32 noa_start;
 651	u32 noa_duration;
 652	bool periodic_noa;
 653	bool oneshot_noa;
 654};
 655
 656struct ath9k_vif_iter_data {
 657	u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */
 658	u8 mask[ETH_ALEN]; /* bssid mask */
 659	bool has_hw_macaddr;
 660	u8 slottime;
 661	bool beacons;
 662
 663	int naps;      /* number of AP vifs */
 664	int nmeshes;   /* number of mesh vifs */
 665	int nstations; /* number of station vifs */
 666	int nadhocs;   /* number of adhoc vifs */
 667	int nocbs;     /* number of OCB vifs */
 668	int nbcnvifs;  /* number of beaconing vifs */
 669	struct ieee80211_vif *primary_beacon_vif;
 670	struct ieee80211_vif *primary_sta;
 671};
 672
 673void ath9k_calculate_iter_data(struct ath_softc *sc,
 674			       struct ath_chanctx *ctx,
 675			       struct ath9k_vif_iter_data *iter_data);
 676void ath9k_calculate_summary_state(struct ath_softc *sc,
 677				   struct ath_chanctx *ctx);
 678void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif);
 679
 680/*******************/
 681/* Beacon Handling */
 682/*******************/
 683
 684/*
 685 * Regardless of the number of beacons we stagger, (i.e. regardless of the
 686 * number of BSSIDs) if a given beacon does not go out even after waiting this
 687 * number of beacon intervals, the game's up.
 688 */
 689#define BSTUCK_THRESH           	9
 690#define	ATH_BCBUF               	8
 691#define ATH_DEFAULT_BINTVAL     	100 /* TU */
 692#define ATH_DEFAULT_BMISS_LIMIT 	10
 693
 694#define TSF_TO_TU(_h,_l) \
 695	((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
 696
 697struct ath_beacon {
 698	enum {
 699		OK,		/* no change needed */
 700		UPDATE,		/* update pending */
 701		COMMIT		/* beacon sent, commit change */
 702	} updateslot;		/* slot time update fsm */
 703
 704	u32 beaconq;
 705	u32 bmisscnt;
 706	struct ieee80211_vif *bslot[ATH_BCBUF];
 707	int slottime;
 708	int slotupdate;
 709	struct ath_descdma bdma;
 710	struct ath_txq *cabq;
 711	struct list_head bbuf;
 712
 713	bool tx_processed;
 714	bool tx_last;
 715};
 716
 717void ath9k_beacon_tasklet(struct tasklet_struct *t);
 718void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *main_vif,
 719			 bool beacons);
 720void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
 721void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
 722void ath9k_beacon_ensure_primary_slot(struct ath_softc *sc);
 723void ath9k_set_beacon(struct ath_softc *sc);
 724bool ath9k_csa_is_finished(struct ath_softc *sc, struct ieee80211_vif *vif);
 725void ath9k_csa_update(struct ath_softc *sc);
 726
 727/*******************/
 728/* Link Monitoring */
 729/*******************/
 730
 731#define ATH_STA_SHORT_CALINTERVAL 1000    /* 1 second */
 732#define ATH_AP_SHORT_CALINTERVAL  100     /* 100 ms */
 733#define ATH_ANI_POLLINTERVAL_OLD  100     /* 100 ms */
 734#define ATH_ANI_POLLINTERVAL_NEW  1000    /* 1000 ms */
 735#define ATH_LONG_CALINTERVAL_INT  1000    /* 1000 ms */
 736#define ATH_LONG_CALINTERVAL      30000   /* 30 seconds */
 737#define ATH_RESTART_CALINTERVAL   1200000 /* 20 minutes */
 738#define ATH_ANI_MAX_SKIP_COUNT    10
 739#define ATH_PAPRD_TIMEOUT         100 /* msecs */
 740#define ATH_PLL_WORK_INTERVAL     100
 741
 742void ath_hw_check_work(struct work_struct *work);
 743void ath_reset_work(struct work_struct *work);
 744bool ath_hw_check(struct ath_softc *sc);
 745void ath_hw_pll_work(struct work_struct *work);
 746void ath_paprd_calibrate(struct work_struct *work);
 747void ath_ani_calibrate(struct timer_list *t);
 748void ath_start_ani(struct ath_softc *sc);
 749void ath_stop_ani(struct ath_softc *sc);
 750void ath_check_ani(struct ath_softc *sc);
 751int ath_update_survey_stats(struct ath_softc *sc);
 752void ath_update_survey_nf(struct ath_softc *sc, int channel);
 753void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
 754void ath_ps_full_sleep(struct timer_list *t);
 755void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
 756		   bool sw_pending, bool timeout_override);
 757
 758/**********/
 759/* BTCOEX */
 760/**********/
 761
 762#define ATH_DUMP_BTCOEX(_s, _val)				\
 763	do {							\
 764		len += scnprintf(buf + len, size - len,		\
 765				 "%20s : %10d\n", _s, (_val));	\
 766	} while (0)
 767
 768enum bt_op_flags {
 769	BT_OP_PRIORITY_DETECTED,
 770	BT_OP_SCAN,
 771};
 772
 773struct ath_btcoex {
 774	spinlock_t btcoex_lock;
 775	struct timer_list period_timer; /* Timer for BT period */
 776	struct timer_list no_stomp_timer;
 777	u32 bt_priority_cnt;
 778	unsigned long bt_priority_time;
 779	unsigned long op_flags;
 780	int bt_stomp_type; /* Types of BT stomping */
 781	u32 btcoex_no_stomp; /* in msec */
 782	u32 btcoex_period; /* in msec */
 783	u32 btscan_no_stomp; /* in msec */
 784	u32 duty_cycle;
 785	u32 bt_wait_time;
 786	int rssi_count;
 787	struct ath_mci_profile mci;
 788	u8 stomp_audio;
 789};
 790
 791#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 792int ath9k_init_btcoex(struct ath_softc *sc);
 793void ath9k_deinit_btcoex(struct ath_softc *sc);
 794void ath9k_start_btcoex(struct ath_softc *sc);
 795void ath9k_stop_btcoex(struct ath_softc *sc);
 796void ath9k_btcoex_timer_resume(struct ath_softc *sc);
 797void ath9k_btcoex_timer_pause(struct ath_softc *sc);
 798void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status);
 799u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen);
 800void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc);
 801int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size);
 802#else
 803static inline int ath9k_init_btcoex(struct ath_softc *sc)
 804{
 805	return 0;
 806}
 807static inline void ath9k_deinit_btcoex(struct ath_softc *sc)
 808{
 809}
 810static inline void ath9k_start_btcoex(struct ath_softc *sc)
 811{
 812}
 813static inline void ath9k_stop_btcoex(struct ath_softc *sc)
 814{
 815}
 816static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc,
 817						 u32 status)
 818{
 819}
 820static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc,
 821					  u32 max_4ms_framelen)
 822{
 823	return 0;
 824}
 825static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
 826{
 827}
 828static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
 829{
 830	return 0;
 831}
 832#endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
 833
 834/********************/
 835/*   LED Control    */
 836/********************/
 837
 838#define ATH_LED_PIN_DEF 		1
 839#define ATH_LED_PIN_9287		8
 840#define ATH_LED_PIN_9300		10
 841#define ATH_LED_PIN_9485		6
 842#define ATH_LED_PIN_9462		4
 843
 844#ifdef CONFIG_MAC80211_LEDS
 845void ath_init_leds(struct ath_softc *sc);
 846void ath_deinit_leds(struct ath_softc *sc);
 847#else
 848static inline void ath_init_leds(struct ath_softc *sc)
 849{
 850}
 851
 852static inline void ath_deinit_leds(struct ath_softc *sc)
 853{
 854}
 855#endif
 856
 857/************************/
 858/* Wake on Wireless LAN */
 859/************************/
 860
 861#ifdef CONFIG_ATH9K_WOW
 862void ath9k_init_wow(struct ieee80211_hw *hw);
 863void ath9k_deinit_wow(struct ieee80211_hw *hw);
 864int ath9k_suspend(struct ieee80211_hw *hw,
 865		  struct cfg80211_wowlan *wowlan);
 866int ath9k_resume(struct ieee80211_hw *hw);
 867void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled);
 868#else
 869static inline void ath9k_init_wow(struct ieee80211_hw *hw)
 870{
 871}
 872static inline void ath9k_deinit_wow(struct ieee80211_hw *hw)
 873{
 874}
 875static inline int ath9k_suspend(struct ieee80211_hw *hw,
 876				struct cfg80211_wowlan *wowlan)
 877{
 878	return 0;
 879}
 880static inline int ath9k_resume(struct ieee80211_hw *hw)
 881{
 882	return 0;
 883}
 884static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
 885{
 886}
 887#endif /* CONFIG_ATH9K_WOW */
 888
 889/*******************************/
 890/* Antenna diversity/combining */
 891/*******************************/
 892
 893#define ATH_ANT_RX_CURRENT_SHIFT 4
 894#define ATH_ANT_RX_MAIN_SHIFT 2
 895#define ATH_ANT_RX_MASK 0x3
 896
 897#define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
 898#define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
 899#define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
 900#define ATH_ANT_DIV_COMB_INIT_COUNT 95
 901#define ATH_ANT_DIV_COMB_MAX_COUNT 100
 902#define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
 903#define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
 904#define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50
 905#define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50
 906
 907#define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
 908#define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
 909#define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
 910
 911struct ath_ant_comb {
 912	u16 count;
 913	u16 total_pkt_count;
 914	bool scan;
 915	bool scan_not_start;
 916	int main_total_rssi;
 917	int alt_total_rssi;
 918	int alt_recv_cnt;
 919	int main_recv_cnt;
 920	int rssi_lna1;
 921	int rssi_lna2;
 922	int rssi_add;
 923	int rssi_sub;
 924	int rssi_first;
 925	int rssi_second;
 926	int rssi_third;
 927	int ant_ratio;
 928	int ant_ratio2;
 929	bool alt_good;
 930	int quick_scan_cnt;
 931	enum ath9k_ant_div_comb_lna_conf main_conf;
 932	enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
 933	enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
 934	bool first_ratio;
 935	bool second_ratio;
 936	unsigned long scan_start_time;
 937
 938	/*
 939	 * Card-specific config values.
 940	 */
 941	int low_rssi_thresh;
 942	int fast_div_bias;
 943};
 944
 945void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
 946
 947/********************/
 948/* Main driver core */
 949/********************/
 950
 951#define ATH9K_PCI_CUS198          0x0001
 952#define ATH9K_PCI_CUS230          0x0002
 953#define ATH9K_PCI_CUS217          0x0004
 954#define ATH9K_PCI_CUS252          0x0008
 955#define ATH9K_PCI_WOW             0x0010
 956#define ATH9K_PCI_BT_ANT_DIV      0x0020
 957#define ATH9K_PCI_D3_L1_WAR       0x0040
 958#define ATH9K_PCI_AR9565_1ANT     0x0080
 959#define ATH9K_PCI_AR9565_2ANT     0x0100
 960#define ATH9K_PCI_NO_PLL_PWRSAVE  0x0200
 961#define ATH9K_PCI_KILLER          0x0400
 962#define ATH9K_PCI_LED_ACT_HI      0x0800
 963
 964/*
 965 * Default cache line size, in bytes.
 966 * Used when PCI device not fully initialized by bootrom/BIOS
 967*/
 968#define DEFAULT_CACHELINE       32
 969#define ATH_CABQ_READY_TIME     80      /* % of beacon interval */
 970#define ATH_TXPOWER_MAX         100     /* .5 dBm units */
 971#define MAX_GTT_CNT             5
 972
 973/* Powersave flags */
 974#define PS_WAIT_FOR_BEACON        BIT(0)
 975#define PS_WAIT_FOR_CAB           BIT(1)
 976#define PS_WAIT_FOR_PSPOLL_DATA   BIT(2)
 977#define PS_WAIT_FOR_TX_ACK        BIT(3)
 978#define PS_BEACON_SYNC            BIT(4)
 979#define PS_WAIT_FOR_ANI           BIT(5)
 980
 981#define ATH9K_NUM_CHANCTX  2 /* supports 2 operating channels */
 982
 983struct ath_softc {
 984	struct ieee80211_hw *hw;
 985	struct device *dev;
 986
 987	struct survey_info *cur_survey;
 988	struct survey_info survey[ATH9K_NUM_CHANNELS];
 989
 990	spinlock_t intr_lock;
 991	struct tasklet_struct intr_tq;
 992	struct tasklet_struct bcon_tasklet;
 993	struct ath_hw *sc_ah;
 994	void __iomem *mem;
 995	int irq;
 996	spinlock_t sc_serial_rw;
 997	spinlock_t sc_pm_lock;
 998	spinlock_t sc_pcu_lock;
 999	struct mutex mutex;
1000	struct work_struct paprd_work;
1001	struct work_struct hw_reset_work;
1002	struct completion paprd_complete;
1003	wait_queue_head_t tx_wait;
1004
1005#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1006	struct work_struct chanctx_work;
1007	struct ath_gen_timer *p2p_ps_timer;
1008	struct ath_vif *p2p_ps_vif;
1009	struct ath_chanctx_sched sched;
1010	struct ath_offchannel offchannel;
1011	struct ath_chanctx *next_chan;
1012	struct completion go_beacon;
1013	struct timespec64 last_event_time;
1014#endif
1015
1016	unsigned long driver_data;
1017
1018	u8 gtt_cnt;
1019	u32 intrstatus;
1020	u16 ps_flags; /* PS_* */
1021	bool ps_enabled;
1022	bool ps_idle;
1023	short nbcnvifs;
1024	unsigned long ps_usecount;
1025
1026	struct ath_rx rx;
1027	struct ath_tx tx;
1028	struct ath_beacon beacon;
1029
1030	struct cfg80211_chan_def cur_chandef;
1031	struct ath_chanctx chanctx[ATH9K_NUM_CHANCTX];
1032	struct ath_chanctx *cur_chan;
1033	spinlock_t chan_lock;
1034
1035#ifdef CONFIG_MAC80211_LEDS
1036	bool led_registered;
1037	char led_name[32];
1038	struct led_classdev led_cdev;
1039#endif
1040
1041#ifdef CONFIG_ATH9K_DEBUGFS
1042	struct ath9k_debug debug;
1043#endif
1044	struct delayed_work hw_check_work;
1045	struct delayed_work hw_pll_work;
1046	struct timer_list sleep_timer;
1047
1048#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
1049	struct ath_btcoex btcoex;
1050	struct ath_mci_coex mci_coex;
1051	struct work_struct mci_work;
1052#endif
1053
1054	struct ath_descdma txsdma;
1055
1056	struct ath_ant_comb ant_comb;
1057	u8 ant_tx, ant_rx;
1058	struct dfs_pattern_detector *dfs_detector;
1059	u64 dfs_prev_pulse_ts;
1060	u32 wow_enabled;
1061
1062	struct ath_spec_scan_priv spec_priv;
1063
1064	struct ieee80211_vif *tx99_vif;
1065	struct sk_buff *tx99_skb;
1066	bool tx99_state;
1067	s16 tx99_power;
1068
1069#ifdef CONFIG_ATH9K_WOW
1070	u32 wow_intr_before_sleep;
1071	bool force_wow;
1072#endif
1073
1074#ifdef CONFIG_ATH9K_HWRNG
1075	struct hwrng rng_ops;
1076	u32 rng_last;
1077	char rng_name[sizeof("ath9k_65535")];
1078#endif
1079};
1080
1081/********/
1082/* TX99 */
1083/********/
1084
1085#ifdef CONFIG_ATH9K_TX99
1086void ath9k_tx99_init_debug(struct ath_softc *sc);
1087int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
1088		    struct ath_tx_control *txctl);
1089#else
1090static inline void ath9k_tx99_init_debug(struct ath_softc *sc)
1091{
1092}
1093static inline int ath9k_tx99_send(struct ath_softc *sc,
1094				  struct sk_buff *skb,
1095				  struct ath_tx_control *txctl)
1096{
1097	return 0;
1098}
1099#endif /* CONFIG_ATH9K_TX99 */
1100
1101/***************************/
1102/* Random Number Generator */
1103/***************************/
1104#ifdef CONFIG_ATH9K_HWRNG
1105void ath9k_rng_start(struct ath_softc *sc);
1106void ath9k_rng_stop(struct ath_softc *sc);
1107#else
1108static inline void ath9k_rng_start(struct ath_softc *sc)
1109{
1110}
1111
1112static inline void ath9k_rng_stop(struct ath_softc *sc)
1113{
1114}
1115#endif
1116
1117static inline void ath_read_cachesize(struct ath_common *common, int *csz)
1118{
1119	common->bus_ops->read_cachesize(common, csz);
1120}
1121
1122void ath9k_tasklet(struct tasklet_struct *t);
1123int ath_cabq_update(struct ath_softc *);
1124u8 ath9k_parse_mpdudensity(u8 mpdudensity);
1125irqreturn_t ath_isr(int irq, void *dev);
1126int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan);
1127void ath_cancel_work(struct ath_softc *sc);
1128void ath_restart_work(struct ath_softc *sc);
1129int ath9k_init_device(u16 devid, struct ath_softc *sc,
1130		    const struct ath_bus_ops *bus_ops);
1131void ath9k_deinit_device(struct ath_softc *sc);
1132u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
1133void ath_start_rfkill_poll(struct ath_softc *sc);
1134void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
1135void ath9k_ps_wakeup(struct ath_softc *sc);
1136void ath9k_ps_restore(struct ath_softc *sc);
1137
1138#ifdef CONFIG_ATH9K_PCI
1139int ath_pci_init(void);
1140void ath_pci_exit(void);
1141#else
1142static inline int ath_pci_init(void) { return 0; };
1143static inline void ath_pci_exit(void) {};
1144#endif
1145
1146#ifdef CONFIG_ATH9K_AHB
1147int ath_ahb_init(void);
1148void ath_ahb_exit(void);
1149#else
1150static inline int ath_ahb_init(void) { return 0; };
1151static inline void ath_ahb_exit(void) {};
1152#endif
1153
1154#endif /* ATH9K_H */