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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Driver for Broadcom 63xx SOCs integrated PHYs
4 */
5#include "bcm-phy-lib.h"
6#include <linux/module.h>
7#include <linux/phy.h>
8
9#define MII_BCM63XX_IR 0x1a /* interrupt register */
10#define MII_BCM63XX_IR_EN 0x4000 /* global interrupt enable */
11#define MII_BCM63XX_IR_DUPLEX 0x0800 /* duplex changed */
12#define MII_BCM63XX_IR_SPEED 0x0400 /* speed changed */
13#define MII_BCM63XX_IR_LINK 0x0200 /* link changed */
14#define MII_BCM63XX_IR_GMASK 0x0100 /* global interrupt mask */
15
16MODULE_DESCRIPTION("Broadcom 63xx internal PHY driver");
17MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>");
18MODULE_LICENSE("GPL");
19
20static int bcm63xx_config_intr(struct phy_device *phydev)
21{
22 int reg, err;
23
24 reg = phy_read(phydev, MII_BCM63XX_IR);
25 if (reg < 0)
26 return reg;
27
28 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
29 err = bcm_phy_ack_intr(phydev);
30 if (err)
31 return err;
32
33 reg &= ~MII_BCM63XX_IR_GMASK;
34 err = phy_write(phydev, MII_BCM63XX_IR, reg);
35 } else {
36 reg |= MII_BCM63XX_IR_GMASK;
37 err = phy_write(phydev, MII_BCM63XX_IR, reg);
38 if (err)
39 return err;
40
41 err = bcm_phy_ack_intr(phydev);
42 }
43
44 return err;
45}
46
47static int bcm63xx_config_init(struct phy_device *phydev)
48{
49 int reg, err;
50
51 /* ASYM_PAUSE bit is marked RO in datasheet, so don't cheat */
52 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, phydev->supported);
53
54 reg = phy_read(phydev, MII_BCM63XX_IR);
55 if (reg < 0)
56 return reg;
57
58 /* Mask interrupts globally. */
59 reg |= MII_BCM63XX_IR_GMASK;
60 err = phy_write(phydev, MII_BCM63XX_IR, reg);
61 if (err < 0)
62 return err;
63
64 /* Unmask events we are interested in */
65 reg = ~(MII_BCM63XX_IR_DUPLEX |
66 MII_BCM63XX_IR_SPEED |
67 MII_BCM63XX_IR_LINK) |
68 MII_BCM63XX_IR_EN;
69 return phy_write(phydev, MII_BCM63XX_IR, reg);
70}
71
72static struct phy_driver bcm63xx_driver[] = {
73{
74 .phy_id = 0x00406000,
75 .phy_id_mask = 0xfffffc00,
76 .name = "Broadcom BCM63XX (1)",
77 /* PHY_BASIC_FEATURES */
78 .flags = PHY_IS_INTERNAL,
79 .config_init = bcm63xx_config_init,
80 .config_intr = bcm63xx_config_intr,
81 .handle_interrupt = bcm_phy_handle_interrupt,
82}, {
83 /* same phy as above, with just a different OUI */
84 .phy_id = 0x002bdc00,
85 .phy_id_mask = 0xfffffc00,
86 .name = "Broadcom BCM63XX (2)",
87 /* PHY_BASIC_FEATURES */
88 .flags = PHY_IS_INTERNAL,
89 .config_init = bcm63xx_config_init,
90 .config_intr = bcm63xx_config_intr,
91 .handle_interrupt = bcm_phy_handle_interrupt,
92} };
93
94module_phy_driver(bcm63xx_driver);
95
96static struct mdio_device_id __maybe_unused bcm63xx_tbl[] = {
97 { 0x00406000, 0xfffffc00 },
98 { 0x002bdc00, 0xfffffc00 },
99 { }
100};
101
102MODULE_DEVICE_TABLE(mdio, bcm63xx_tbl);
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Driver for Broadcom 63xx SOCs integrated PHYs
4 */
5#include "bcm-phy-lib.h"
6#include <linux/module.h>
7#include <linux/phy.h>
8
9#define MII_BCM63XX_IR 0x1a /* interrupt register */
10#define MII_BCM63XX_IR_EN 0x4000 /* global interrupt enable */
11#define MII_BCM63XX_IR_DUPLEX 0x0800 /* duplex changed */
12#define MII_BCM63XX_IR_SPEED 0x0400 /* speed changed */
13#define MII_BCM63XX_IR_LINK 0x0200 /* link changed */
14#define MII_BCM63XX_IR_GMASK 0x0100 /* global interrupt mask */
15
16MODULE_DESCRIPTION("Broadcom 63xx internal PHY driver");
17MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>");
18MODULE_LICENSE("GPL");
19
20static int bcm63xx_config_intr(struct phy_device *phydev)
21{
22 int reg, err;
23
24 reg = phy_read(phydev, MII_BCM63XX_IR);
25 if (reg < 0)
26 return reg;
27
28 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
29 err = bcm_phy_ack_intr(phydev);
30 if (err)
31 return err;
32
33 reg &= ~MII_BCM63XX_IR_GMASK;
34 err = phy_write(phydev, MII_BCM63XX_IR, reg);
35 } else {
36 reg |= MII_BCM63XX_IR_GMASK;
37 err = phy_write(phydev, MII_BCM63XX_IR, reg);
38 if (err)
39 return err;
40
41 err = bcm_phy_ack_intr(phydev);
42 }
43
44 return err;
45}
46
47static int bcm63xx_config_init(struct phy_device *phydev)
48{
49 int reg, err;
50
51 /* ASYM_PAUSE bit is marked RO in datasheet, so don't cheat */
52 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, phydev->supported);
53
54 reg = phy_read(phydev, MII_BCM63XX_IR);
55 if (reg < 0)
56 return reg;
57
58 /* Mask interrupts globally. */
59 reg |= MII_BCM63XX_IR_GMASK;
60 err = phy_write(phydev, MII_BCM63XX_IR, reg);
61 if (err < 0)
62 return err;
63
64 /* Unmask events we are interested in */
65 reg = ~(MII_BCM63XX_IR_DUPLEX |
66 MII_BCM63XX_IR_SPEED |
67 MII_BCM63XX_IR_LINK) |
68 MII_BCM63XX_IR_EN;
69 return phy_write(phydev, MII_BCM63XX_IR, reg);
70}
71
72static struct phy_driver bcm63xx_driver[] = {
73{
74 .phy_id = 0x00406000,
75 .phy_id_mask = 0xfffffc00,
76 .name = "Broadcom BCM63XX (1)",
77 /* PHY_BASIC_FEATURES */
78 .flags = PHY_IS_INTERNAL,
79 .config_init = bcm63xx_config_init,
80 .config_intr = bcm63xx_config_intr,
81 .handle_interrupt = bcm_phy_handle_interrupt,
82}, {
83 /* same phy as above, with just a different OUI */
84 .phy_id = 0x002bdc00,
85 .phy_id_mask = 0xfffffc00,
86 .name = "Broadcom BCM63XX (2)",
87 /* PHY_BASIC_FEATURES */
88 .flags = PHY_IS_INTERNAL,
89 .config_init = bcm63xx_config_init,
90 .config_intr = bcm63xx_config_intr,
91 .handle_interrupt = bcm_phy_handle_interrupt,
92} };
93
94module_phy_driver(bcm63xx_driver);
95
96static struct mdio_device_id __maybe_unused bcm63xx_tbl[] = {
97 { 0x00406000, 0xfffffc00 },
98 { 0x002bdc00, 0xfffffc00 },
99 { }
100};
101
102MODULE_DEVICE_TABLE(mdio, bcm63xx_tbl);