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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
4 *
5 * Derived from MIPS:
6 * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Copyright (C) 2002, 2007 Maciej W. Rozycki
9 * Copyright (C) 2001, 2012 MIPS Technologies, Inc. All rights reserved.
10 */
11#include <asm/asm.h>
12#include <asm/asmmacro.h>
13#include <asm/loongarch.h>
14#include <asm/regdef.h>
15#include <asm/fpregdef.h>
16#include <asm/stackframe.h>
17#include <asm/thread_info.h>
18
19 .align 5
20SYM_FUNC_START(__arch_cpu_idle)
21 /* start of rollback region */
22 LONG_L t0, tp, TI_FLAGS
23 nop
24 andi t0, t0, _TIF_NEED_RESCHED
25 bnez t0, 1f
26 nop
27 nop
28 nop
29 idle 0
30 /* end of rollback region */
311: jr ra
32SYM_FUNC_END(__arch_cpu_idle)
33
34SYM_CODE_START(handle_vint)
35 BACKUP_T0T1
36 SAVE_ALL
37 la_abs t1, __arch_cpu_idle
38 LONG_L t0, sp, PT_ERA
39 /* 32 byte rollback region */
40 ori t0, t0, 0x1f
41 xori t0, t0, 0x1f
42 bne t0, t1, 1f
43 LONG_S t0, sp, PT_ERA
441: move a0, sp
45 move a1, sp
46 la_abs t0, do_vint
47 jirl ra, t0, 0
48 RESTORE_ALL_AND_RET
49SYM_CODE_END(handle_vint)
50
51SYM_CODE_START(except_vec_cex)
52 b cache_parity_error
53SYM_CODE_END(except_vec_cex)
54
55 .macro build_prep_badv
56 csrrd t0, LOONGARCH_CSR_BADV
57 PTR_S t0, sp, PT_BVADDR
58 .endm
59
60 .macro build_prep_fcsr
61 movfcsr2gr a1, fcsr0
62 .endm
63
64 .macro build_prep_none
65 .endm
66
67 .macro BUILD_HANDLER exception handler prep
68 .align 5
69 SYM_CODE_START(handle_\exception)
70 666:
71 BACKUP_T0T1
72 SAVE_ALL
73 build_prep_\prep
74 move a0, sp
75 la_abs t0, do_\handler
76 jirl ra, t0, 0
77 668:
78 RESTORE_ALL_AND_RET
79 SYM_CODE_END(handle_\exception)
80 SYM_DATA(unwind_hint_\exception, .word 668b - 666b)
81 .endm
82
83 BUILD_HANDLER ade ade badv
84 BUILD_HANDLER ale ale badv
85 BUILD_HANDLER bce bce none
86 BUILD_HANDLER bp bp none
87 BUILD_HANDLER fpe fpe fcsr
88 BUILD_HANDLER fpu fpu none
89 BUILD_HANDLER lsx lsx none
90 BUILD_HANDLER lasx lasx none
91 BUILD_HANDLER lbt lbt none
92 BUILD_HANDLER ri ri none
93 BUILD_HANDLER watch watch none
94 BUILD_HANDLER reserved reserved none /* others */
95
96SYM_CODE_START(handle_sys)
97 la_abs t0, handle_syscall
98 jr t0
99SYM_CODE_END(handle_sys)
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
4 *
5 * Derived from MIPS:
6 * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Copyright (C) 2002, 2007 Maciej W. Rozycki
9 * Copyright (C) 2001, 2012 MIPS Technologies, Inc. All rights reserved.
10 */
11#include <asm/asm.h>
12#include <asm/asmmacro.h>
13#include <asm/loongarch.h>
14#include <asm/regdef.h>
15#include <asm/fpregdef.h>
16#include <asm/stackframe.h>
17#include <asm/thread_info.h>
18
19 .align 5
20SYM_FUNC_START(__arch_cpu_idle)
21 /* start of rollback region */
22 LONG_L t0, tp, TI_FLAGS
23 nop
24 andi t0, t0, _TIF_NEED_RESCHED
25 bnez t0, 1f
26 nop
27 nop
28 nop
29 idle 0
30 /* end of rollback region */
311: jr ra
32SYM_FUNC_END(__arch_cpu_idle)
33
34SYM_CODE_START(handle_vint)
35 UNWIND_HINT_UNDEFINED
36 BACKUP_T0T1
37 SAVE_ALL
38 la_abs t1, __arch_cpu_idle
39 LONG_L t0, sp, PT_ERA
40 /* 32 byte rollback region */
41 ori t0, t0, 0x1f
42 xori t0, t0, 0x1f
43 bne t0, t1, 1f
44 LONG_S t0, sp, PT_ERA
451: move a0, sp
46 move a1, sp
47 la_abs t0, do_vint
48 jirl ra, t0, 0
49 RESTORE_ALL_AND_RET
50SYM_CODE_END(handle_vint)
51
52SYM_CODE_START(except_vec_cex)
53 UNWIND_HINT_UNDEFINED
54 b cache_parity_error
55SYM_CODE_END(except_vec_cex)
56
57 .macro build_prep_badv
58 csrrd t0, LOONGARCH_CSR_BADV
59 PTR_S t0, sp, PT_BVADDR
60 .endm
61
62 .macro build_prep_fcsr
63 movfcsr2gr a1, fcsr0
64 .endm
65
66 .macro build_prep_none
67 .endm
68
69 .macro BUILD_HANDLER exception handler prep
70 .align 5
71 SYM_CODE_START(handle_\exception)
72 UNWIND_HINT_UNDEFINED
73 666:
74 BACKUP_T0T1
75 SAVE_ALL
76 build_prep_\prep
77 move a0, sp
78 la_abs t0, do_\handler
79 jirl ra, t0, 0
80 668:
81 RESTORE_ALL_AND_RET
82 SYM_CODE_END(handle_\exception)
83 .pushsection ".data", "aw", %progbits
84 SYM_DATA(unwind_hint_\exception, .word 668b - 666b)
85 .popsection
86 .endm
87
88 BUILD_HANDLER ade ade badv
89 BUILD_HANDLER ale ale badv
90 BUILD_HANDLER bce bce none
91 BUILD_HANDLER bp bp none
92 BUILD_HANDLER fpe fpe fcsr
93 BUILD_HANDLER fpu fpu none
94 BUILD_HANDLER lsx lsx none
95 BUILD_HANDLER lasx lasx none
96 BUILD_HANDLER lbt lbt none
97 BUILD_HANDLER ri ri none
98 BUILD_HANDLER watch watch none
99 BUILD_HANDLER reserved reserved none /* others */
100
101SYM_CODE_START(handle_sys)
102 UNWIND_HINT_UNDEFINED
103 la_abs t0, handle_syscall
104 jr t0
105SYM_CODE_END(handle_sys)