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1/* SPDX-License-Identifier: BSD-3-Clause-Clear */
2/*
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6#ifndef ATH12K_RX_DESC_H
7#define ATH12K_RX_DESC_H
8
9enum rx_desc_decap_type {
10 RX_DESC_DECAP_TYPE_RAW,
11 RX_DESC_DECAP_TYPE_NATIVE_WIFI,
12 RX_DESC_DECAP_TYPE_ETHERNET2_DIX,
13 RX_DESC_DECAP_TYPE_8023,
14};
15
16enum rx_desc_decrypt_status_code {
17 RX_DESC_DECRYPT_STATUS_CODE_OK,
18 RX_DESC_DECRYPT_STATUS_CODE_UNPROTECTED_FRAME,
19 RX_DESC_DECRYPT_STATUS_CODE_DATA_ERR,
20 RX_DESC_DECRYPT_STATUS_CODE_KEY_INVALID,
21 RX_DESC_DECRYPT_STATUS_CODE_PEER_ENTRY_INVALID,
22 RX_DESC_DECRYPT_STATUS_CODE_OTHER,
23};
24
25#define RX_MPDU_START_INFO0_REO_DEST_IND GENMASK(4, 0)
26#define RX_MPDU_START_INFO0_LMAC_PEER_ID_MSB GENMASK(6, 5)
27#define RX_MPDU_START_INFO0_FLOW_ID_TOEPLITZ BIT(7)
28#define RX_MPDU_START_INFO0_PKT_SEL_FP_UCAST_DATA BIT(8)
29#define RX_MPDU_START_INFO0_PKT_SEL_FP_MCAST_DATA BIT(9)
30#define RX_MPDU_START_INFO0_PKT_SEL_FP_CTRL_BAR BIT(10)
31#define RX_MPDU_START_INFO0_RXDMA0_SRC_RING_SEL GENMASK(13, 11)
32#define RX_MPDU_START_INFO0_RXDMA0_DST_RING_SEL GENMASK(16, 14)
33#define RX_MPDU_START_INFO0_MCAST_ECHO_DROP_EN BIT(17)
34#define RX_MPDU_START_INFO0_WDS_LEARN_DETECT_EN BIT(18)
35#define RX_MPDU_START_INFO0_INTRA_BSS_CHECK_EN BIT(19)
36#define RX_MPDU_START_INFO0_USE_PPE BIT(20)
37#define RX_MPDU_START_INFO0_PPE_ROUTING_EN BIT(21)
38
39#define RX_MPDU_START_INFO1_REO_QUEUE_DESC_HI GENMASK(7, 0)
40#define RX_MPDU_START_INFO1_RECV_QUEUE_NUM GENMASK(23, 8)
41#define RX_MPDU_START_INFO1_PRE_DELIM_ERR_WARN BIT(24)
42#define RX_MPDU_START_INFO1_FIRST_DELIM_ERR BIT(25)
43
44#define RX_MPDU_START_INFO2_EPD_EN BIT(0)
45#define RX_MPDU_START_INFO2_ALL_FRAME_ENCPD BIT(1)
46#define RX_MPDU_START_INFO2_ENC_TYPE GENMASK(5, 2)
47#define RX_MPDU_START_INFO2_VAR_WEP_KEY_WIDTH GENMASK(7, 6)
48#define RX_MPDU_START_INFO2_MESH_STA GENMASK(9, 8)
49#define RX_MPDU_START_INFO2_BSSID_HIT BIT(10)
50#define RX_MPDU_START_INFO2_BSSID_NUM GENMASK(14, 11)
51#define RX_MPDU_START_INFO2_TID GENMASK(18, 15)
52
53#define RX_MPDU_START_INFO3_RXPCU_MPDU_FLTR GENMASK(1, 0)
54#define RX_MPDU_START_INFO3_SW_FRAME_GRP_ID GENMASK(8, 2)
55#define RX_MPDU_START_INFO3_NDP_FRAME BIT(9)
56#define RX_MPDU_START_INFO3_PHY_ERR BIT(10)
57#define RX_MPDU_START_INFO3_PHY_ERR_MPDU_HDR BIT(11)
58#define RX_MPDU_START_INFO3_PROTO_VER_ERR BIT(12)
59#define RX_MPDU_START_INFO3_AST_LOOKUP_VALID BIT(13)
60#define RX_MPDU_START_INFO3_RANGING BIT(14)
61
62#define RX_MPDU_START_INFO4_MPDU_FCTRL_VALID BIT(0)
63#define RX_MPDU_START_INFO4_MPDU_DUR_VALID BIT(1)
64#define RX_MPDU_START_INFO4_MAC_ADDR1_VALID BIT(2)
65#define RX_MPDU_START_INFO4_MAC_ADDR2_VALID BIT(3)
66#define RX_MPDU_START_INFO4_MAC_ADDR3_VALID BIT(4)
67#define RX_MPDU_START_INFO4_MAC_ADDR4_VALID BIT(5)
68#define RX_MPDU_START_INFO4_MPDU_SEQ_CTRL_VALID BIT(6)
69#define RX_MPDU_START_INFO4_MPDU_QOS_CTRL_VALID BIT(7)
70#define RX_MPDU_START_INFO4_MPDU_HT_CTRL_VALID BIT(8)
71#define RX_MPDU_START_INFO4_ENCRYPT_INFO_VALID BIT(9)
72#define RX_MPDU_START_INFO4_MPDU_FRAG_NUMBER GENMASK(13, 10)
73#define RX_MPDU_START_INFO4_MORE_FRAG_FLAG BIT(14)
74#define RX_MPDU_START_INFO4_FROM_DS BIT(16)
75#define RX_MPDU_START_INFO4_TO_DS BIT(17)
76#define RX_MPDU_START_INFO4_ENCRYPTED BIT(18)
77#define RX_MPDU_START_INFO4_MPDU_RETRY BIT(19)
78#define RX_MPDU_START_INFO4_MPDU_SEQ_NUM GENMASK(31, 20)
79
80#define RX_MPDU_START_INFO5_KEY_ID GENMASK(7, 0)
81#define RX_MPDU_START_INFO5_NEW_PEER_ENTRY BIT(8)
82#define RX_MPDU_START_INFO5_DECRYPT_NEEDED BIT(9)
83#define RX_MPDU_START_INFO5_DECAP_TYPE GENMASK(11, 10)
84#define RX_MPDU_START_INFO5_VLAN_TAG_C_PADDING BIT(12)
85#define RX_MPDU_START_INFO5_VLAN_TAG_S_PADDING BIT(13)
86#define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_C BIT(14)
87#define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_S BIT(15)
88#define RX_MPDU_START_INFO5_PRE_DELIM_COUNT GENMASK(27, 16)
89#define RX_MPDU_START_INFO5_AMPDU_FLAG BIT(28)
90#define RX_MPDU_START_INFO5_BAR_FRAME BIT(29)
91#define RX_MPDU_START_INFO5_RAW_MPDU BIT(30)
92
93#define RX_MPDU_START_INFO6_MPDU_LEN GENMASK(13, 0)
94#define RX_MPDU_START_INFO6_FIRST_MPDU BIT(14)
95#define RX_MPDU_START_INFO6_MCAST_BCAST BIT(15)
96#define RX_MPDU_START_INFO6_AST_IDX_NOT_FOUND BIT(16)
97#define RX_MPDU_START_INFO6_AST_IDX_TIMEOUT BIT(17)
98#define RX_MPDU_START_INFO6_POWER_MGMT BIT(18)
99#define RX_MPDU_START_INFO6_NON_QOS BIT(19)
100#define RX_MPDU_START_INFO6_NULL_DATA BIT(20)
101#define RX_MPDU_START_INFO6_MGMT_TYPE BIT(21)
102#define RX_MPDU_START_INFO6_CTRL_TYPE BIT(22)
103#define RX_MPDU_START_INFO6_MORE_DATA BIT(23)
104#define RX_MPDU_START_INFO6_EOSP BIT(24)
105#define RX_MPDU_START_INFO6_FRAGMENT BIT(25)
106#define RX_MPDU_START_INFO6_ORDER BIT(26)
107#define RX_MPDU_START_INFO6_UAPSD_TRIGGER BIT(27)
108#define RX_MPDU_START_INFO6_ENCRYPT_REQUIRED BIT(28)
109#define RX_MPDU_START_INFO6_DIRECTED BIT(29)
110#define RX_MPDU_START_INFO6_AMSDU_PRESENT BIT(30)
111
112#define RX_MPDU_START_INFO7_VDEV_ID GENMASK(7, 0)
113#define RX_MPDU_START_INFO7_SERVICE_CODE GENMASK(16, 8)
114#define RX_MPDU_START_INFO7_PRIORITY_VALID BIT(17)
115#define RX_MPDU_START_INFO7_SRC_INFO GENMASK(29, 18)
116
117#define RX_MPDU_START_INFO8_AUTH_TO_SEND_WDS BIT(0)
118
119struct rx_mpdu_start_qcn9274 {
120 __le32 info0;
121 __le32 reo_queue_desc_lo;
122 __le32 info1;
123 __le32 pn[4];
124 __le32 info2;
125 __le32 peer_meta_data;
126 __le16 info3;
127 __le16 phy_ppdu_id;
128 __le16 ast_index;
129 __le16 sw_peer_id;
130 __le32 info4;
131 __le32 info5;
132 __le32 info6;
133 __le16 frame_ctrl;
134 __le16 duration;
135 u8 addr1[ETH_ALEN];
136 u8 addr2[ETH_ALEN];
137 u8 addr3[ETH_ALEN];
138 __le16 seq_ctrl;
139 u8 addr4[ETH_ALEN];
140 __le16 qos_ctrl;
141 __le32 ht_ctrl;
142 __le32 info7;
143 u8 multi_link_addr1[ETH_ALEN];
144 u8 multi_link_addr2[ETH_ALEN];
145 __le32 info8;
146 __le32 res0;
147 __le32 res1;
148} __packed;
149
150/* rx_mpdu_start
151 *
152 * reo_destination_indication
153 * The id of the reo exit ring where the msdu frame shall push
154 * after (MPDU level) reordering has finished. Values are defined
155 * in enum %HAL_RX_MSDU_DESC_REO_DEST_IND_.
156 *
157 * lmac_peer_id_msb
158 *
159 * If use_flow_id_toeplitz_clfy is set and lmac_peer_id_'sb
160 * is 2'b00, Rx OLE uses a REO destination indicati'n of {1'b1,
161 * hash[3:0]} using the chosen Toeplitz hash from Common Parser
162 * if flow search fails.
163 * If use_flow_id_toeplitz_clfy is set and lmac_peer_id_msb
164 * 's not 2'b00, Rx OLE uses a REO destination indication of
165 * {lmac_peer_id_msb, hash[2:0]} using the chosen Toeplitz
166 * hash from Common Parser if flow search fails.
167 *
168 * use_flow_id_toeplitz_clfy
169 * Indication to Rx OLE to enable REO destination routing based
170 * on the chosen Toeplitz hash from Common Parser, in case
171 * flow search fails
172 *
173 * pkt_selection_fp_ucast_data
174 * Filter pass Unicast data frame (matching rxpcu_filter_pass
175 * and sw_frame_group_Unicast_data) routing selection
176 *
177 * pkt_selection_fp_mcast_data
178 * Filter pass Multicast data frame (matching rxpcu_filter_pass
179 * and sw_frame_group_Multicast_data) routing selection
180 *
181 * pkt_selection_fp_ctrl_bar
182 * Filter pass BAR frame (matching rxpcu_filter_pass
183 * and sw_frame_group_ctrl_1000) routing selection
184 *
185 * rxdma0_src_ring_selection
186 * Field only valid when for the received frame type the corresponding
187 * pkt_selection_fp_... bit is set
188 *
189 * rxdma0_dst_ring_selection
190 * Field only valid when for the received frame type the corresponding
191 * pkt_selection_fp_... bit is set
192 *
193 * mcast_echo_drop_enable
194 * If set, for multicast packets, multicast echo check (i.e.
195 * SA search with mcast_echo_check = 1) shall be performed
196 * by RXOLE, and any multicast echo packets should be indicated
197 * to RXDMA for release to WBM
198 *
199 * wds_learning_detect_en
200 * If set, WDS learning detection based on SA search and notification
201 * to FW (using RXDMA0 status ring) is enabled and the "timestamp"
202 * field in address search failure cache-only entry should
203 * be used to avoid multiple WDS learning notifications.
204 *
205 * intrabss_check_en
206 * If set, intra-BSS routing detection is enabled
207 *
208 * use_ppe
209 * Indicates to RXDMA to ignore the REO_destination_indication
210 * and use a programmed value corresponding to the REO2PPE
211 * ring
212 * This override to REO2PPE for packets requiring multiple
213 * buffers shall be disabled based on an RXDMA configuration,
214 * as PPE may not support such packets.
215 *
216 * Supported only in full AP chips, not in client/soft
217 * chips
218 *
219 * ppe_routing_enable
220 * Global enable/disable bit for routing to PPE, used to disable
221 * PPE routing even if RXOLE CCE or flow search indicate 'Use_PPE'
222 * This is set by SW for peers which are being handled by a
223 * host SW/accelerator subsystem that also handles packet
224 * buffer management for WiFi-to-PPE routing.
225 *
226 * This is cleared by SW for peers which are being handled
227 * by a different subsystem, completely disabling WiFi-to-PPE
228 * routing for such peers.
229 *
230 * rx_reo_queue_desc_addr_lo
231 * Address (lower 32 bits) of the REO queue descriptor.
232 *
233 * rx_reo_queue_desc_addr_hi
234 * Address (upper 8 bits) of the REO queue descriptor.
235 *
236 * receive_queue_number
237 * Indicates the MPDU queue ID to which this MPDU link
238 * descriptor belongs.
239 *
240 * pre_delim_err_warning
241 * Indicates that a delimiter FCS error was found in between the
242 * previous MPDU and this MPDU. Note that this is just a warning,
243 * and does not mean that this MPDU is corrupted in any way. If
244 * it is, there will be other errors indicated such as FCS or
245 * decrypt errors.
246 *
247 * first_delim_err
248 * Indicates that the first delimiter had a FCS failure.
249 *
250 * pn
251 * The PN number.
252 *
253 * epd_en
254 * Field only valid when AST_based_lookup_valid == 1.
255 * In case of ndp or phy_err or AST_based_lookup_valid == 0,
256 * this field will be set to 0
257 * If set to one use EPD instead of LPD
258 * In case of ndp or phy_err, this field will never be set.
259 *
260 * all_frames_shall_be_encrypted
261 * In case of ndp or phy_err or AST_based_lookup_valid == 0,
262 * this field will be set to 0
263 *
264 * When set, all frames (data only ?) shall be encrypted. If
265 * not, RX CRYPTO shall set an error flag.
266 *
267 *
268 * encrypt_type
269 * In case of ndp or phy_err or AST_based_lookup_valid == 0,
270 * this field will be set to 0
271 *
272 * Indicates type of decrypt cipher used (as defined in the
273 * peer entry)
274 *
275 * wep_key_width_for_variable_key
276 *
277 * Field only valid when key_type is set to wep_varied_width.
278 *
279 * mesh_sta
280 *
281 * bssid_hit
282 * When set, the BSSID of the incoming frame matched one of
283 * the 8 BSSID register values
284 * bssid_number
285 * Field only valid when bssid_hit is set.
286 * This number indicates which one out of the 8 BSSID register
287 * values matched the incoming frame
288 *
289 * tid
290 * Field only valid when mpdu_qos_control_valid is set
291 * The TID field in the QoS control field
292 *
293 * peer_meta_data
294 * Meta data that SW has programmed in the Peer table entry
295 * of the transmitting STA.
296 *
297 * rxpcu_mpdu_filter_in_category
298 * Field indicates what the reason was that this mpdu frame
299 * was allowed to come into the receive path by rxpcu. Values
300 * are defined in enum %RX_DESC_RXPCU_FILTER_*.
301 *
302 * sw_frame_group_id
303 * SW processes frames based on certain classifications. Values
304 * are defined in enum %RX_DESC_SW_FRAME_GRP_ID_*.
305 *
306 * ndp_frame
307 * When set, the received frame was an NDP frame, and thus
308 * there will be no MPDU data.
309 * phy_err
310 * When set, a PHY error was received before MAC received any
311 * data, and thus there will be no MPDU data.
312 *
313 * phy_err_during_mpdu_header
314 * When set, a PHY error was received before MAC received the
315 * complete MPDU header which was needed for proper decoding
316 *
317 * protocol_version_err
318 * Set when RXPCU detected a version error in the Frame control
319 * field
320 *
321 * ast_based_lookup_valid
322 * When set, AST based lookup for this frame has found a valid
323 * result.
324 *
325 * ranging
326 * When set, a ranging NDPA or a ranging NDP was received.
327 *
328 * phy_ppdu_id
329 * A ppdu counter value that PHY increments for every PPDU
330 * received. The counter value wraps around.
331 *
332 * ast_index
333 *
334 * This field indicates the index of the AST entry corresponding
335 * to this MPDU. It is provided by the GSE module instantiated
336 * in RXPCU.
337 * A value of 0xFFFF indicates an invalid AST index, meaning
338 * that No AST entry was found or NO AST search was performed
339 *
340 * sw_peer_id
341 * In case of ndp or phy_err or AST_based_lookup_valid == 0,
342 * this field will be set to 0
343 * This field indicates a unique peer identifier. It is set
344 * equal to field 'sw_peer_id' from the AST entry
345 *
346 * frame_control_valid
347 * When set, the field Mpdu_Frame_control_field has valid information
348 *
349 * frame_duration_valid
350 * When set, the field Mpdu_duration_field has valid information
351 *
352 * mac_addr_ad1..4_valid
353 * When set, the fields mac_addr_adx_..... have valid information
354 *
355 * mpdu_seq_ctrl_valid
356 *
357 * When set, the fields mpdu_sequence_control_field and mpdu_sequence_number
358 * have valid information as well as field
359 * For MPDUs without a sequence control field, this field will
360 * not be set.
361 *
362 * mpdu_qos_ctrl_valid, mpdu_ht_ctrl_valid
363 *
364 * When set, the field mpdu_qos_control_field, mpdu_ht_control has valid
365 * information, For MPDUs without a QoS,HT control field, this field
366 * will not be set.
367 *
368 * frame_encryption_info_valid
369 *
370 * When set, the encryption related info fields, like IV and
371 * PN are valid
372 * For MPDUs that are not encrypted, this will not be set.
373 *
374 * mpdu_fragment_number
375 *
376 * Field only valid when Mpdu_sequence_control_valid is set
377 * AND Fragment_flag is set. The fragment number from the 802.11 header
378 *
379 * more_fragment_flag
380 *
381 * The More Fragment bit setting from the MPDU header of the
382 * received frame
383 *
384 * fr_ds
385 *
386 * Field only valid when Mpdu_frame_control_valid is set
387 * Set if the from DS bit is set in the frame control.
388 *
389 * to_ds
390 *
391 * Field only valid when Mpdu_frame_control_valid is set
392 * Set if the to DS bit is set in the frame control.
393 *
394 * encrypted
395 *
396 * Field only valid when Mpdu_frame_control_valid is set.
397 * Protected bit from the frame control.
398 *
399 * mpdu_retry
400 * Field only valid when Mpdu_frame_control_valid is set.
401 * Retry bit from the frame control. Only valid when first_msdu is set
402 *
403 * mpdu_sequence_number
404 * Field only valid when Mpdu_sequence_control_valid is set.
405 *
406 * The sequence number from the 802.11 header.
407 * key_id
408 * The key ID octet from the IV.
409 * Field only valid when Frame_encryption_info_valid is set
410 *
411 * new_peer_entry
412 * Set if new RX_PEER_ENTRY TLV follows. If clear, RX_PEER_ENTRY
413 * doesn't follow so RX DECRYPTION module either uses old peer
414 * entry or not decrypt.
415 *
416 * decrypt_needed
417 * When RXPCU sets bit 'ast_index_not_found or ast_index_timeout',
418 * RXPCU will also ensure that this bit is NOT set. CRYPTO for that
419 * reason only needs to evaluate this bit and non of the other ones
420 *
421 * decap_type
422 * Used by the OLE during decapsulation. Values are defined in
423 * enum %MPDU_START_DECAP_TYPE_*.
424 *
425 * rx_insert_vlan_c_tag_padding
426 * rx_insert_vlan_s_tag_padding
427 * Insert 4 byte of all zeros as VLAN tag or double VLAN tag if
428 * the rx payload does not have VLAN.
429 *
430 * strip_vlan_c_tag_decap
431 * strip_vlan_s_tag_decap
432 * Strip VLAN or double VLAN during decapsulation.
433 *
434 * pre_delim_count
435 * The number of delimiters before this MPDU. Note that this
436 * number is cleared at PPDU start. If this MPDU is the first
437 * received MPDU in the PPDU and this MPDU gets filtered-in,
438 * this field will indicate the number of delimiters located
439 * after the last MPDU in the previous PPDU.
440 *
441 * If this MPDU is located after the first received MPDU in
442 * an PPDU, this field will indicate the number of delimiters
443 * located between the previous MPDU and this MPDU.
444 *
445 * ampdu_flag
446 * Received frame was part of an A-MPDU.
447 *
448 * bar_frame
449 * Received frame is a BAR frame
450 *
451 * raw_mpdu
452 * Set when no 802.11 to nwifi/ethernet hdr conversion is done
453 *
454 * mpdu_length
455 * MPDU length before decapsulation.
456 *
457 * first_mpdu
458 * Indicates the first MSDU of the PPDU. If both first_mpdu
459 * and last_mpdu are set in the MSDU then this is a not an
460 * A-MPDU frame but a stand alone MPDU. Interior MPDU in an
461 * A-MPDU shall have both first_mpdu and last_mpdu bits set to
462 * 0. The PPDU start status will only be valid when this bit
463 * is set.
464 *
465 * mcast_bcast
466 * Multicast / broadcast indicator. Only set when the MAC
467 * address 1 bit 0 is set indicating mcast/bcast and the BSSID
468 * matches one of the 4 BSSID registers. Only set when
469 * first_msdu is set.
470 *
471 * ast_index_not_found
472 * Only valid when first_msdu is set. Indicates no AST matching
473 * entries within the max search count.
474 *
475 * ast_index_timeout
476 * Only valid when first_msdu is set. Indicates an unsuccessful
477 * search in the address search table due to timeout.
478 *
479 * power_mgmt
480 * Power management bit set in the 802.11 header. Only set
481 * when first_msdu is set.
482 *
483 * non_qos
484 * Set if packet is not a non-QoS data frame. Only set when
485 * first_msdu is set.
486 *
487 * null_data
488 * Set if frame type indicates either null data or QoS null
489 * data format. Only set when first_msdu is set.
490 *
491 * mgmt_type
492 * Set if packet is a management packet. Only set when
493 * first_msdu is set.
494 *
495 * ctrl_type
496 * Set if packet is a control packet. Only set when first_msdu
497 * is set.
498 *
499 * more_data
500 * Set if more bit in frame control is set. Only set when
501 * first_msdu is set.
502 *
503 * eosp
504 * Set if the EOSP (end of service period) bit in the QoS
505 * control field is set. Only set when first_msdu is set.
506 *
507 *
508 * fragment_flag
509 * Fragment indication
510 *
511 * order
512 * Set if the order bit in the frame control is set. Only
513 * set when first_msdu is set.
514 *
515 * u_apsd_trigger
516 * U-APSD trigger frame
517 *
518 * encrypt_required
519 * Indicates that this data type frame is not encrypted even if
520 * the policy for this MPDU requires encryption as indicated in
521 * the peer table key type.
522 *
523 * directed
524 * MPDU is a directed packet which means that the RA matched
525 * our STA addresses. In proxySTA it means that the TA matched
526 * an entry in our address search table with the corresponding
527 * 'no_ack' bit is the address search entry cleared.
528 * amsdu_present
529 * AMSDU present
530 *
531 * mpdu_frame_control_field
532 * Frame control field in header. Only valid when the field is marked valid.
533 *
534 * mpdu_duration_field
535 * Duration field in header. Only valid when the field is marked valid.
536 *
537 * mac_addr_adx
538 * MAC addresses in the received frame. Only valid when corresponding
539 * address valid bit is set
540 *
541 * mpdu_qos_control_field, mpdu_ht_control_field
542 * QoS/HT control fields from header. Valid only when corresponding fields
543 * are marked valid
544 *
545 * vdev_id
546 * Virtual device associated with this peer
547 * RXOLE uses this to determine intra-BSS routing.
548 *
549 * service_code
550 * Opaque service code between PPE and Wi-Fi
551 * This field gets passed on by REO to PPE in the EDMA descriptor
552 * ('REO_TO_PPE_RING').
553 *
554 * priority_valid
555 * This field gets passed on by REO to PPE in the EDMA descriptor
556 * ('REO_TO_PPE_RING').
557 *
558 * src_info
559 * Source (virtual) device/interface info. associated with
560 * this peer
561 * This field gets passed on by REO to PPE in the EDMA descriptor
562 * ('REO_TO_PPE_RING').
563 *
564 * multi_link_addr_ad1_ad2_valid
565 * If set, Rx OLE shall convert Address1 and Address2 of received
566 * data frames to multi-link addresses during decapsulation to eth/nwifi
567 *
568 * multi_link_addr_ad1,ad2
569 * Multi-link receiver address1,2. Only valid when corresponding
570 * valid bit is set
571 *
572 * authorize_to_send_wds
573 * If not set, RXDMA shall perform error-routing for WDS packets
574 * as the sender is not authorized and might misuse WDS frame
575 * format to inject packets with arbitrary DA/SA.
576 *
577 */
578
579enum rx_msdu_start_pkt_type {
580 RX_MSDU_START_PKT_TYPE_11A,
581 RX_MSDU_START_PKT_TYPE_11B,
582 RX_MSDU_START_PKT_TYPE_11N,
583 RX_MSDU_START_PKT_TYPE_11AC,
584 RX_MSDU_START_PKT_TYPE_11AX,
585};
586
587enum rx_msdu_start_sgi {
588 RX_MSDU_START_SGI_0_8_US,
589 RX_MSDU_START_SGI_0_4_US,
590 RX_MSDU_START_SGI_1_6_US,
591 RX_MSDU_START_SGI_3_2_US,
592};
593
594enum rx_msdu_start_recv_bw {
595 RX_MSDU_START_RECV_BW_20MHZ,
596 RX_MSDU_START_RECV_BW_40MHZ,
597 RX_MSDU_START_RECV_BW_80MHZ,
598 RX_MSDU_START_RECV_BW_160MHZ,
599};
600
601enum rx_msdu_start_reception_type {
602 RX_MSDU_START_RECEPTION_TYPE_SU,
603 RX_MSDU_START_RECEPTION_TYPE_DL_MU_MIMO,
604 RX_MSDU_START_RECEPTION_TYPE_DL_MU_OFDMA,
605 RX_MSDU_START_RECEPTION_TYPE_DL_MU_OFDMA_MIMO,
606 RX_MSDU_START_RECEPTION_TYPE_UL_MU_MIMO,
607 RX_MSDU_START_RECEPTION_TYPE_UL_MU_OFDMA,
608 RX_MSDU_START_RECEPTION_TYPE_UL_MU_OFDMA_MIMO,
609};
610
611#define RX_MSDU_END_INFO0_RXPCU_MPDU_FITLER GENMASK(1, 0)
612#define RX_MSDU_END_INFO0_SW_FRAME_GRP_ID GENMASK(8, 2)
613
614#define RX_MSDU_END_INFO1_REPORTED_MPDU_LENGTH GENMASK(13, 0)
615
616#define RX_MSDU_END_INFO2_CCE_SUPER_RULE GENMASK(13, 8)
617#define RX_MSDU_END_INFO2_CCND_TRUNCATE BIT(14)
618#define RX_MSDU_END_INFO2_CCND_CCE_DIS BIT(15)
619
620#define RX_MSDU_END_INFO3_DA_OFFSET GENMASK(5, 0)
621#define RX_MSDU_END_INFO3_SA_OFFSET GENMASK(11, 6)
622#define RX_MSDU_END_INFO3_DA_OFFSET_VALID BIT(12)
623#define RX_MSDU_END_INFO3_SA_OFFSET_VALID BIT(13)
624
625#define RX_MSDU_END_INFO4_TCP_FLAG GENMASK(8, 0)
626#define RX_MSDU_END_INFO4_LRO_ELIGIBLE BIT(9)
627
628#define RX_MSDU_END_INFO5_SA_IDX_TIMEOUT BIT(0)
629#define RX_MSDU_END_INFO5_DA_IDX_TIMEOUT BIT(1)
630#define RX_MSDU_END_INFO5_SA_IS_VALID BIT(7)
631#define RX_MSDU_END_INFO5_DA_IS_VALID BIT(8)
632#define RX_MSDU_END_INFO5_DA_IS_MCBC BIT(9)
633#define RX_MSDU_END_INFO5_L3_HDR_PADDING GENMASK(11, 10)
634#define RX_MSDU_END_INFO5_FIRST_MSDU BIT(12)
635#define RX_MSDU_END_INFO5_LAST_MSDU BIT(13)
636#define RX_MSDU_END_INFO5_IP_CHKSUM_FAIL_COPY BIT(15)
637
638#define RX_MSDU_END_QCN9274_INFO5_TO_DS BIT(2)
639#define RX_MSDU_END_QCN9274_INFO5_TID GENMASK(6, 3)
640#define RX_MSDU_END_QCN9274_INFO5_FROM_DS BIT(14)
641
642#define RX_MSDU_END_INFO6_MSDU_DROP BIT(0)
643#define RX_MSDU_END_INFO6_REO_DEST_IND GENMASK(5, 1)
644#define RX_MSDU_END_INFO6_FLOW_IDX GENMASK(25, 6)
645#define RX_MSDU_END_INFO6_USE_PPE BIT(26)
646#define RX_MSDU_END_INFO6_MESH_STA GENMASK(28, 27)
647#define RX_MSDU_END_INFO6_VLAN_CTAG_STRIPPED BIT(29)
648#define RX_MSDU_END_INFO6_VLAN_STAG_STRIPPED BIT(30)
649#define RX_MSDU_END_INFO6_FRAGMENT_FLAG BIT(31)
650
651#define RX_MSDU_END_INFO7_AGGR_COUNT GENMASK(7, 0)
652#define RX_MSDU_END_INFO7_FLOW_AGGR_CONTN BIT(8)
653#define RX_MSDU_END_INFO7_FISA_TIMEOUT BIT(9)
654
655#define RX_MSDU_END_QCN9274_INFO7_TCPUDP_CSUM_FAIL_CPY BIT(10)
656#define RX_MSDU_END_QCN9274_INFO7_MSDU_LIMIT_ERROR BIT(11)
657#define RX_MSDU_END_QCN9274_INFO7_FLOW_IDX_TIMEOUT BIT(12)
658#define RX_MSDU_END_QCN9274_INFO7_FLOW_IDX_INVALID BIT(13)
659#define RX_MSDU_END_QCN9274_INFO7_CCE_MATCH BIT(14)
660#define RX_MSDU_END_QCN9274_INFO7_AMSDU_PARSER_ERR BIT(15)
661
662#define RX_MSDU_END_QCN9274_INFO8_KEY_ID GENMASK(7, 0)
663
664#define RX_MSDU_END_INFO9_SERVICE_CODE GENMASK(14, 6)
665#define RX_MSDU_END_INFO9_PRIORITY_VALID BIT(15)
666#define RX_MSDU_END_INFO9_INRA_BSS BIT(16)
667#define RX_MSDU_END_INFO9_DEST_CHIP_ID GENMASK(18, 17)
668#define RX_MSDU_END_INFO9_MCAST_ECHO BIT(19)
669#define RX_MSDU_END_INFO9_WDS_LEARN_EVENT BIT(20)
670#define RX_MSDU_END_INFO9_WDS_ROAM_EVENT BIT(21)
671#define RX_MSDU_END_INFO9_WDS_KEEP_ALIVE_EVENT BIT(22)
672
673#define RX_MSDU_END_INFO10_MSDU_LENGTH GENMASK(13, 0)
674#define RX_MSDU_END_INFO10_STBC BIT(14)
675#define RX_MSDU_END_INFO10_IPSEC_ESP BIT(15)
676#define RX_MSDU_END_INFO10_L3_OFFSET GENMASK(22, 16)
677#define RX_MSDU_END_INFO10_IPSEC_AH BIT(23)
678#define RX_MSDU_END_INFO10_L4_OFFSET GENMASK(31, 24)
679
680#define RX_MSDU_END_INFO11_MSDU_NUMBER GENMASK(7, 0)
681#define RX_MSDU_END_INFO11_DECAP_FORMAT GENMASK(9, 8)
682#define RX_MSDU_END_INFO11_IPV4 BIT(10)
683#define RX_MSDU_END_INFO11_IPV6 BIT(11)
684#define RX_MSDU_END_INFO11_TCP BIT(12)
685#define RX_MSDU_END_INFO11_UDP BIT(13)
686#define RX_MSDU_END_INFO11_IP_FRAG BIT(14)
687#define RX_MSDU_END_INFO11_TCP_ONLY_ACK BIT(15)
688#define RX_MSDU_END_INFO11_DA_IS_BCAST_MCAST BIT(16)
689#define RX_MSDU_END_INFO11_SEL_TOEPLITZ_HASH GENMASK(18, 17)
690#define RX_MSDU_END_INFO11_IP_FIXED_HDR_VALID BIT(19)
691#define RX_MSDU_END_INFO11_IP_EXTN_HDR_VALID BIT(20)
692#define RX_MSDU_END_INFO11_IP_TCP_UDP_HDR_VALID BIT(21)
693#define RX_MSDU_END_INFO11_MESH_CTRL_PRESENT BIT(22)
694#define RX_MSDU_END_INFO11_LDPC BIT(23)
695#define RX_MSDU_END_INFO11_IP4_IP6_NXT_HDR GENMASK(31, 24)
696
697#define RX_MSDU_END_INFO12_USER_RSSI GENMASK(7, 0)
698#define RX_MSDU_END_INFO12_PKT_TYPE GENMASK(11, 8)
699#define RX_MSDU_END_INFO12_SGI GENMASK(13, 12)
700#define RX_MSDU_END_INFO12_RATE_MCS GENMASK(17, 14)
701#define RX_MSDU_END_INFO12_RECV_BW GENMASK(20, 18)
702#define RX_MSDU_END_INFO12_RECEPTION_TYPE GENMASK(23, 21)
703
704#define RX_MSDU_END_QCN9274_INFO12_MIMO_SS_BITMAP GENMASK(30, 24)
705#define RX_MSDU_END_QCN9274_INFO12_MIMO_DONE_COPY BIT(31)
706
707#define RX_MSDU_END_INFO13_FIRST_MPDU BIT(0)
708#define RX_MSDU_END_INFO13_MCAST_BCAST BIT(2)
709#define RX_MSDU_END_INFO13_AST_IDX_NOT_FOUND BIT(3)
710#define RX_MSDU_END_INFO13_AST_IDX_TIMEDOUT BIT(4)
711#define RX_MSDU_END_INFO13_POWER_MGMT BIT(5)
712#define RX_MSDU_END_INFO13_NON_QOS BIT(6)
713#define RX_MSDU_END_INFO13_NULL_DATA BIT(7)
714#define RX_MSDU_END_INFO13_MGMT_TYPE BIT(8)
715#define RX_MSDU_END_INFO13_CTRL_TYPE BIT(9)
716#define RX_MSDU_END_INFO13_MORE_DATA BIT(10)
717#define RX_MSDU_END_INFO13_EOSP BIT(11)
718#define RX_MSDU_END_INFO13_A_MSDU_ERROR BIT(12)
719#define RX_MSDU_END_INFO13_ORDER BIT(14)
720#define RX_MSDU_END_INFO13_OVERFLOW_ERR BIT(16)
721#define RX_MSDU_END_INFO13_MSDU_LEN_ERR BIT(17)
722#define RX_MSDU_END_INFO13_TCP_UDP_CKSUM_FAIL BIT(18)
723#define RX_MSDU_END_INFO13_IP_CKSUM_FAIL BIT(19)
724#define RX_MSDU_END_INFO13_SA_IDX_INVALID BIT(20)
725#define RX_MSDU_END_INFO13_DA_IDX_INVALID BIT(21)
726#define RX_MSDU_END_INFO13_AMSDU_ADDR_MISMATCH BIT(22)
727#define RX_MSDU_END_INFO13_RX_IN_TX_DECRYPT_BYP BIT(23)
728#define RX_MSDU_END_INFO13_ENCRYPT_REQUIRED BIT(24)
729#define RX_MSDU_END_INFO13_DIRECTED BIT(25)
730#define RX_MSDU_END_INFO13_BUFFER_FRAGMENT BIT(26)
731#define RX_MSDU_END_INFO13_MPDU_LEN_ERR BIT(27)
732#define RX_MSDU_END_INFO13_TKIP_MIC_ERR BIT(28)
733#define RX_MSDU_END_INFO13_DECRYPT_ERR BIT(29)
734#define RX_MSDU_END_INFO13_UNDECRYPT_FRAME_ERR BIT(30)
735#define RX_MSDU_END_INFO13_FCS_ERR BIT(31)
736
737#define RX_MSDU_END_QCN9274_INFO13_WIFI_PARSER_ERR BIT(15)
738
739#define RX_MSDU_END_INFO14_DECRYPT_STATUS_CODE GENMASK(12, 10)
740#define RX_MSDU_END_INFO14_RX_BITMAP_NOT_UPDED BIT(13)
741#define RX_MSDU_END_INFO14_MSDU_DONE BIT(31)
742
743struct rx_msdu_end_qcn9274 {
744 __le16 info0;
745 __le16 phy_ppdu_id;
746 __le16 ip_hdr_cksum;
747 __le16 info1;
748 __le16 info2;
749 __le16 cumulative_l3_checksum;
750 __le32 rule_indication0;
751 __le32 ipv6_options_crc;
752 __le16 info3;
753 __le16 l3_type;
754 __le32 rule_indication1;
755 __le32 tcp_seq_num;
756 __le32 tcp_ack_num;
757 __le16 info4;
758 __le16 window_size;
759 __le16 sa_sw_peer_id;
760 __le16 info5;
761 __le16 sa_idx;
762 __le16 da_idx_or_sw_peer_id;
763 __le32 info6;
764 __le32 fse_metadata;
765 __le16 cce_metadata;
766 __le16 tcp_udp_cksum;
767 __le16 info7;
768 __le16 cumulative_ip_length;
769 __le32 info8;
770 __le32 info9;
771 __le32 info10;
772 __le32 info11;
773 __le16 vlan_ctag_ci;
774 __le16 vlan_stag_ci;
775 __le32 peer_meta_data;
776 __le32 info12;
777 __le32 flow_id_toeplitz;
778 __le32 ppdu_start_timestamp_63_32;
779 __le32 phy_meta_data;
780 __le32 ppdu_start_timestamp_31_0;
781 __le32 toeplitz_hash_2_or_4;
782 __le16 res0;
783 __le16 sa_15_0;
784 __le32 sa_47_16;
785 __le32 info13;
786 __le32 info14;
787} __packed;
788
789/* These macro definitions are only used for WCN7850 */
790#define RX_MSDU_END_WCN7850_INFO2_KEY_ID BIT(7, 0)
791
792#define RX_MSDU_END_WCN7850_INFO5_MSDU_LIMIT_ERR BIT(2)
793#define RX_MSDU_END_WCN7850_INFO5_IDX_TIMEOUT BIT(3)
794#define RX_MSDU_END_WCN7850_INFO5_IDX_INVALID BIT(4)
795#define RX_MSDU_END_WCN7850_INFO5_WIFI_PARSE_ERR BIT(5)
796#define RX_MSDU_END_WCN7850_INFO5_AMSDU_PARSER_ERR BIT(6)
797#define RX_MSDU_END_WCN7850_INFO5_TCPUDP_CSUM_FAIL_CPY BIT(14)
798
799#define RX_MSDU_END_WCN7850_INFO12_MIMO_SS_BITMAP GENMASK(31, 24)
800
801#define RX_MSDU_END_WCN7850_INFO13_FRAGMENT_FLAG BIT(13)
802#define RX_MSDU_END_WCN7850_INFO13_CCE_MATCH BIT(15)
803
804struct rx_msdu_end_wcn7850 {
805 __le16 info0;
806 __le16 phy_ppdu_id;
807 __le16 ip_hdr_cksum;
808 __le16 info1;
809 __le16 info2;
810 __le16 cumulative_l3_checksum;
811 __le32 rule_indication0;
812 __le32 rule_indication1;
813 __le16 info3;
814 __le16 l3_type;
815 __le32 ipv6_options_crc;
816 __le32 tcp_seq_num;
817 __le32 tcp_ack_num;
818 __le16 info4;
819 __le16 window_size;
820 __le16 tcp_udp_chksum;
821 __le16 info5;
822 __le16 sa_idx;
823 __le16 da_idx_or_sw_peer_id;
824 __le32 info6;
825 __le32 fse_metadata;
826 __le16 cce_metadata;
827 __le16 sa_sw_peer_id;
828 __le16 info7;
829 __le16 rsvd0;
830 __le16 cumulative_l4_checksum;
831 __le16 cumulative_ip_length;
832 __le32 info9;
833 __le32 info10;
834 __le32 info11;
835 __le32 toeplitz_hash_2_or_4;
836 __le32 flow_id_toeplitz;
837 __le32 info12;
838 __le32 ppdu_start_timestamp_31_0;
839 __le32 ppdu_start_timestamp_63_32;
840 __le32 phy_meta_data;
841 __le16 vlan_ctag_ci;
842 __le16 vlan_stag_ci;
843 __le32 rsvd[3];
844 __le32 info13;
845 __le32 info14;
846} __packed;
847
848/* rx_msdu_end
849 *
850 * rxpcu_mpdu_filter_in_category
851 * Field indicates what the reason was that this mpdu frame
852 * was allowed to come into the receive path by rxpcu. Values
853 * are defined in enum %RX_DESC_RXPCU_FILTER_*.
854 *
855 * sw_frame_group_id
856 * SW processes frames based on certain classifications. Values
857 * are defined in enum %RX_DESC_SW_FRAME_GRP_ID_*.
858 *
859 * phy_ppdu_id
860 * A ppdu counter value that PHY increments for every PPDU
861 * received. The counter value wraps around.
862 *
863 * ip_hdr_cksum
864 * This can include the IP header checksum or the pseudo
865 * header checksum used by TCP/UDP checksum.
866 *
867 * reported_mpdu_length
868 * MPDU length before decapsulation. Only valid when first_msdu is
869 * set. This field is taken directly from the length field of the
870 * A-MPDU delimiter or the preamble length field for non-A-MPDU
871 * frames.
872 *
873 * cce_super_rule
874 * Indicates the super filter rule.
875 *
876 * cce_classify_not_done_truncate
877 * Classification failed due to truncated frame.
878 *
879 * cce_classify_not_done_cce_dis
880 * Classification failed due to CCE global disable
881 *
882 * cumulative_l3_checksum
883 * FISA: IP header checksum including the total MSDU length
884 * that is part of this flow aggregated so far, reported if
885 * 'RXOLE_R0_FISA_CTRL. CHKSUM_CUM_IP_LEN_EN' is set
886 *
887 * rule_indication
888 * Bitmap indicating which of rules have matched.
889 *
890 * ipv6_options_crc
891 * 32 bit CRC computed out of IP v6 extension headers.
892 *
893 * da_offset
894 * Offset into MSDU buffer for DA.
895 *
896 * sa_offset
897 * Offset into MSDU buffer for SA.
898 *
899 * da_offset_valid
900 * da_offset field is valid. This will be set to 0 in case
901 * of a dynamic A-MSDU when DA is compressed.
902 *
903 * sa_offset_valid
904 * sa_offset field is valid. This will be set to 0 in case
905 * of a dynamic A-MSDU when SA is compressed.
906 *
907 * l3_type
908 * The 16-bit type value indicating the type of L3 later
909 * extracted from LLC/SNAP, set to zero if SNAP is not
910 * available.
911 *
912 * tcp_seq_number
913 * TCP sequence number.
914 *
915 * tcp_ack_number
916 * TCP acknowledge number.
917 *
918 * tcp_flag
919 * TCP flags {NS, CWR, ECE, URG, ACK, PSH, RST, SYN, FIN}.
920 *
921 * lro_eligible
922 * Computed out of TCP and IP fields to indicate that this
923 * MSDU is eligible for LRO.
924 *
925 * window_size
926 * TCP receive window size.
927 *
928 * sa_sw_peer_id
929 * sw_peer_id from the address search entry corresponding to the
930 * source address of the MSDU.
931 *
932 * sa_idx_timeout
933 * Indicates an unsuccessful MAC source address search due to the
934 * expiring of the search timer.
935 *
936 * da_idx_timeout
937 * Indicates an unsuccessful MAC destination address search due to
938 * the expiring of the search timer.
939 *
940 * to_ds
941 * Set if the to DS bit is set in the frame control.
942 *
943 * tid
944 * TID field in the QoS control field
945 *
946 * sa_is_valid
947 * Indicates that OLE found a valid SA entry.
948 *
949 * da_is_valid
950 * Indicates that OLE found a valid DA entry.
951 *
952 * da_is_mcbc
953 * Field Only valid if da_is_valid is set. Indicates the DA address
954 * was a Multicast of Broadcast address.
955 *
956 * l3_header_padding
957 * Number of bytes padded to make sure that the L3 header will
958 * always start of a Dword boundary.
959 *
960 * first_msdu
961 * Indicates the first MSDU of A-MSDU. If both first_msdu and
962 * last_msdu are set in the MSDU then this is a non-aggregated MSDU
963 * frame: normal MPDU. Interior MSDU in an A-MSDU shall have both
964 * first_mpdu and last_mpdu bits set to 0.
965 *
966 * last_msdu
967 * Indicates the last MSDU of the A-MSDU. MPDU end status is only
968 * valid when last_msdu is set.
969 *
970 * fr_ds
971 * Set if the from DS bit is set in the frame control.
972 *
973 * ip_chksum_fail_copy
974 * Indicates that the computed checksum did not match the
975 * checksum in the IP header.
976 *
977 * sa_idx
978 * The offset in the address table which matches the MAC source
979 * address.
980 *
981 * da_idx_or_sw_peer_id
982 * Based on a register configuration in RXOLE, this field will
983 * contain:
984 * The offset in the address table which matches the MAC destination
985 * address
986 * OR:
987 * sw_peer_id from the address search entry corresponding to
988 * the destination address of the MSDU
989 *
990 * msdu_drop
991 * REO shall drop this MSDU and not forward it to any other ring.
992 *
993 * The id of the reo exit ring where the msdu frame shall push
994 * after (MPDU level) reordering has finished. Values are defined
995 * in enum %HAL_RX_MSDU_DESC_REO_DEST_IND_.
996 *
997 * flow_idx
998 * Flow table index.
999 *
1000 * use_ppe
1001 * Indicates to RXDMA to ignore the REO_destination_indication
1002 * and use a programmed value corresponding to the REO2PPE
1003 * ring
1004 *
1005 * mesh_sta
1006 * When set, this is a Mesh (11s) STA.
1007 *
1008 * vlan_ctag_stripped
1009 * Set by RXOLE if it stripped 4-bytes of C-VLAN Tag from the
1010 * packet
1011 *
1012 * vlan_stag_stripped
1013 * Set by RXOLE if it stripped 4-bytes of S-VLAN Tag from the
1014 * packet
1015 *
1016 * fragment_flag
1017 * Indicates that this is an 802.11 fragment frame. This is
1018 * set when either the more_frag bit is set in the frame control
1019 * or the fragment number is not zero. Only set when first_msdu
1020 * is set.
1021 *
1022 * fse_metadata
1023 * FSE related meta data.
1024 *
1025 * cce_metadata
1026 * CCE related meta data.
1027 *
1028 * tcp_udp_chksum
1029 * The value of the computed TCP/UDP checksum. A mode bit
1030 * selects whether this checksum is the full checksum or the
1031 * partial checksum which does not include the pseudo header.
1032 *
1033 * aggregation_count
1034 * Number of MSDU's aggregated so far
1035 *
1036 * flow_aggregation_continuation
1037 * To indicate that this MSDU can be aggregated with
1038 * the previous packet with the same flow id
1039 *
1040 * fisa_timeout
1041 * To indicate that the aggregation has restarted for
1042 * this flow due to timeout
1043 *
1044 * tcp_udp_chksum_fail
1045 * Indicates that the computed checksum (tcp_udp_chksum) did
1046 * not match the checksum in the TCP/UDP header.
1047 *
1048 * msdu_limit_error
1049 * Indicates that the MSDU threshold was exceeded and thus all the
1050 * rest of the MSDUs will not be scattered and will not be
1051 * decapsulated but will be DMA'ed in RAW format as a single MSDU.
1052 *
1053 * flow_idx_timeout
1054 * Indicates an unsuccessful flow search due to the expiring of
1055 * the search timer.
1056 *
1057 * flow_idx_invalid
1058 * flow id is not valid.
1059 *
1060 * cce_match
1061 * Indicates that this status has a corresponding MSDU that
1062 * requires FW processing. The OLE will have classification
1063 * ring mask registers which will indicate the ring(s) for
1064 * packets and descriptors which need FW attention.
1065 *
1066 * amsdu_parser_error
1067 * A-MSDU could not be properly de-agregated.
1068 *
1069 * cumulative_ip_length
1070 * Total MSDU length that is part of this flow aggregated
1071 * so far
1072 *
1073 * key_id
1074 * The key ID octet from the IV. Only valid when first_msdu is set.
1075 *
1076 * service_code
1077 * Opaque service code between PPE and Wi-Fi
1078 *
1079 * priority_valid
1080 * This field gets passed on by REO to PPE in the EDMA descriptor
1081 *
1082 * intra_bss
1083 * This packet needs intra-BSS routing by SW as the 'vdev_id'
1084 * for the destination is the same as 'vdev_id' (from 'RX_MPDU_PCU_START')
1085 * that this MSDU was got in.
1086 *
1087 * dest_chip_id
1088 * If intra_bss is set, copied by RXOLE from 'ADDR_SEARCH_ENTRY'
1089 * to support intra-BSS routing with multi-chip multi-link
1090 * operation. This indicates into which chip's TCL the packet should be
1091 * queueued
1092 *
1093 * multicast_echo
1094 * If set, this packet is a multicast echo, i.e. the DA is
1095 * multicast and Rx OLE SA search with mcast_echo_check = 1
1096 * passed. RXDMA should release such packets to WBM.
1097 *
1098 * wds_learning_event
1099 * If set, this packet has an SA search failure with WDS learning
1100 * enabled for the peer. RXOLE should route this TLV to the
1101 * RXDMA0 status ring to notify FW.
1102 *
1103 * wds_roaming_event
1104 * If set, this packet's SA 'Sw_peer_id' mismatches the 'Sw_peer_id'
1105 * of the peer through which the packet was got, indicating
1106 * the SA node has roamed. RXOLE should route this TLV to
1107 * the RXDMA0 status ring to notify FW.
1108 *
1109 * wds_keep_alive_event
1110 * If set, the AST timestamp for this packet's SA is older
1111 * than the current timestamp by more than a threshold programmed
1112 * in RXOLE. RXOLE should route this TLV to the RXDMA0 status
1113 * ring to notify FW to keep the AST entry for the SA alive.
1114 *
1115 * msdu_length
1116 * MSDU length in bytes after decapsulation.
1117 * This field is still valid for MPDU frames without A-MSDU.
1118 * It still represents MSDU length after decapsulation
1119 *
1120 * stbc
1121 * When set, use STBC transmission rates.
1122 *
1123 * ipsec_esp
1124 * Set if IPv4/v6 packet is using IPsec ESP.
1125 *
1126 * l3_offset
1127 * Depending upon mode bit, this field either indicates the
1128 * L3 offset in bytes from the start of the RX_HEADER or the IP
1129 * offset in bytes from the start of the packet after
1130 * decapsulation. The latter is only valid if ipv4_proto or
1131 * ipv6_proto is set.
1132 *
1133 * ipsec_ah
1134 * Set if IPv4/v6 packet is using IPsec AH
1135 *
1136 * l4_offset
1137 * Depending upon mode bit, this field either indicates the
1138 * L4 offset in bytes from the start of RX_HEADER (only valid
1139 * if either ipv4_proto or ipv6_proto is set to 1) or indicates
1140 * the offset in bytes to the start of TCP or UDP header from
1141 * the start of the IP header after decapsulation (Only valid if
1142 * tcp_proto or udp_proto is set). The value 0 indicates that
1143 * the offset is longer than 127 bytes.
1144 *
1145 * msdu_number
1146 * Indicates the MSDU number within a MPDU. This value is
1147 * reset to zero at the start of each MPDU. If the number of
1148 * MSDU exceeds 255 this number will wrap using modulo 256.
1149 *
1150 * decap_type
1151 * Indicates the format after decapsulation. Values are defined in
1152 * enum %MPDU_START_DECAP_TYPE_*.
1153 *
1154 * ipv4_proto
1155 * Set if L2 layer indicates IPv4 protocol.
1156 *
1157 * ipv6_proto
1158 * Set if L2 layer indicates IPv6 protocol.
1159 *
1160 * tcp_proto
1161 * Set if the ipv4_proto or ipv6_proto are set and the IP protocol
1162 * indicates TCP.
1163 *
1164 * udp_proto
1165 * Set if the ipv4_proto or ipv6_proto are set and the IP protocol
1166 * indicates UDP.
1167 *
1168 * ip_frag
1169 * Indicates that either the IP More frag bit is set or IP frag
1170 * number is non-zero. If set indicates that this is a fragmented
1171 * IP packet.
1172 *
1173 * tcp_only_ack
1174 * Set if only the TCP Ack bit is set in the TCP flags and if
1175 * the TCP payload is 0.
1176 *
1177 * da_is_bcast_mcast
1178 * The destination address is broadcast or multicast.
1179 *
1180 * toeplitz_hash
1181 * Actual chosen Hash.
1182 * 0 - Toeplitz hash of 2-tuple (IP source address, IP
1183 * destination address)
1184 * 1 - Toeplitz hash of 4-tuple (IP source address,
1185 * IP destination address, L4 (TCP/UDP) source port,
1186 * L4 (TCP/UDP) destination port)
1187 * 2 - Toeplitz of flow_id
1188 * 3 - Zero is used
1189 *
1190 * ip_fixed_header_valid
1191 * Fixed 20-byte IPv4 header or 40-byte IPv6 header parsed
1192 * fully within first 256 bytes of the packet
1193 *
1194 * ip_extn_header_valid
1195 * IPv6/IPv6 header, including IPv4 options and
1196 * recognizable extension headers parsed fully within first 256
1197 * bytes of the packet
1198 *
1199 * tcp_udp_header_valid
1200 * Fixed 20-byte TCP (excluding TCP options) or 8-byte UDP
1201 * header parsed fully within first 256 bytes of the packet
1202 *
1203 * mesh_control_present
1204 * When set, this MSDU includes the 'Mesh Control' field
1205 *
1206 * ldpc
1207 *
1208 * ip4_protocol_ip6_next_header
1209 * For IPv4, this is the 8 bit protocol field set). For IPv6 this
1210 * is the 8 bit next_header field.
1211 *
1212 *
1213 * vlan_ctag_ci
1214 * 2 bytes of C-VLAN Tag Control Information from WHO_L2_LLC
1215 *
1216 * vlan_stag_ci
1217 * 2 bytes of S-VLAN Tag Control Information from WHO_L2_LLC
1218 * in case of double VLAN
1219 *
1220 * peer_meta_data
1221 * Meta data that SW has programmed in the Peer table entry
1222 * of the transmitting STA.
1223 *
1224 * user_rssi
1225 * RSSI for this user
1226 *
1227 * pkt_type
1228 * Values are defined in enum %RX_MSDU_START_PKT_TYPE_*.
1229 *
1230 * sgi
1231 * Field only valid when pkt type is HT, VHT or HE. Values are
1232 * defined in enum %RX_MSDU_START_SGI_*.
1233 *
1234 * rate_mcs
1235 * MCS Rate used.
1236 *
1237 * receive_bandwidth
1238 * Full receive Bandwidth. Values are defined in enum
1239 * %RX_MSDU_START_RECV_*.
1240 *
1241 * reception_type
1242 * Indicates what type of reception this is and defined in enum
1243 * %RX_MSDU_START_RECEPTION_TYPE_*.
1244 *
1245 * mimo_ss_bitmap
1246 * Field only valid when
1247 * Reception_type is RX_MSDU_START_RECEPTION_TYPE_DL_MU_MIMO or
1248 * RX_MSDU_START_RECEPTION_TYPE_DL_MU_OFDMA_MIMO.
1249 *
1250 * Bitmap, with each bit indicating if the related spatial
1251 * stream is used for this STA
1252 *
1253 * LSB related to SS 0
1254 *
1255 * 0 - spatial stream not used for this reception
1256 * 1 - spatial stream used for this reception
1257 *
1258 * msdu_done_copy
1259 * If set indicates that the RX packet data, RX header data,
1260 * RX PPDU start descriptor, RX MPDU start/end descriptor,
1261 * RX MSDU start/end descriptors and RX Attention descriptor
1262 * are all valid. This bit is in the last 64-bit of the descriptor
1263 * expected to be subscribed in future hardware.
1264 *
1265 * flow_id_toeplitz
1266 * Toeplitz hash of 5-tuple
1267 * {IP source address, IP destination address, IP source port, IP
1268 * destination port, L4 protocol} in case of non-IPSec.
1269 *
1270 * In case of IPSec - Toeplitz hash of 4-tuple
1271 * {IP source address, IP destination address, SPI, L4 protocol}
1272 *
1273 * The relevant Toeplitz key registers are provided in RxOLE's
1274 * instance of common parser module. These registers are separate
1275 * from the Toeplitz keys used by ASE/FSE modules inside RxOLE.
1276 * The actual value will be passed on from common parser module
1277 * to RxOLE in one of the WHO_* TLVs.
1278 *
1279 * ppdu_start_timestamp
1280 * Timestamp that indicates when the PPDU that contained this MPDU
1281 * started on the medium.
1282 *
1283 * phy_meta_data
1284 * SW programmed Meta data provided by the PHY. Can be used for SW
1285 * to indicate the channel the device is on.
1286 *
1287 * toeplitz_hash_2_or_4
1288 * Controlled by multiple RxOLE registers for TCP/UDP over
1289 * IPv4/IPv6 - Either, Toeplitz hash computed over 2-tuple
1290 * IPv4 or IPv6 src/dest addresses is reported; or, Toeplitz
1291 * hash computed over 4-tuple IPv4 or IPv6 src/dest addresses
1292 * and src/dest ports is reported. The Flow_id_toeplitz hash
1293 * can also be reported here. Usually the hash reported here
1294 * is the one used for hash-based REO routing (see use_flow_id_toeplitz_clfy
1295 * in 'RXPT_CLASSIFY_INFO').
1296 *
1297 * sa
1298 * Source MAC address
1299 *
1300 * first_mpdu
1301 * Indicates the first MSDU of the PPDU. If both first_mpdu
1302 * and last_mpdu are set in the MSDU then this is a not an
1303 * A-MPDU frame but a stand alone MPDU. Interior MPDU in an
1304 * A-MPDU shall have both first_mpdu and last_mpdu bits set to
1305 * 0. The PPDU start status will only be valid when this bit
1306 * is set.
1307 *
1308 * mcast_bcast
1309 * Multicast / broadcast indicator. Only set when the MAC
1310 * address 1 bit 0 is set indicating mcast/bcast and the BSSID
1311 * matches one of the 4 BSSID registers. Only set when
1312 * first_msdu is set.
1313 *
1314 * ast_index_not_found
1315 * Only valid when first_msdu is set. Indicates no AST matching
1316 * entries within the max search count.
1317 *
1318 * ast_index_timeout
1319 * Only valid when first_msdu is set. Indicates an unsuccessful
1320 * search in the address search table due to timeout.
1321 *
1322 * power_mgmt
1323 * Power management bit set in the 802.11 header. Only set
1324 * when first_msdu is set.
1325 *
1326 * non_qos
1327 * Set if packet is not a non-QoS data frame. Only set when
1328 * first_msdu is set.
1329 *
1330 * null_data
1331 * Set if frame type indicates either null data or QoS null
1332 * data format. Only set when first_msdu is set.
1333 *
1334 * mgmt_type
1335 * Set if packet is a management packet. Only set when
1336 * first_msdu is set.
1337 *
1338 * ctrl_type
1339 * Set if packet is a control packet. Only set when first_msdu
1340 * is set.
1341 *
1342 * more_data
1343 * Set if more bit in frame control is set. Only set when
1344 * first_msdu is set.
1345 *
1346 * eosp
1347 * Set if the EOSP (end of service period) bit in the QoS
1348 * control field is set. Only set when first_msdu is set.
1349 *
1350 * a_msdu_error
1351 * Set if number of MSDUs in A-MSDU is above a threshold or if the
1352 * size of the MSDU is invalid. This receive buffer will contain
1353 * all of the remainder of MSDUs in this MPDU w/o decapsulation.
1354 *
1355 * order
1356 * Set if the order bit in the frame control is set. Only
1357 * set when first_msdu is set.
1358 *
1359 * wifi_parser_error
1360 * Indicates that the WiFi frame has one of the following errors
1361 *
1362 * overflow_err
1363 * RXPCU Receive FIFO ran out of space to receive the full MPDU.
1364 * Therefore this MPDU is terminated early and is thus corrupted.
1365 *
1366 * This MPDU will not be ACKed.
1367 *
1368 * RXPCU might still be able to correctly receive the following
1369 * MPDUs in the PPDU if enough fifo space became available in time.
1370 *
1371 * mpdu_length_err
1372 * Set by RXPCU if the expected MPDU length does not correspond
1373 * with the actually received number of bytes in the MPDU.
1374 *
1375 * tcp_udp_chksum_fail
1376 * Indicates that the computed checksum (tcp_udp_chksum) did
1377 * not match the checksum in the TCP/UDP header.
1378 *
1379 * ip_chksum_fail
1380 * Indicates that the computed checksum did not match the
1381 * checksum in the IP header.
1382 *
1383 * sa_idx_invalid
1384 * Indicates no matching entry was found in the address search
1385 * table for the source MAC address.
1386 *
1387 * da_idx_invalid
1388 * Indicates no matching entry was found in the address search
1389 * table for the destination MAC address.
1390 *
1391 * amsdu_addr_mismatch
1392 * Indicates that an A-MSDU with 'from DS = 0' had an SA mismatching
1393 * TA or an A-MDU with 'to DS = 0' had a DA mismatching RA
1394 *
1395 * rx_in_tx_decrypt_byp
1396 * Indicates that RX packet is not decrypted as Crypto is busy
1397 * with TX packet processing.
1398 *
1399 * encrypt_required
1400 * Indicates that this data type frame is not encrypted even if
1401 * the policy for this MPDU requires encryption as indicated in
1402 * the peer table key type.
1403 *
1404 * directed
1405 * MPDU is a directed packet which means that the RA matched
1406 * our STA addresses. In proxySTA it means that the TA matched
1407 * an entry in our address search table with the corresponding
1408 * 'no_ack' bit is the address search entry cleared.
1409 *
1410 * buffer_fragment
1411 * Indicates that at least one of the rx buffers has been
1412 * fragmented. If set the FW should look at the rx_frag_info
1413 * descriptor described below.
1414 *
1415 * mpdu_length_err
1416 * Indicates that the MPDU was pre-maturely terminated
1417 * resulting in a truncated MPDU. Don't trust the MPDU length
1418 * field.
1419 *
1420 * tkip_mic_err
1421 * Indicates that the MPDU Michael integrity check failed
1422 *
1423 * decrypt_err
1424 * Indicates that the MPDU decrypt integrity check failed
1425 *
1426 * fcs_err
1427 * Indicates that the MPDU FCS check failed
1428 *
1429 * flow_idx_timeout
1430 * Indicates an unsuccessful flow search due to the expiring of
1431 * the search timer.
1432 *
1433 * flow_idx_invalid
1434 * flow id is not valid.
1435 *
1436 * decrypt_status_code
1437 * Field provides insight into the decryption performed. Values
1438 * are defined in enum %RX_DESC_DECRYPT_STATUS_CODE_*.
1439 *
1440 * rx_bitmap_not_updated
1441 * Frame is received, but RXPCU could not update the receive bitmap
1442 * due to (temporary) fifo constraints.
1443 *
1444 * msdu_done
1445 * If set indicates that the RX packet data, RX header data, RX
1446 * PPDU start descriptor, RX MPDU start/end descriptor, RX MSDU
1447 * start/end descriptors and RX Attention descriptor are all
1448 * valid. This bit must be in the last octet of the
1449 * descriptor.
1450 *
1451 */
1452
1453/* TODO: Move to compact TLV approach
1454 * By default these tlv's are not aligned to 128b boundary
1455 * Need to remove unused qwords and make them compact/aligned
1456 */
1457struct hal_rx_desc_qcn9274 {
1458 struct rx_msdu_end_qcn9274 msdu_end;
1459 struct rx_mpdu_start_qcn9274 mpdu_start;
1460 u8 msdu_payload[];
1461} __packed;
1462
1463#define RX_BE_PADDING0_BYTES 8
1464#define RX_BE_PADDING1_BYTES 8
1465
1466#define HAL_RX_BE_PKT_HDR_TLV_LEN 112
1467
1468struct rx_pkt_hdr_tlv {
1469 __le64 tag;
1470 __le64 phy_ppdu_id;
1471 u8 rx_pkt_hdr[HAL_RX_BE_PKT_HDR_TLV_LEN];
1472};
1473
1474struct hal_rx_desc_wcn7850 {
1475 __le64 msdu_end_tag;
1476 struct rx_msdu_end_wcn7850 msdu_end;
1477 u8 rx_padding0[RX_BE_PADDING0_BYTES];
1478 __le64 mpdu_start_tag;
1479 struct rx_mpdu_start_qcn9274 mpdu_start;
1480 struct rx_pkt_hdr_tlv pkt_hdr_tlv;
1481 u8 msdu_payload[];
1482};
1483
1484struct hal_rx_desc {
1485 union {
1486 struct hal_rx_desc_qcn9274 qcn9274;
1487 struct hal_rx_desc_wcn7850 wcn7850;
1488 } u;
1489} __packed;
1490
1491#define MAX_USER_POS 8
1492#define MAX_MU_GROUP_ID 64
1493#define MAX_MU_GROUP_SHOW 16
1494#define MAX_MU_GROUP_LENGTH (6 * MAX_MU_GROUP_SHOW)
1495
1496#define HAL_RX_RU_ALLOC_TYPE_MAX 6
1497#define RU_26 1
1498#define RU_52 2
1499#define RU_106 4
1500#define RU_242 9
1501#define RU_484 18
1502#define RU_996 37
1503
1504#endif /* ATH12K_RX_DESC_H */
1/* SPDX-License-Identifier: BSD-3-Clause-Clear */
2/*
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6#ifndef ATH12K_RX_DESC_H
7#define ATH12K_RX_DESC_H
8
9enum rx_desc_decap_type {
10 RX_DESC_DECAP_TYPE_RAW,
11 RX_DESC_DECAP_TYPE_NATIVE_WIFI,
12 RX_DESC_DECAP_TYPE_ETHERNET2_DIX,
13 RX_DESC_DECAP_TYPE_8023,
14};
15
16enum rx_desc_decrypt_status_code {
17 RX_DESC_DECRYPT_STATUS_CODE_OK,
18 RX_DESC_DECRYPT_STATUS_CODE_UNPROTECTED_FRAME,
19 RX_DESC_DECRYPT_STATUS_CODE_DATA_ERR,
20 RX_DESC_DECRYPT_STATUS_CODE_KEY_INVALID,
21 RX_DESC_DECRYPT_STATUS_CODE_PEER_ENTRY_INVALID,
22 RX_DESC_DECRYPT_STATUS_CODE_OTHER,
23};
24
25#define RX_MPDU_START_INFO0_REO_DEST_IND GENMASK(4, 0)
26#define RX_MPDU_START_INFO0_LMAC_PEER_ID_MSB GENMASK(6, 5)
27#define RX_MPDU_START_INFO0_FLOW_ID_TOEPLITZ BIT(7)
28#define RX_MPDU_START_INFO0_PKT_SEL_FP_UCAST_DATA BIT(8)
29#define RX_MPDU_START_INFO0_PKT_SEL_FP_MCAST_DATA BIT(9)
30#define RX_MPDU_START_INFO0_PKT_SEL_FP_CTRL_BAR BIT(10)
31#define RX_MPDU_START_INFO0_RXDMA0_SRC_RING_SEL GENMASK(13, 11)
32#define RX_MPDU_START_INFO0_RXDMA0_DST_RING_SEL GENMASK(16, 14)
33#define RX_MPDU_START_INFO0_MCAST_ECHO_DROP_EN BIT(17)
34#define RX_MPDU_START_INFO0_WDS_LEARN_DETECT_EN BIT(18)
35#define RX_MPDU_START_INFO0_INTRA_BSS_CHECK_EN BIT(19)
36#define RX_MPDU_START_INFO0_USE_PPE BIT(20)
37#define RX_MPDU_START_INFO0_PPE_ROUTING_EN BIT(21)
38
39#define RX_MPDU_START_INFO1_REO_QUEUE_DESC_HI GENMASK(7, 0)
40#define RX_MPDU_START_INFO1_RECV_QUEUE_NUM GENMASK(23, 8)
41#define RX_MPDU_START_INFO1_PRE_DELIM_ERR_WARN BIT(24)
42#define RX_MPDU_START_INFO1_FIRST_DELIM_ERR BIT(25)
43
44#define RX_MPDU_START_INFO2_EPD_EN BIT(0)
45#define RX_MPDU_START_INFO2_ALL_FRAME_ENCPD BIT(1)
46#define RX_MPDU_START_INFO2_ENC_TYPE GENMASK(5, 2)
47#define RX_MPDU_START_INFO2_VAR_WEP_KEY_WIDTH GENMASK(7, 6)
48#define RX_MPDU_START_INFO2_MESH_STA GENMASK(9, 8)
49#define RX_MPDU_START_INFO2_BSSID_HIT BIT(10)
50#define RX_MPDU_START_INFO2_BSSID_NUM GENMASK(14, 11)
51#define RX_MPDU_START_INFO2_TID GENMASK(18, 15)
52
53#define RX_MPDU_START_INFO3_RXPCU_MPDU_FLTR GENMASK(1, 0)
54#define RX_MPDU_START_INFO3_SW_FRAME_GRP_ID GENMASK(8, 2)
55#define RX_MPDU_START_INFO3_NDP_FRAME BIT(9)
56#define RX_MPDU_START_INFO3_PHY_ERR BIT(10)
57#define RX_MPDU_START_INFO3_PHY_ERR_MPDU_HDR BIT(11)
58#define RX_MPDU_START_INFO3_PROTO_VER_ERR BIT(12)
59#define RX_MPDU_START_INFO3_AST_LOOKUP_VALID BIT(13)
60#define RX_MPDU_START_INFO3_RANGING BIT(14)
61
62#define RX_MPDU_START_INFO4_MPDU_FCTRL_VALID BIT(0)
63#define RX_MPDU_START_INFO4_MPDU_DUR_VALID BIT(1)
64#define RX_MPDU_START_INFO4_MAC_ADDR1_VALID BIT(2)
65#define RX_MPDU_START_INFO4_MAC_ADDR2_VALID BIT(3)
66#define RX_MPDU_START_INFO4_MAC_ADDR3_VALID BIT(4)
67#define RX_MPDU_START_INFO4_MAC_ADDR4_VALID BIT(5)
68#define RX_MPDU_START_INFO4_MPDU_SEQ_CTRL_VALID BIT(6)
69#define RX_MPDU_START_INFO4_MPDU_QOS_CTRL_VALID BIT(7)
70#define RX_MPDU_START_INFO4_MPDU_HT_CTRL_VALID BIT(8)
71#define RX_MPDU_START_INFO4_ENCRYPT_INFO_VALID BIT(9)
72#define RX_MPDU_START_INFO4_MPDU_FRAG_NUMBER GENMASK(13, 10)
73#define RX_MPDU_START_INFO4_MORE_FRAG_FLAG BIT(14)
74#define RX_MPDU_START_INFO4_FROM_DS BIT(16)
75#define RX_MPDU_START_INFO4_TO_DS BIT(17)
76#define RX_MPDU_START_INFO4_ENCRYPTED BIT(18)
77#define RX_MPDU_START_INFO4_MPDU_RETRY BIT(19)
78#define RX_MPDU_START_INFO4_MPDU_SEQ_NUM GENMASK(31, 20)
79
80#define RX_MPDU_START_INFO5_KEY_ID GENMASK(7, 0)
81#define RX_MPDU_START_INFO5_NEW_PEER_ENTRY BIT(8)
82#define RX_MPDU_START_INFO5_DECRYPT_NEEDED BIT(9)
83#define RX_MPDU_START_INFO5_DECAP_TYPE GENMASK(11, 10)
84#define RX_MPDU_START_INFO5_VLAN_TAG_C_PADDING BIT(12)
85#define RX_MPDU_START_INFO5_VLAN_TAG_S_PADDING BIT(13)
86#define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_C BIT(14)
87#define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_S BIT(15)
88#define RX_MPDU_START_INFO5_PRE_DELIM_COUNT GENMASK(27, 16)
89#define RX_MPDU_START_INFO5_AMPDU_FLAG BIT(28)
90#define RX_MPDU_START_INFO5_BAR_FRAME BIT(29)
91#define RX_MPDU_START_INFO5_RAW_MPDU BIT(30)
92
93#define RX_MPDU_START_INFO6_MPDU_LEN GENMASK(13, 0)
94#define RX_MPDU_START_INFO6_FIRST_MPDU BIT(14)
95#define RX_MPDU_START_INFO6_MCAST_BCAST BIT(15)
96#define RX_MPDU_START_INFO6_AST_IDX_NOT_FOUND BIT(16)
97#define RX_MPDU_START_INFO6_AST_IDX_TIMEOUT BIT(17)
98#define RX_MPDU_START_INFO6_POWER_MGMT BIT(18)
99#define RX_MPDU_START_INFO6_NON_QOS BIT(19)
100#define RX_MPDU_START_INFO6_NULL_DATA BIT(20)
101#define RX_MPDU_START_INFO6_MGMT_TYPE BIT(21)
102#define RX_MPDU_START_INFO6_CTRL_TYPE BIT(22)
103#define RX_MPDU_START_INFO6_MORE_DATA BIT(23)
104#define RX_MPDU_START_INFO6_EOSP BIT(24)
105#define RX_MPDU_START_INFO6_FRAGMENT BIT(25)
106#define RX_MPDU_START_INFO6_ORDER BIT(26)
107#define RX_MPDU_START_INFO6_UAPSD_TRIGGER BIT(27)
108#define RX_MPDU_START_INFO6_ENCRYPT_REQUIRED BIT(28)
109#define RX_MPDU_START_INFO6_DIRECTED BIT(29)
110#define RX_MPDU_START_INFO6_AMSDU_PRESENT BIT(30)
111
112#define RX_MPDU_START_INFO7_VDEV_ID GENMASK(7, 0)
113#define RX_MPDU_START_INFO7_SERVICE_CODE GENMASK(16, 8)
114#define RX_MPDU_START_INFO7_PRIORITY_VALID BIT(17)
115#define RX_MPDU_START_INFO7_SRC_INFO GENMASK(29, 18)
116
117#define RX_MPDU_START_INFO8_AUTH_TO_SEND_WDS BIT(0)
118
119struct rx_mpdu_start_qcn9274 {
120 __le32 info0;
121 __le32 reo_queue_desc_lo;
122 __le32 info1;
123 __le32 pn[4];
124 __le32 info2;
125 __le32 peer_meta_data;
126 __le16 info3;
127 __le16 phy_ppdu_id;
128 __le16 ast_index;
129 __le16 sw_peer_id;
130 __le32 info4;
131 __le32 info5;
132 __le32 info6;
133 __le16 frame_ctrl;
134 __le16 duration;
135 u8 addr1[ETH_ALEN];
136 u8 addr2[ETH_ALEN];
137 u8 addr3[ETH_ALEN];
138 __le16 seq_ctrl;
139 u8 addr4[ETH_ALEN];
140 __le16 qos_ctrl;
141 __le32 ht_ctrl;
142 __le32 info7;
143 u8 multi_link_addr1[ETH_ALEN];
144 u8 multi_link_addr2[ETH_ALEN];
145 __le32 info8;
146 __le32 res0;
147 __le32 res1;
148} __packed;
149
150#define QCN9274_MPDU_START_SELECT_MPDU_START_TAG BIT(0)
151#define QCN9274_MPDU_START_SELECT_INFO0_REO_QUEUE_DESC_LO BIT(1)
152#define QCN9274_MPDU_START_SELECT_INFO1_PN_31_0 BIT(2)
153#define QCN9274_MPDU_START_SELECT_PN_95_32 BIT(3)
154#define QCN9274_MPDU_START_SELECT_PN_127_96_INFO2 BIT(4)
155#define QCN9274_MPDU_START_SELECT_PEER_MDATA_INFO3_PHY_PPDU_ID BIT(5)
156#define QCN9274_MPDU_START_SELECT_AST_IDX_SW_PEER_ID_INFO4 BIT(6)
157#define QCN9274_MPDU_START_SELECT_INFO5_INFO6 BIT(7)
158#define QCN9274_MPDU_START_SELECT_FRAME_CTRL_DURATION_ADDR1_31_0 BIT(8)
159#define QCN9274_MPDU_START_SELECT_ADDR2_47_0_ADDR1_47_32 BIT(9)
160#define QCN9274_MPDU_START_SELECT_ADDR3_47_0_SEQ_CTRL BIT(10)
161#define QCN9274_MPDU_START_SELECT_ADDR4_47_0_QOS_CTRL BIT(11)
162#define QCN9274_MPDU_START_SELECT_HT_CTRL_INFO7 BIT(12)
163#define QCN9274_MPDU_START_SELECT_ML_ADDR1_47_0_ML_ADDR2_15_0 BIT(13)
164#define QCN9274_MPDU_START_SELECT_ML_ADDR2_47_16_INFO8 BIT(14)
165#define QCN9274_MPDU_START_SELECT_RES_0_RES_1 BIT(15)
166
167#define QCN9274_MPDU_START_WMASK (QCN9274_MPDU_START_SELECT_INFO1_PN_31_0 | \
168 QCN9274_MPDU_START_SELECT_PN_95_32 | \
169 QCN9274_MPDU_START_SELECT_PN_127_96_INFO2 | \
170 QCN9274_MPDU_START_SELECT_PEER_MDATA_INFO3_PHY_PPDU_ID | \
171 QCN9274_MPDU_START_SELECT_AST_IDX_SW_PEER_ID_INFO4 | \
172 QCN9274_MPDU_START_SELECT_INFO5_INFO6 | \
173 QCN9274_MPDU_START_SELECT_FRAME_CTRL_DURATION_ADDR1_31_0 | \
174 QCN9274_MPDU_START_SELECT_ADDR2_47_0_ADDR1_47_32 | \
175 QCN9274_MPDU_START_SELECT_ADDR3_47_0_SEQ_CTRL | \
176 QCN9274_MPDU_START_SELECT_ADDR4_47_0_QOS_CTRL)
177
178/* The below rx_mpdu_start_qcn9274_compact structure is tied with the mask
179 * value QCN9274_MPDU_START_WMASK. If the mask value changes the structure
180 * will also change.
181 */
182
183struct rx_mpdu_start_qcn9274_compact {
184 __le32 info1;
185 __le32 pn[4];
186 __le32 info2;
187 __le32 peer_meta_data;
188 __le16 info3;
189 __le16 phy_ppdu_id;
190 __le16 ast_index;
191 __le16 sw_peer_id;
192 __le32 info4;
193 __le32 info5;
194 __le32 info6;
195 __le16 frame_ctrl;
196 __le16 duration;
197 u8 addr1[ETH_ALEN];
198 u8 addr2[ETH_ALEN];
199 u8 addr3[ETH_ALEN];
200 __le16 seq_ctrl;
201 u8 addr4[ETH_ALEN];
202 __le16 qos_ctrl;
203} __packed;
204
205/* rx_mpdu_start
206 *
207 * reo_destination_indication
208 * The id of the reo exit ring where the msdu frame shall push
209 * after (MPDU level) reordering has finished. Values are defined
210 * in enum %HAL_RX_MSDU_DESC_REO_DEST_IND_.
211 *
212 * lmac_peer_id_msb
213 *
214 * If use_flow_id_toeplitz_clfy is set and lmac_peer_id_'sb
215 * is 2'b00, Rx OLE uses a REO destination indicati'n of {1'b1,
216 * hash[3:0]} using the chosen Toeplitz hash from Common Parser
217 * if flow search fails.
218 * If use_flow_id_toeplitz_clfy is set and lmac_peer_id_msb
219 * 's not 2'b00, Rx OLE uses a REO destination indication of
220 * {lmac_peer_id_msb, hash[2:0]} using the chosen Toeplitz
221 * hash from Common Parser if flow search fails.
222 *
223 * use_flow_id_toeplitz_clfy
224 * Indication to Rx OLE to enable REO destination routing based
225 * on the chosen Toeplitz hash from Common Parser, in case
226 * flow search fails
227 *
228 * pkt_selection_fp_ucast_data
229 * Filter pass Unicast data frame (matching rxpcu_filter_pass
230 * and sw_frame_group_Unicast_data) routing selection
231 *
232 * pkt_selection_fp_mcast_data
233 * Filter pass Multicast data frame (matching rxpcu_filter_pass
234 * and sw_frame_group_Multicast_data) routing selection
235 *
236 * pkt_selection_fp_ctrl_bar
237 * Filter pass BAR frame (matching rxpcu_filter_pass
238 * and sw_frame_group_ctrl_1000) routing selection
239 *
240 * rxdma0_src_ring_selection
241 * Field only valid when for the received frame type the corresponding
242 * pkt_selection_fp_... bit is set
243 *
244 * rxdma0_dst_ring_selection
245 * Field only valid when for the received frame type the corresponding
246 * pkt_selection_fp_... bit is set
247 *
248 * mcast_echo_drop_enable
249 * If set, for multicast packets, multicast echo check (i.e.
250 * SA search with mcast_echo_check = 1) shall be performed
251 * by RXOLE, and any multicast echo packets should be indicated
252 * to RXDMA for release to WBM
253 *
254 * wds_learning_detect_en
255 * If set, WDS learning detection based on SA search and notification
256 * to FW (using RXDMA0 status ring) is enabled and the "timestamp"
257 * field in address search failure cache-only entry should
258 * be used to avoid multiple WDS learning notifications.
259 *
260 * intrabss_check_en
261 * If set, intra-BSS routing detection is enabled
262 *
263 * use_ppe
264 * Indicates to RXDMA to ignore the REO_destination_indication
265 * and use a programmed value corresponding to the REO2PPE
266 * ring
267 * This override to REO2PPE for packets requiring multiple
268 * buffers shall be disabled based on an RXDMA configuration,
269 * as PPE may not support such packets.
270 *
271 * Supported only in full AP chips, not in client/soft
272 * chips
273 *
274 * ppe_routing_enable
275 * Global enable/disable bit for routing to PPE, used to disable
276 * PPE routing even if RXOLE CCE or flow search indicate 'Use_PPE'
277 * This is set by SW for peers which are being handled by a
278 * host SW/accelerator subsystem that also handles packet
279 * buffer management for WiFi-to-PPE routing.
280 *
281 * This is cleared by SW for peers which are being handled
282 * by a different subsystem, completely disabling WiFi-to-PPE
283 * routing for such peers.
284 *
285 * rx_reo_queue_desc_addr_lo
286 * Address (lower 32 bits) of the REO queue descriptor.
287 *
288 * rx_reo_queue_desc_addr_hi
289 * Address (upper 8 bits) of the REO queue descriptor.
290 *
291 * receive_queue_number
292 * Indicates the MPDU queue ID to which this MPDU link
293 * descriptor belongs.
294 *
295 * pre_delim_err_warning
296 * Indicates that a delimiter FCS error was found in between the
297 * previous MPDU and this MPDU. Note that this is just a warning,
298 * and does not mean that this MPDU is corrupted in any way. If
299 * it is, there will be other errors indicated such as FCS or
300 * decrypt errors.
301 *
302 * first_delim_err
303 * Indicates that the first delimiter had a FCS failure.
304 *
305 * pn
306 * The PN number.
307 *
308 * epd_en
309 * Field only valid when AST_based_lookup_valid == 1.
310 * In case of ndp or phy_err or AST_based_lookup_valid == 0,
311 * this field will be set to 0
312 * If set to one use EPD instead of LPD
313 * In case of ndp or phy_err, this field will never be set.
314 *
315 * all_frames_shall_be_encrypted
316 * In case of ndp or phy_err or AST_based_lookup_valid == 0,
317 * this field will be set to 0
318 *
319 * When set, all frames (data only ?) shall be encrypted. If
320 * not, RX CRYPTO shall set an error flag.
321 *
322 *
323 * encrypt_type
324 * In case of ndp or phy_err or AST_based_lookup_valid == 0,
325 * this field will be set to 0
326 *
327 * Indicates type of decrypt cipher used (as defined in the
328 * peer entry)
329 *
330 * wep_key_width_for_variable_key
331 *
332 * Field only valid when key_type is set to wep_varied_width.
333 *
334 * mesh_sta
335 *
336 * bssid_hit
337 * When set, the BSSID of the incoming frame matched one of
338 * the 8 BSSID register values
339 * bssid_number
340 * Field only valid when bssid_hit is set.
341 * This number indicates which one out of the 8 BSSID register
342 * values matched the incoming frame
343 *
344 * tid
345 * Field only valid when mpdu_qos_control_valid is set
346 * The TID field in the QoS control field
347 *
348 * peer_meta_data
349 * Meta data that SW has programmed in the Peer table entry
350 * of the transmitting STA.
351 *
352 * rxpcu_mpdu_filter_in_category
353 * Field indicates what the reason was that this mpdu frame
354 * was allowed to come into the receive path by rxpcu. Values
355 * are defined in enum %RX_DESC_RXPCU_FILTER_*.
356 *
357 * sw_frame_group_id
358 * SW processes frames based on certain classifications. Values
359 * are defined in enum %RX_DESC_SW_FRAME_GRP_ID_*.
360 *
361 * ndp_frame
362 * When set, the received frame was an NDP frame, and thus
363 * there will be no MPDU data.
364 * phy_err
365 * When set, a PHY error was received before MAC received any
366 * data, and thus there will be no MPDU data.
367 *
368 * phy_err_during_mpdu_header
369 * When set, a PHY error was received before MAC received the
370 * complete MPDU header which was needed for proper decoding
371 *
372 * protocol_version_err
373 * Set when RXPCU detected a version error in the Frame control
374 * field
375 *
376 * ast_based_lookup_valid
377 * When set, AST based lookup for this frame has found a valid
378 * result.
379 *
380 * ranging
381 * When set, a ranging NDPA or a ranging NDP was received.
382 *
383 * phy_ppdu_id
384 * A ppdu counter value that PHY increments for every PPDU
385 * received. The counter value wraps around.
386 *
387 * ast_index
388 *
389 * This field indicates the index of the AST entry corresponding
390 * to this MPDU. It is provided by the GSE module instantiated
391 * in RXPCU.
392 * A value of 0xFFFF indicates an invalid AST index, meaning
393 * that No AST entry was found or NO AST search was performed
394 *
395 * sw_peer_id
396 * In case of ndp or phy_err or AST_based_lookup_valid == 0,
397 * this field will be set to 0
398 * This field indicates a unique peer identifier. It is set
399 * equal to field 'sw_peer_id' from the AST entry
400 *
401 * frame_control_valid
402 * When set, the field Mpdu_Frame_control_field has valid information
403 *
404 * frame_duration_valid
405 * When set, the field Mpdu_duration_field has valid information
406 *
407 * mac_addr_ad1..4_valid
408 * When set, the fields mac_addr_adx_..... have valid information
409 *
410 * mpdu_seq_ctrl_valid
411 *
412 * When set, the fields mpdu_sequence_control_field and mpdu_sequence_number
413 * have valid information as well as field
414 * For MPDUs without a sequence control field, this field will
415 * not be set.
416 *
417 * mpdu_qos_ctrl_valid, mpdu_ht_ctrl_valid
418 *
419 * When set, the field mpdu_qos_control_field, mpdu_ht_control has valid
420 * information, For MPDUs without a QoS,HT control field, this field
421 * will not be set.
422 *
423 * frame_encryption_info_valid
424 *
425 * When set, the encryption related info fields, like IV and
426 * PN are valid
427 * For MPDUs that are not encrypted, this will not be set.
428 *
429 * mpdu_fragment_number
430 *
431 * Field only valid when Mpdu_sequence_control_valid is set
432 * AND Fragment_flag is set. The fragment number from the 802.11 header
433 *
434 * more_fragment_flag
435 *
436 * The More Fragment bit setting from the MPDU header of the
437 * received frame
438 *
439 * fr_ds
440 *
441 * Field only valid when Mpdu_frame_control_valid is set
442 * Set if the from DS bit is set in the frame control.
443 *
444 * to_ds
445 *
446 * Field only valid when Mpdu_frame_control_valid is set
447 * Set if the to DS bit is set in the frame control.
448 *
449 * encrypted
450 *
451 * Field only valid when Mpdu_frame_control_valid is set.
452 * Protected bit from the frame control.
453 *
454 * mpdu_retry
455 * Field only valid when Mpdu_frame_control_valid is set.
456 * Retry bit from the frame control. Only valid when first_msdu is set
457 *
458 * mpdu_sequence_number
459 * Field only valid when Mpdu_sequence_control_valid is set.
460 *
461 * The sequence number from the 802.11 header.
462 * key_id
463 * The key ID octet from the IV.
464 * Field only valid when Frame_encryption_info_valid is set
465 *
466 * new_peer_entry
467 * Set if new RX_PEER_ENTRY TLV follows. If clear, RX_PEER_ENTRY
468 * doesn't follow so RX DECRYPTION module either uses old peer
469 * entry or not decrypt.
470 *
471 * decrypt_needed
472 * When RXPCU sets bit 'ast_index_not_found or ast_index_timeout',
473 * RXPCU will also ensure that this bit is NOT set. CRYPTO for that
474 * reason only needs to evaluate this bit and non of the other ones
475 *
476 * decap_type
477 * Used by the OLE during decapsulation. Values are defined in
478 * enum %MPDU_START_DECAP_TYPE_*.
479 *
480 * rx_insert_vlan_c_tag_padding
481 * rx_insert_vlan_s_tag_padding
482 * Insert 4 byte of all zeros as VLAN tag or double VLAN tag if
483 * the rx payload does not have VLAN.
484 *
485 * strip_vlan_c_tag_decap
486 * strip_vlan_s_tag_decap
487 * Strip VLAN or double VLAN during decapsulation.
488 *
489 * pre_delim_count
490 * The number of delimiters before this MPDU. Note that this
491 * number is cleared at PPDU start. If this MPDU is the first
492 * received MPDU in the PPDU and this MPDU gets filtered-in,
493 * this field will indicate the number of delimiters located
494 * after the last MPDU in the previous PPDU.
495 *
496 * If this MPDU is located after the first received MPDU in
497 * an PPDU, this field will indicate the number of delimiters
498 * located between the previous MPDU and this MPDU.
499 *
500 * ampdu_flag
501 * Received frame was part of an A-MPDU.
502 *
503 * bar_frame
504 * Received frame is a BAR frame
505 *
506 * raw_mpdu
507 * Set when no 802.11 to nwifi/ethernet hdr conversion is done
508 *
509 * mpdu_length
510 * MPDU length before decapsulation.
511 *
512 * first_mpdu
513 * Indicates the first MSDU of the PPDU. If both first_mpdu
514 * and last_mpdu are set in the MSDU then this is a not an
515 * A-MPDU frame but a stand alone MPDU. Interior MPDU in an
516 * A-MPDU shall have both first_mpdu and last_mpdu bits set to
517 * 0. The PPDU start status will only be valid when this bit
518 * is set.
519 *
520 * mcast_bcast
521 * Multicast / broadcast indicator. Only set when the MAC
522 * address 1 bit 0 is set indicating mcast/bcast and the BSSID
523 * matches one of the 4 BSSID registers. Only set when
524 * first_msdu is set.
525 *
526 * ast_index_not_found
527 * Only valid when first_msdu is set. Indicates no AST matching
528 * entries within the max search count.
529 *
530 * ast_index_timeout
531 * Only valid when first_msdu is set. Indicates an unsuccessful
532 * search in the address search table due to timeout.
533 *
534 * power_mgmt
535 * Power management bit set in the 802.11 header. Only set
536 * when first_msdu is set.
537 *
538 * non_qos
539 * Set if packet is not a non-QoS data frame. Only set when
540 * first_msdu is set.
541 *
542 * null_data
543 * Set if frame type indicates either null data or QoS null
544 * data format. Only set when first_msdu is set.
545 *
546 * mgmt_type
547 * Set if packet is a management packet. Only set when
548 * first_msdu is set.
549 *
550 * ctrl_type
551 * Set if packet is a control packet. Only set when first_msdu
552 * is set.
553 *
554 * more_data
555 * Set if more bit in frame control is set. Only set when
556 * first_msdu is set.
557 *
558 * eosp
559 * Set if the EOSP (end of service period) bit in the QoS
560 * control field is set. Only set when first_msdu is set.
561 *
562 *
563 * fragment_flag
564 * Fragment indication
565 *
566 * order
567 * Set if the order bit in the frame control is set. Only
568 * set when first_msdu is set.
569 *
570 * u_apsd_trigger
571 * U-APSD trigger frame
572 *
573 * encrypt_required
574 * Indicates that this data type frame is not encrypted even if
575 * the policy for this MPDU requires encryption as indicated in
576 * the peer table key type.
577 *
578 * directed
579 * MPDU is a directed packet which means that the RA matched
580 * our STA addresses. In proxySTA it means that the TA matched
581 * an entry in our address search table with the corresponding
582 * 'no_ack' bit is the address search entry cleared.
583 * amsdu_present
584 * AMSDU present
585 *
586 * mpdu_frame_control_field
587 * Frame control field in header. Only valid when the field is marked valid.
588 *
589 * mpdu_duration_field
590 * Duration field in header. Only valid when the field is marked valid.
591 *
592 * mac_addr_adx
593 * MAC addresses in the received frame. Only valid when corresponding
594 * address valid bit is set
595 *
596 * mpdu_qos_control_field, mpdu_ht_control_field
597 * QoS/HT control fields from header. Valid only when corresponding fields
598 * are marked valid
599 *
600 * vdev_id
601 * Virtual device associated with this peer
602 * RXOLE uses this to determine intra-BSS routing.
603 *
604 * service_code
605 * Opaque service code between PPE and Wi-Fi
606 * This field gets passed on by REO to PPE in the EDMA descriptor
607 * ('REO_TO_PPE_RING').
608 *
609 * priority_valid
610 * This field gets passed on by REO to PPE in the EDMA descriptor
611 * ('REO_TO_PPE_RING').
612 *
613 * src_info
614 * Source (virtual) device/interface info. associated with
615 * this peer
616 * This field gets passed on by REO to PPE in the EDMA descriptor
617 * ('REO_TO_PPE_RING').
618 *
619 * multi_link_addr_ad1_ad2_valid
620 * If set, Rx OLE shall convert Address1 and Address2 of received
621 * data frames to multi-link addresses during decapsulation to eth/nwifi
622 *
623 * multi_link_addr_ad1,ad2
624 * Multi-link receiver address1,2. Only valid when corresponding
625 * valid bit is set
626 *
627 * authorize_to_send_wds
628 * If not set, RXDMA shall perform error-routing for WDS packets
629 * as the sender is not authorized and might misuse WDS frame
630 * format to inject packets with arbitrary DA/SA.
631 *
632 */
633
634enum rx_msdu_start_pkt_type {
635 RX_MSDU_START_PKT_TYPE_11A,
636 RX_MSDU_START_PKT_TYPE_11B,
637 RX_MSDU_START_PKT_TYPE_11N,
638 RX_MSDU_START_PKT_TYPE_11AC,
639 RX_MSDU_START_PKT_TYPE_11AX,
640};
641
642enum rx_msdu_start_sgi {
643 RX_MSDU_START_SGI_0_8_US,
644 RX_MSDU_START_SGI_0_4_US,
645 RX_MSDU_START_SGI_1_6_US,
646 RX_MSDU_START_SGI_3_2_US,
647};
648
649enum rx_msdu_start_recv_bw {
650 RX_MSDU_START_RECV_BW_20MHZ,
651 RX_MSDU_START_RECV_BW_40MHZ,
652 RX_MSDU_START_RECV_BW_80MHZ,
653 RX_MSDU_START_RECV_BW_160MHZ,
654};
655
656enum rx_msdu_start_reception_type {
657 RX_MSDU_START_RECEPTION_TYPE_SU,
658 RX_MSDU_START_RECEPTION_TYPE_DL_MU_MIMO,
659 RX_MSDU_START_RECEPTION_TYPE_DL_MU_OFDMA,
660 RX_MSDU_START_RECEPTION_TYPE_DL_MU_OFDMA_MIMO,
661 RX_MSDU_START_RECEPTION_TYPE_UL_MU_MIMO,
662 RX_MSDU_START_RECEPTION_TYPE_UL_MU_OFDMA,
663 RX_MSDU_START_RECEPTION_TYPE_UL_MU_OFDMA_MIMO,
664};
665
666#define RX_MSDU_END_64_TLV_SRC_LINK_ID GENMASK(24, 22)
667
668#define RX_MSDU_END_INFO0_RXPCU_MPDU_FITLER GENMASK(1, 0)
669#define RX_MSDU_END_INFO0_SW_FRAME_GRP_ID GENMASK(8, 2)
670
671#define RX_MSDU_END_INFO1_REPORTED_MPDU_LENGTH GENMASK(13, 0)
672
673#define RX_MSDU_END_INFO2_CCE_SUPER_RULE GENMASK(13, 8)
674#define RX_MSDU_END_INFO2_CCND_TRUNCATE BIT(14)
675#define RX_MSDU_END_INFO2_CCND_CCE_DIS BIT(15)
676
677#define RX_MSDU_END_INFO3_DA_OFFSET GENMASK(5, 0)
678#define RX_MSDU_END_INFO3_SA_OFFSET GENMASK(11, 6)
679#define RX_MSDU_END_INFO3_DA_OFFSET_VALID BIT(12)
680#define RX_MSDU_END_INFO3_SA_OFFSET_VALID BIT(13)
681
682#define RX_MSDU_END_INFO4_TCP_FLAG GENMASK(8, 0)
683#define RX_MSDU_END_INFO4_LRO_ELIGIBLE BIT(9)
684
685#define RX_MSDU_END_INFO5_SA_IDX_TIMEOUT BIT(0)
686#define RX_MSDU_END_INFO5_DA_IDX_TIMEOUT BIT(1)
687#define RX_MSDU_END_INFO5_SA_IS_VALID BIT(7)
688#define RX_MSDU_END_INFO5_DA_IS_VALID BIT(8)
689#define RX_MSDU_END_INFO5_DA_IS_MCBC BIT(9)
690#define RX_MSDU_END_INFO5_L3_HDR_PADDING GENMASK(11, 10)
691#define RX_MSDU_END_INFO5_FIRST_MSDU BIT(12)
692#define RX_MSDU_END_INFO5_LAST_MSDU BIT(13)
693#define RX_MSDU_END_INFO5_IP_CHKSUM_FAIL_COPY BIT(15)
694
695#define RX_MSDU_END_QCN9274_INFO5_TO_DS BIT(2)
696#define RX_MSDU_END_QCN9274_INFO5_TID GENMASK(6, 3)
697#define RX_MSDU_END_QCN9274_INFO5_FROM_DS BIT(14)
698
699#define RX_MSDU_END_INFO6_MSDU_DROP BIT(0)
700#define RX_MSDU_END_INFO6_REO_DEST_IND GENMASK(5, 1)
701#define RX_MSDU_END_INFO6_FLOW_IDX GENMASK(25, 6)
702#define RX_MSDU_END_INFO6_USE_PPE BIT(26)
703#define RX_MSDU_END_INFO6_MESH_STA GENMASK(28, 27)
704#define RX_MSDU_END_INFO6_VLAN_CTAG_STRIPPED BIT(29)
705#define RX_MSDU_END_INFO6_VLAN_STAG_STRIPPED BIT(30)
706#define RX_MSDU_END_INFO6_FRAGMENT_FLAG BIT(31)
707
708#define RX_MSDU_END_INFO7_AGGR_COUNT GENMASK(7, 0)
709#define RX_MSDU_END_INFO7_FLOW_AGGR_CONTN BIT(8)
710#define RX_MSDU_END_INFO7_FISA_TIMEOUT BIT(9)
711
712#define RX_MSDU_END_QCN9274_INFO7_TCPUDP_CSUM_FAIL_CPY BIT(10)
713#define RX_MSDU_END_QCN9274_INFO7_MSDU_LIMIT_ERROR BIT(11)
714#define RX_MSDU_END_QCN9274_INFO7_FLOW_IDX_TIMEOUT BIT(12)
715#define RX_MSDU_END_QCN9274_INFO7_FLOW_IDX_INVALID BIT(13)
716#define RX_MSDU_END_QCN9274_INFO7_CCE_MATCH BIT(14)
717#define RX_MSDU_END_QCN9274_INFO7_AMSDU_PARSER_ERR BIT(15)
718
719#define RX_MSDU_END_QCN9274_INFO8_KEY_ID GENMASK(7, 0)
720
721#define RX_MSDU_END_INFO9_SERVICE_CODE GENMASK(14, 6)
722#define RX_MSDU_END_INFO9_PRIORITY_VALID BIT(15)
723#define RX_MSDU_END_INFO9_INRA_BSS BIT(16)
724#define RX_MSDU_END_INFO9_DEST_CHIP_ID GENMASK(18, 17)
725#define RX_MSDU_END_INFO9_MCAST_ECHO BIT(19)
726#define RX_MSDU_END_INFO9_WDS_LEARN_EVENT BIT(20)
727#define RX_MSDU_END_INFO9_WDS_ROAM_EVENT BIT(21)
728#define RX_MSDU_END_INFO9_WDS_KEEP_ALIVE_EVENT BIT(22)
729
730#define RX_MSDU_END_INFO10_MSDU_LENGTH GENMASK(13, 0)
731#define RX_MSDU_END_INFO10_STBC BIT(14)
732#define RX_MSDU_END_INFO10_IPSEC_ESP BIT(15)
733#define RX_MSDU_END_INFO10_L3_OFFSET GENMASK(22, 16)
734#define RX_MSDU_END_INFO10_IPSEC_AH BIT(23)
735#define RX_MSDU_END_INFO10_L4_OFFSET GENMASK(31, 24)
736
737#define RX_MSDU_END_INFO11_MSDU_NUMBER GENMASK(7, 0)
738#define RX_MSDU_END_INFO11_DECAP_FORMAT GENMASK(9, 8)
739#define RX_MSDU_END_INFO11_IPV4 BIT(10)
740#define RX_MSDU_END_INFO11_IPV6 BIT(11)
741#define RX_MSDU_END_INFO11_TCP BIT(12)
742#define RX_MSDU_END_INFO11_UDP BIT(13)
743#define RX_MSDU_END_INFO11_IP_FRAG BIT(14)
744#define RX_MSDU_END_INFO11_TCP_ONLY_ACK BIT(15)
745#define RX_MSDU_END_INFO11_DA_IS_BCAST_MCAST BIT(16)
746#define RX_MSDU_END_INFO11_SEL_TOEPLITZ_HASH GENMASK(18, 17)
747#define RX_MSDU_END_INFO11_IP_FIXED_HDR_VALID BIT(19)
748#define RX_MSDU_END_INFO11_IP_EXTN_HDR_VALID BIT(20)
749#define RX_MSDU_END_INFO11_IP_TCP_UDP_HDR_VALID BIT(21)
750#define RX_MSDU_END_INFO11_MESH_CTRL_PRESENT BIT(22)
751#define RX_MSDU_END_INFO11_LDPC BIT(23)
752#define RX_MSDU_END_INFO11_IP4_IP6_NXT_HDR GENMASK(31, 24)
753
754#define RX_MSDU_END_INFO12_USER_RSSI GENMASK(7, 0)
755#define RX_MSDU_END_INFO12_PKT_TYPE GENMASK(11, 8)
756#define RX_MSDU_END_INFO12_SGI GENMASK(13, 12)
757#define RX_MSDU_END_INFO12_RATE_MCS GENMASK(17, 14)
758#define RX_MSDU_END_INFO12_RECV_BW GENMASK(20, 18)
759#define RX_MSDU_END_INFO12_RECEPTION_TYPE GENMASK(23, 21)
760
761#define RX_MSDU_END_QCN9274_INFO12_MIMO_SS_BITMAP GENMASK(30, 24)
762#define RX_MSDU_END_QCN9274_INFO12_MIMO_DONE_COPY BIT(31)
763
764#define RX_MSDU_END_INFO13_FIRST_MPDU BIT(0)
765#define RX_MSDU_END_INFO13_MCAST_BCAST BIT(2)
766#define RX_MSDU_END_INFO13_AST_IDX_NOT_FOUND BIT(3)
767#define RX_MSDU_END_INFO13_AST_IDX_TIMEDOUT BIT(4)
768#define RX_MSDU_END_INFO13_POWER_MGMT BIT(5)
769#define RX_MSDU_END_INFO13_NON_QOS BIT(6)
770#define RX_MSDU_END_INFO13_NULL_DATA BIT(7)
771#define RX_MSDU_END_INFO13_MGMT_TYPE BIT(8)
772#define RX_MSDU_END_INFO13_CTRL_TYPE BIT(9)
773#define RX_MSDU_END_INFO13_MORE_DATA BIT(10)
774#define RX_MSDU_END_INFO13_EOSP BIT(11)
775#define RX_MSDU_END_INFO13_A_MSDU_ERROR BIT(12)
776#define RX_MSDU_END_INFO13_ORDER BIT(14)
777#define RX_MSDU_END_INFO13_OVERFLOW_ERR BIT(16)
778#define RX_MSDU_END_INFO13_MSDU_LEN_ERR BIT(17)
779#define RX_MSDU_END_INFO13_TCP_UDP_CKSUM_FAIL BIT(18)
780#define RX_MSDU_END_INFO13_IP_CKSUM_FAIL BIT(19)
781#define RX_MSDU_END_INFO13_SA_IDX_INVALID BIT(20)
782#define RX_MSDU_END_INFO13_DA_IDX_INVALID BIT(21)
783#define RX_MSDU_END_INFO13_AMSDU_ADDR_MISMATCH BIT(22)
784#define RX_MSDU_END_INFO13_RX_IN_TX_DECRYPT_BYP BIT(23)
785#define RX_MSDU_END_INFO13_ENCRYPT_REQUIRED BIT(24)
786#define RX_MSDU_END_INFO13_DIRECTED BIT(25)
787#define RX_MSDU_END_INFO13_BUFFER_FRAGMENT BIT(26)
788#define RX_MSDU_END_INFO13_MPDU_LEN_ERR BIT(27)
789#define RX_MSDU_END_INFO13_TKIP_MIC_ERR BIT(28)
790#define RX_MSDU_END_INFO13_DECRYPT_ERR BIT(29)
791#define RX_MSDU_END_INFO13_UNDECRYPT_FRAME_ERR BIT(30)
792#define RX_MSDU_END_INFO13_FCS_ERR BIT(31)
793
794#define RX_MSDU_END_QCN9274_INFO13_WIFI_PARSER_ERR BIT(15)
795
796#define RX_MSDU_END_INFO14_DECRYPT_STATUS_CODE GENMASK(12, 10)
797#define RX_MSDU_END_INFO14_RX_BITMAP_NOT_UPDED BIT(13)
798#define RX_MSDU_END_INFO14_MSDU_DONE BIT(31)
799
800struct rx_msdu_end_qcn9274 {
801 __le16 info0;
802 __le16 phy_ppdu_id;
803 __le16 ip_hdr_cksum;
804 __le16 info1;
805 __le16 info2;
806 __le16 cumulative_l3_checksum;
807 __le32 rule_indication0;
808 __le32 ipv6_options_crc;
809 __le16 info3;
810 __le16 l3_type;
811 __le32 rule_indication1;
812 __le32 tcp_seq_num;
813 __le32 tcp_ack_num;
814 __le16 info4;
815 __le16 window_size;
816 __le16 sa_sw_peer_id;
817 __le16 info5;
818 __le16 sa_idx;
819 __le16 da_idx_or_sw_peer_id;
820 __le32 info6;
821 __le32 fse_metadata;
822 __le16 cce_metadata;
823 __le16 tcp_udp_cksum;
824 __le16 info7;
825 __le16 cumulative_ip_length;
826 __le32 info8;
827 __le32 info9;
828 __le32 info10;
829 __le32 info11;
830 __le16 vlan_ctag_ci;
831 __le16 vlan_stag_ci;
832 __le32 peer_meta_data;
833 __le32 info12;
834 __le32 flow_id_toeplitz;
835 __le32 ppdu_start_timestamp_63_32;
836 __le32 phy_meta_data;
837 __le32 ppdu_start_timestamp_31_0;
838 __le32 toeplitz_hash_2_or_4;
839 __le16 res0;
840 __le16 sa_15_0;
841 __le32 sa_47_16;
842 __le32 info13;
843 __le32 info14;
844} __packed;
845
846#define QCN9274_MSDU_END_SELECT_MSDU_END_TAG BIT(0)
847#define QCN9274_MSDU_END_SELECT_INFO0_PHY_PPDUID_IP_HDR_CSUM_INFO1 BIT(1)
848#define QCN9274_MSDU_END_SELECT_INFO2_CUMULATIVE_CSUM_RULE_IND_0 BIT(2)
849#define QCN9274_MSDU_END_SELECT_IPV6_OP_CRC_INFO3_TYPE13 BIT(3)
850#define QCN9274_MSDU_END_SELECT_RULE_IND_1_TCP_SEQ_NUM BIT(4)
851#define QCN9274_MSDU_END_SELECT_TCP_ACK_NUM_INFO4_WINDOW_SIZE BIT(5)
852#define QCN9274_MSDU_END_SELECT_SA_SW_PER_ID_INFO5_SA_DA_ID BIT(6)
853#define QCN9274_MSDU_END_SELECT_INFO6_FSE_METADATA BIT(7)
854#define QCN9274_MSDU_END_SELECT_CCE_MDATA_TCP_UDP_CSUM_INFO7_IP_LEN BIT(8)
855#define QCN9274_MSDU_END_SELECT_INFO8_INFO9 BIT(9)
856#define QCN9274_MSDU_END_SELECT_INFO10_INFO11 BIT(10)
857#define QCN9274_MSDU_END_SELECT_VLAN_CTAG_STAG_CI_PEER_MDATA BIT(11)
858#define QCN9274_MSDU_END_SELECT_INFO12_AND_FLOW_ID_TOEPLITZ BIT(12)
859#define QCN9274_MSDU_END_SELECT_PPDU_START_TS_63_32_PHY_MDATA BIT(13)
860#define QCN9274_MSDU_END_SELECT_PPDU_START_TS_31_0_TOEPLITZ_HASH_2_4 BIT(14)
861#define QCN9274_MSDU_END_SELECT_RES0_SA_47_0 BIT(15)
862#define QCN9274_MSDU_END_SELECT_INFO13_INFO14 BIT(16)
863
864#define QCN9274_MSDU_END_WMASK (QCN9274_MSDU_END_SELECT_MSDU_END_TAG | \
865 QCN9274_MSDU_END_SELECT_SA_SW_PER_ID_INFO5_SA_DA_ID | \
866 QCN9274_MSDU_END_SELECT_INFO10_INFO11 | \
867 QCN9274_MSDU_END_SELECT_INFO12_AND_FLOW_ID_TOEPLITZ | \
868 QCN9274_MSDU_END_SELECT_PPDU_START_TS_63_32_PHY_MDATA | \
869 QCN9274_MSDU_END_SELECT_INFO13_INFO14)
870
871/* The below rx_msdu_end_qcn9274_compact structure is tied with the mask value
872 * QCN9274_MSDU_END_WMASK. If the mask value changes the structure will also
873 * change.
874 */
875
876struct rx_msdu_end_qcn9274_compact {
877 __le64 msdu_end_tag;
878 __le16 sa_sw_peer_id;
879 __le16 info5;
880 __le16 sa_idx;
881 __le16 da_idx_or_sw_peer_id;
882 __le32 info10;
883 __le32 info11;
884 __le32 info12;
885 __le32 flow_id_toeplitz;
886 __le32 ppdu_start_timestamp_63_32;
887 __le32 phy_meta_data;
888 __le32 info13;
889 __le32 info14;
890} __packed;
891
892/* These macro definitions are only used for WCN7850 */
893#define RX_MSDU_END_WCN7850_INFO2_KEY_ID BIT(7, 0)
894
895#define RX_MSDU_END_WCN7850_INFO5_MSDU_LIMIT_ERR BIT(2)
896#define RX_MSDU_END_WCN7850_INFO5_IDX_TIMEOUT BIT(3)
897#define RX_MSDU_END_WCN7850_INFO5_IDX_INVALID BIT(4)
898#define RX_MSDU_END_WCN7850_INFO5_WIFI_PARSE_ERR BIT(5)
899#define RX_MSDU_END_WCN7850_INFO5_AMSDU_PARSER_ERR BIT(6)
900#define RX_MSDU_END_WCN7850_INFO5_TCPUDP_CSUM_FAIL_CPY BIT(14)
901
902#define RX_MSDU_END_WCN7850_INFO12_MIMO_SS_BITMAP GENMASK(31, 24)
903
904#define RX_MSDU_END_WCN7850_INFO13_FRAGMENT_FLAG BIT(13)
905#define RX_MSDU_END_WCN7850_INFO13_CCE_MATCH BIT(15)
906
907struct rx_msdu_end_wcn7850 {
908 __le16 info0;
909 __le16 phy_ppdu_id;
910 __le16 ip_hdr_cksum;
911 __le16 info1;
912 __le16 info2;
913 __le16 cumulative_l3_checksum;
914 __le32 rule_indication0;
915 __le32 rule_indication1;
916 __le16 info3;
917 __le16 l3_type;
918 __le32 ipv6_options_crc;
919 __le32 tcp_seq_num;
920 __le32 tcp_ack_num;
921 __le16 info4;
922 __le16 window_size;
923 __le16 tcp_udp_chksum;
924 __le16 info5;
925 __le16 sa_idx;
926 __le16 da_idx_or_sw_peer_id;
927 __le32 info6;
928 __le32 fse_metadata;
929 __le16 cce_metadata;
930 __le16 sa_sw_peer_id;
931 __le16 info7;
932 __le16 rsvd0;
933 __le16 cumulative_l4_checksum;
934 __le16 cumulative_ip_length;
935 __le32 info9;
936 __le32 info10;
937 __le32 info11;
938 __le32 toeplitz_hash_2_or_4;
939 __le32 flow_id_toeplitz;
940 __le32 info12;
941 __le32 ppdu_start_timestamp_31_0;
942 __le32 ppdu_start_timestamp_63_32;
943 __le32 phy_meta_data;
944 __le16 vlan_ctag_ci;
945 __le16 vlan_stag_ci;
946 __le32 rsvd[3];
947 __le32 info13;
948 __le32 info14;
949} __packed;
950
951/* rx_msdu_end
952 *
953 * rxpcu_mpdu_filter_in_category
954 * Field indicates what the reason was that this mpdu frame
955 * was allowed to come into the receive path by rxpcu. Values
956 * are defined in enum %RX_DESC_RXPCU_FILTER_*.
957 *
958 * sw_frame_group_id
959 * SW processes frames based on certain classifications. Values
960 * are defined in enum %RX_DESC_SW_FRAME_GRP_ID_*.
961 *
962 * phy_ppdu_id
963 * A ppdu counter value that PHY increments for every PPDU
964 * received. The counter value wraps around.
965 *
966 * ip_hdr_cksum
967 * This can include the IP header checksum or the pseudo
968 * header checksum used by TCP/UDP checksum.
969 *
970 * reported_mpdu_length
971 * MPDU length before decapsulation. Only valid when first_msdu is
972 * set. This field is taken directly from the length field of the
973 * A-MPDU delimiter or the preamble length field for non-A-MPDU
974 * frames.
975 *
976 * cce_super_rule
977 * Indicates the super filter rule.
978 *
979 * cce_classify_not_done_truncate
980 * Classification failed due to truncated frame.
981 *
982 * cce_classify_not_done_cce_dis
983 * Classification failed due to CCE global disable
984 *
985 * cumulative_l3_checksum
986 * FISA: IP header checksum including the total MSDU length
987 * that is part of this flow aggregated so far, reported if
988 * 'RXOLE_R0_FISA_CTRL. CHKSUM_CUM_IP_LEN_EN' is set
989 *
990 * rule_indication
991 * Bitmap indicating which of rules have matched.
992 *
993 * ipv6_options_crc
994 * 32 bit CRC computed out of IP v6 extension headers.
995 *
996 * da_offset
997 * Offset into MSDU buffer for DA.
998 *
999 * sa_offset
1000 * Offset into MSDU buffer for SA.
1001 *
1002 * da_offset_valid
1003 * da_offset field is valid. This will be set to 0 in case
1004 * of a dynamic A-MSDU when DA is compressed.
1005 *
1006 * sa_offset_valid
1007 * sa_offset field is valid. This will be set to 0 in case
1008 * of a dynamic A-MSDU when SA is compressed.
1009 *
1010 * l3_type
1011 * The 16-bit type value indicating the type of L3 later
1012 * extracted from LLC/SNAP, set to zero if SNAP is not
1013 * available.
1014 *
1015 * tcp_seq_number
1016 * TCP sequence number.
1017 *
1018 * tcp_ack_number
1019 * TCP acknowledge number.
1020 *
1021 * tcp_flag
1022 * TCP flags {NS, CWR, ECE, URG, ACK, PSH, RST, SYN, FIN}.
1023 *
1024 * lro_eligible
1025 * Computed out of TCP and IP fields to indicate that this
1026 * MSDU is eligible for LRO.
1027 *
1028 * window_size
1029 * TCP receive window size.
1030 *
1031 * sa_sw_peer_id
1032 * sw_peer_id from the address search entry corresponding to the
1033 * source address of the MSDU.
1034 *
1035 * sa_idx_timeout
1036 * Indicates an unsuccessful MAC source address search due to the
1037 * expiring of the search timer.
1038 *
1039 * da_idx_timeout
1040 * Indicates an unsuccessful MAC destination address search due to
1041 * the expiring of the search timer.
1042 *
1043 * to_ds
1044 * Set if the to DS bit is set in the frame control.
1045 *
1046 * tid
1047 * TID field in the QoS control field
1048 *
1049 * sa_is_valid
1050 * Indicates that OLE found a valid SA entry.
1051 *
1052 * da_is_valid
1053 * Indicates that OLE found a valid DA entry.
1054 *
1055 * da_is_mcbc
1056 * Field Only valid if da_is_valid is set. Indicates the DA address
1057 * was a Multicast of Broadcast address.
1058 *
1059 * l3_header_padding
1060 * Number of bytes padded to make sure that the L3 header will
1061 * always start of a Dword boundary.
1062 *
1063 * first_msdu
1064 * Indicates the first MSDU of A-MSDU. If both first_msdu and
1065 * last_msdu are set in the MSDU then this is a non-aggregated MSDU
1066 * frame: normal MPDU. Interior MSDU in an A-MSDU shall have both
1067 * first_mpdu and last_mpdu bits set to 0.
1068 *
1069 * last_msdu
1070 * Indicates the last MSDU of the A-MSDU. MPDU end status is only
1071 * valid when last_msdu is set.
1072 *
1073 * fr_ds
1074 * Set if the from DS bit is set in the frame control.
1075 *
1076 * ip_chksum_fail_copy
1077 * Indicates that the computed checksum did not match the
1078 * checksum in the IP header.
1079 *
1080 * sa_idx
1081 * The offset in the address table which matches the MAC source
1082 * address.
1083 *
1084 * da_idx_or_sw_peer_id
1085 * Based on a register configuration in RXOLE, this field will
1086 * contain:
1087 * The offset in the address table which matches the MAC destination
1088 * address
1089 * OR:
1090 * sw_peer_id from the address search entry corresponding to
1091 * the destination address of the MSDU
1092 *
1093 * msdu_drop
1094 * REO shall drop this MSDU and not forward it to any other ring.
1095 *
1096 * The id of the reo exit ring where the msdu frame shall push
1097 * after (MPDU level) reordering has finished. Values are defined
1098 * in enum %HAL_RX_MSDU_DESC_REO_DEST_IND_.
1099 *
1100 * flow_idx
1101 * Flow table index.
1102 *
1103 * use_ppe
1104 * Indicates to RXDMA to ignore the REO_destination_indication
1105 * and use a programmed value corresponding to the REO2PPE
1106 * ring
1107 *
1108 * mesh_sta
1109 * When set, this is a Mesh (11s) STA.
1110 *
1111 * vlan_ctag_stripped
1112 * Set by RXOLE if it stripped 4-bytes of C-VLAN Tag from the
1113 * packet
1114 *
1115 * vlan_stag_stripped
1116 * Set by RXOLE if it stripped 4-bytes of S-VLAN Tag from the
1117 * packet
1118 *
1119 * fragment_flag
1120 * Indicates that this is an 802.11 fragment frame. This is
1121 * set when either the more_frag bit is set in the frame control
1122 * or the fragment number is not zero. Only set when first_msdu
1123 * is set.
1124 *
1125 * fse_metadata
1126 * FSE related meta data.
1127 *
1128 * cce_metadata
1129 * CCE related meta data.
1130 *
1131 * tcp_udp_chksum
1132 * The value of the computed TCP/UDP checksum. A mode bit
1133 * selects whether this checksum is the full checksum or the
1134 * partial checksum which does not include the pseudo header.
1135 *
1136 * aggregation_count
1137 * Number of MSDU's aggregated so far
1138 *
1139 * flow_aggregation_continuation
1140 * To indicate that this MSDU can be aggregated with
1141 * the previous packet with the same flow id
1142 *
1143 * fisa_timeout
1144 * To indicate that the aggregation has restarted for
1145 * this flow due to timeout
1146 *
1147 * tcp_udp_chksum_fail
1148 * Indicates that the computed checksum (tcp_udp_chksum) did
1149 * not match the checksum in the TCP/UDP header.
1150 *
1151 * msdu_limit_error
1152 * Indicates that the MSDU threshold was exceeded and thus all the
1153 * rest of the MSDUs will not be scattered and will not be
1154 * decapsulated but will be DMA'ed in RAW format as a single MSDU.
1155 *
1156 * flow_idx_timeout
1157 * Indicates an unsuccessful flow search due to the expiring of
1158 * the search timer.
1159 *
1160 * flow_idx_invalid
1161 * flow id is not valid.
1162 *
1163 * cce_match
1164 * Indicates that this status has a corresponding MSDU that
1165 * requires FW processing. The OLE will have classification
1166 * ring mask registers which will indicate the ring(s) for
1167 * packets and descriptors which need FW attention.
1168 *
1169 * amsdu_parser_error
1170 * A-MSDU could not be properly de-agregated.
1171 *
1172 * cumulative_ip_length
1173 * Total MSDU length that is part of this flow aggregated
1174 * so far
1175 *
1176 * key_id
1177 * The key ID octet from the IV. Only valid when first_msdu is set.
1178 *
1179 * service_code
1180 * Opaque service code between PPE and Wi-Fi
1181 *
1182 * priority_valid
1183 * This field gets passed on by REO to PPE in the EDMA descriptor
1184 *
1185 * intra_bss
1186 * This packet needs intra-BSS routing by SW as the 'vdev_id'
1187 * for the destination is the same as 'vdev_id' (from 'RX_MPDU_PCU_START')
1188 * that this MSDU was got in.
1189 *
1190 * dest_chip_id
1191 * If intra_bss is set, copied by RXOLE from 'ADDR_SEARCH_ENTRY'
1192 * to support intra-BSS routing with multi-chip multi-link
1193 * operation. This indicates into which chip's TCL the packet should be
1194 * queueued
1195 *
1196 * multicast_echo
1197 * If set, this packet is a multicast echo, i.e. the DA is
1198 * multicast and Rx OLE SA search with mcast_echo_check = 1
1199 * passed. RXDMA should release such packets to WBM.
1200 *
1201 * wds_learning_event
1202 * If set, this packet has an SA search failure with WDS learning
1203 * enabled for the peer. RXOLE should route this TLV to the
1204 * RXDMA0 status ring to notify FW.
1205 *
1206 * wds_roaming_event
1207 * If set, this packet's SA 'Sw_peer_id' mismatches the 'Sw_peer_id'
1208 * of the peer through which the packet was got, indicating
1209 * the SA node has roamed. RXOLE should route this TLV to
1210 * the RXDMA0 status ring to notify FW.
1211 *
1212 * wds_keep_alive_event
1213 * If set, the AST timestamp for this packet's SA is older
1214 * than the current timestamp by more than a threshold programmed
1215 * in RXOLE. RXOLE should route this TLV to the RXDMA0 status
1216 * ring to notify FW to keep the AST entry for the SA alive.
1217 *
1218 * msdu_length
1219 * MSDU length in bytes after decapsulation.
1220 * This field is still valid for MPDU frames without A-MSDU.
1221 * It still represents MSDU length after decapsulation
1222 *
1223 * stbc
1224 * When set, use STBC transmission rates.
1225 *
1226 * ipsec_esp
1227 * Set if IPv4/v6 packet is using IPsec ESP.
1228 *
1229 * l3_offset
1230 * Depending upon mode bit, this field either indicates the
1231 * L3 offset in bytes from the start of the RX_HEADER or the IP
1232 * offset in bytes from the start of the packet after
1233 * decapsulation. The latter is only valid if ipv4_proto or
1234 * ipv6_proto is set.
1235 *
1236 * ipsec_ah
1237 * Set if IPv4/v6 packet is using IPsec AH
1238 *
1239 * l4_offset
1240 * Depending upon mode bit, this field either indicates the
1241 * L4 offset in bytes from the start of RX_HEADER (only valid
1242 * if either ipv4_proto or ipv6_proto is set to 1) or indicates
1243 * the offset in bytes to the start of TCP or UDP header from
1244 * the start of the IP header after decapsulation (Only valid if
1245 * tcp_proto or udp_proto is set). The value 0 indicates that
1246 * the offset is longer than 127 bytes.
1247 *
1248 * msdu_number
1249 * Indicates the MSDU number within a MPDU. This value is
1250 * reset to zero at the start of each MPDU. If the number of
1251 * MSDU exceeds 255 this number will wrap using modulo 256.
1252 *
1253 * decap_type
1254 * Indicates the format after decapsulation. Values are defined in
1255 * enum %MPDU_START_DECAP_TYPE_*.
1256 *
1257 * ipv4_proto
1258 * Set if L2 layer indicates IPv4 protocol.
1259 *
1260 * ipv6_proto
1261 * Set if L2 layer indicates IPv6 protocol.
1262 *
1263 * tcp_proto
1264 * Set if the ipv4_proto or ipv6_proto are set and the IP protocol
1265 * indicates TCP.
1266 *
1267 * udp_proto
1268 * Set if the ipv4_proto or ipv6_proto are set and the IP protocol
1269 * indicates UDP.
1270 *
1271 * ip_frag
1272 * Indicates that either the IP More frag bit is set or IP frag
1273 * number is non-zero. If set indicates that this is a fragmented
1274 * IP packet.
1275 *
1276 * tcp_only_ack
1277 * Set if only the TCP Ack bit is set in the TCP flags and if
1278 * the TCP payload is 0.
1279 *
1280 * da_is_bcast_mcast
1281 * The destination address is broadcast or multicast.
1282 *
1283 * toeplitz_hash
1284 * Actual chosen Hash.
1285 * 0 - Toeplitz hash of 2-tuple (IP source address, IP
1286 * destination address)
1287 * 1 - Toeplitz hash of 4-tuple (IP source address,
1288 * IP destination address, L4 (TCP/UDP) source port,
1289 * L4 (TCP/UDP) destination port)
1290 * 2 - Toeplitz of flow_id
1291 * 3 - Zero is used
1292 *
1293 * ip_fixed_header_valid
1294 * Fixed 20-byte IPv4 header or 40-byte IPv6 header parsed
1295 * fully within first 256 bytes of the packet
1296 *
1297 * ip_extn_header_valid
1298 * IPv6/IPv6 header, including IPv4 options and
1299 * recognizable extension headers parsed fully within first 256
1300 * bytes of the packet
1301 *
1302 * tcp_udp_header_valid
1303 * Fixed 20-byte TCP (excluding TCP options) or 8-byte UDP
1304 * header parsed fully within first 256 bytes of the packet
1305 *
1306 * mesh_control_present
1307 * When set, this MSDU includes the 'Mesh Control' field
1308 *
1309 * ldpc
1310 *
1311 * ip4_protocol_ip6_next_header
1312 * For IPv4, this is the 8 bit protocol field set). For IPv6 this
1313 * is the 8 bit next_header field.
1314 *
1315 *
1316 * vlan_ctag_ci
1317 * 2 bytes of C-VLAN Tag Control Information from WHO_L2_LLC
1318 *
1319 * vlan_stag_ci
1320 * 2 bytes of S-VLAN Tag Control Information from WHO_L2_LLC
1321 * in case of double VLAN
1322 *
1323 * peer_meta_data
1324 * Meta data that SW has programmed in the Peer table entry
1325 * of the transmitting STA.
1326 *
1327 * user_rssi
1328 * RSSI for this user
1329 *
1330 * pkt_type
1331 * Values are defined in enum %RX_MSDU_START_PKT_TYPE_*.
1332 *
1333 * sgi
1334 * Field only valid when pkt type is HT, VHT or HE. Values are
1335 * defined in enum %RX_MSDU_START_SGI_*.
1336 *
1337 * rate_mcs
1338 * MCS Rate used.
1339 *
1340 * receive_bandwidth
1341 * Full receive Bandwidth. Values are defined in enum
1342 * %RX_MSDU_START_RECV_*.
1343 *
1344 * reception_type
1345 * Indicates what type of reception this is and defined in enum
1346 * %RX_MSDU_START_RECEPTION_TYPE_*.
1347 *
1348 * mimo_ss_bitmap
1349 * Field only valid when
1350 * Reception_type is RX_MSDU_START_RECEPTION_TYPE_DL_MU_MIMO or
1351 * RX_MSDU_START_RECEPTION_TYPE_DL_MU_OFDMA_MIMO.
1352 *
1353 * Bitmap, with each bit indicating if the related spatial
1354 * stream is used for this STA
1355 *
1356 * LSB related to SS 0
1357 *
1358 * 0 - spatial stream not used for this reception
1359 * 1 - spatial stream used for this reception
1360 *
1361 * msdu_done_copy
1362 * If set indicates that the RX packet data, RX header data,
1363 * RX PPDU start descriptor, RX MPDU start/end descriptor,
1364 * RX MSDU start/end descriptors and RX Attention descriptor
1365 * are all valid. This bit is in the last 64-bit of the descriptor
1366 * expected to be subscribed in future hardware.
1367 *
1368 * flow_id_toeplitz
1369 * Toeplitz hash of 5-tuple
1370 * {IP source address, IP destination address, IP source port, IP
1371 * destination port, L4 protocol} in case of non-IPSec.
1372 *
1373 * In case of IPSec - Toeplitz hash of 4-tuple
1374 * {IP source address, IP destination address, SPI, L4 protocol}
1375 *
1376 * The relevant Toeplitz key registers are provided in RxOLE's
1377 * instance of common parser module. These registers are separate
1378 * from the Toeplitz keys used by ASE/FSE modules inside RxOLE.
1379 * The actual value will be passed on from common parser module
1380 * to RxOLE in one of the WHO_* TLVs.
1381 *
1382 * ppdu_start_timestamp
1383 * Timestamp that indicates when the PPDU that contained this MPDU
1384 * started on the medium.
1385 *
1386 * phy_meta_data
1387 * SW programmed Meta data provided by the PHY. Can be used for SW
1388 * to indicate the channel the device is on.
1389 *
1390 * toeplitz_hash_2_or_4
1391 * Controlled by multiple RxOLE registers for TCP/UDP over
1392 * IPv4/IPv6 - Either, Toeplitz hash computed over 2-tuple
1393 * IPv4 or IPv6 src/dest addresses is reported; or, Toeplitz
1394 * hash computed over 4-tuple IPv4 or IPv6 src/dest addresses
1395 * and src/dest ports is reported. The Flow_id_toeplitz hash
1396 * can also be reported here. Usually the hash reported here
1397 * is the one used for hash-based REO routing (see use_flow_id_toeplitz_clfy
1398 * in 'RXPT_CLASSIFY_INFO').
1399 *
1400 * sa
1401 * Source MAC address
1402 *
1403 * first_mpdu
1404 * Indicates the first MSDU of the PPDU. If both first_mpdu
1405 * and last_mpdu are set in the MSDU then this is a not an
1406 * A-MPDU frame but a stand alone MPDU. Interior MPDU in an
1407 * A-MPDU shall have both first_mpdu and last_mpdu bits set to
1408 * 0. The PPDU start status will only be valid when this bit
1409 * is set.
1410 *
1411 * mcast_bcast
1412 * Multicast / broadcast indicator. Only set when the MAC
1413 * address 1 bit 0 is set indicating mcast/bcast and the BSSID
1414 * matches one of the 4 BSSID registers. Only set when
1415 * first_msdu is set.
1416 *
1417 * ast_index_not_found
1418 * Only valid when first_msdu is set. Indicates no AST matching
1419 * entries within the max search count.
1420 *
1421 * ast_index_timeout
1422 * Only valid when first_msdu is set. Indicates an unsuccessful
1423 * search in the address search table due to timeout.
1424 *
1425 * power_mgmt
1426 * Power management bit set in the 802.11 header. Only set
1427 * when first_msdu is set.
1428 *
1429 * non_qos
1430 * Set if packet is not a non-QoS data frame. Only set when
1431 * first_msdu is set.
1432 *
1433 * null_data
1434 * Set if frame type indicates either null data or QoS null
1435 * data format. Only set when first_msdu is set.
1436 *
1437 * mgmt_type
1438 * Set if packet is a management packet. Only set when
1439 * first_msdu is set.
1440 *
1441 * ctrl_type
1442 * Set if packet is a control packet. Only set when first_msdu
1443 * is set.
1444 *
1445 * more_data
1446 * Set if more bit in frame control is set. Only set when
1447 * first_msdu is set.
1448 *
1449 * eosp
1450 * Set if the EOSP (end of service period) bit in the QoS
1451 * control field is set. Only set when first_msdu is set.
1452 *
1453 * a_msdu_error
1454 * Set if number of MSDUs in A-MSDU is above a threshold or if the
1455 * size of the MSDU is invalid. This receive buffer will contain
1456 * all of the remainder of MSDUs in this MPDU w/o decapsulation.
1457 *
1458 * order
1459 * Set if the order bit in the frame control is set. Only
1460 * set when first_msdu is set.
1461 *
1462 * wifi_parser_error
1463 * Indicates that the WiFi frame has one of the following errors
1464 *
1465 * overflow_err
1466 * RXPCU Receive FIFO ran out of space to receive the full MPDU.
1467 * Therefore this MPDU is terminated early and is thus corrupted.
1468 *
1469 * This MPDU will not be ACKed.
1470 *
1471 * RXPCU might still be able to correctly receive the following
1472 * MPDUs in the PPDU if enough fifo space became available in time.
1473 *
1474 * mpdu_length_err
1475 * Set by RXPCU if the expected MPDU length does not correspond
1476 * with the actually received number of bytes in the MPDU.
1477 *
1478 * tcp_udp_chksum_fail
1479 * Indicates that the computed checksum (tcp_udp_chksum) did
1480 * not match the checksum in the TCP/UDP header.
1481 *
1482 * ip_chksum_fail
1483 * Indicates that the computed checksum did not match the
1484 * checksum in the IP header.
1485 *
1486 * sa_idx_invalid
1487 * Indicates no matching entry was found in the address search
1488 * table for the source MAC address.
1489 *
1490 * da_idx_invalid
1491 * Indicates no matching entry was found in the address search
1492 * table for the destination MAC address.
1493 *
1494 * amsdu_addr_mismatch
1495 * Indicates that an A-MSDU with 'from DS = 0' had an SA mismatching
1496 * TA or an A-MDU with 'to DS = 0' had a DA mismatching RA
1497 *
1498 * rx_in_tx_decrypt_byp
1499 * Indicates that RX packet is not decrypted as Crypto is busy
1500 * with TX packet processing.
1501 *
1502 * encrypt_required
1503 * Indicates that this data type frame is not encrypted even if
1504 * the policy for this MPDU requires encryption as indicated in
1505 * the peer table key type.
1506 *
1507 * directed
1508 * MPDU is a directed packet which means that the RA matched
1509 * our STA addresses. In proxySTA it means that the TA matched
1510 * an entry in our address search table with the corresponding
1511 * 'no_ack' bit is the address search entry cleared.
1512 *
1513 * buffer_fragment
1514 * Indicates that at least one of the rx buffers has been
1515 * fragmented. If set the FW should look at the rx_frag_info
1516 * descriptor described below.
1517 *
1518 * mpdu_length_err
1519 * Indicates that the MPDU was pre-maturely terminated
1520 * resulting in a truncated MPDU. Don't trust the MPDU length
1521 * field.
1522 *
1523 * tkip_mic_err
1524 * Indicates that the MPDU Michael integrity check failed
1525 *
1526 * decrypt_err
1527 * Indicates that the MPDU decrypt integrity check failed
1528 *
1529 * fcs_err
1530 * Indicates that the MPDU FCS check failed
1531 *
1532 * flow_idx_timeout
1533 * Indicates an unsuccessful flow search due to the expiring of
1534 * the search timer.
1535 *
1536 * flow_idx_invalid
1537 * flow id is not valid.
1538 *
1539 * decrypt_status_code
1540 * Field provides insight into the decryption performed. Values
1541 * are defined in enum %RX_DESC_DECRYPT_STATUS_CODE_*.
1542 *
1543 * rx_bitmap_not_updated
1544 * Frame is received, but RXPCU could not update the receive bitmap
1545 * due to (temporary) fifo constraints.
1546 *
1547 * msdu_done
1548 * If set indicates that the RX packet data, RX header data, RX
1549 * PPDU start descriptor, RX MPDU start/end descriptor, RX MSDU
1550 * start/end descriptors and RX Attention descriptor are all
1551 * valid. This bit must be in the last octet of the
1552 * descriptor.
1553 *
1554 */
1555
1556struct hal_rx_desc_qcn9274 {
1557 struct rx_msdu_end_qcn9274 msdu_end;
1558 struct rx_mpdu_start_qcn9274 mpdu_start;
1559 u8 msdu_payload[];
1560} __packed;
1561
1562struct hal_rx_desc_qcn9274_compact {
1563 struct rx_msdu_end_qcn9274_compact msdu_end;
1564 struct rx_mpdu_start_qcn9274_compact mpdu_start;
1565 u8 msdu_payload[];
1566} __packed;
1567
1568#define RX_BE_PADDING0_BYTES 8
1569#define RX_BE_PADDING1_BYTES 8
1570
1571#define HAL_RX_BE_PKT_HDR_TLV_LEN 112
1572
1573struct rx_pkt_hdr_tlv {
1574 __le64 tag;
1575 __le64 phy_ppdu_id;
1576 u8 rx_pkt_hdr[HAL_RX_BE_PKT_HDR_TLV_LEN];
1577};
1578
1579struct hal_rx_desc_wcn7850 {
1580 __le64 msdu_end_tag;
1581 struct rx_msdu_end_wcn7850 msdu_end;
1582 u8 rx_padding0[RX_BE_PADDING0_BYTES];
1583 __le64 mpdu_start_tag;
1584 struct rx_mpdu_start_qcn9274 mpdu_start;
1585 struct rx_pkt_hdr_tlv pkt_hdr_tlv;
1586 u8 msdu_payload[];
1587};
1588
1589struct hal_rx_desc {
1590 union {
1591 struct hal_rx_desc_qcn9274 qcn9274;
1592 struct hal_rx_desc_qcn9274_compact qcn9274_compact;
1593 struct hal_rx_desc_wcn7850 wcn7850;
1594 } u;
1595} __packed;
1596
1597#define MAX_USER_POS 8
1598#define MAX_MU_GROUP_ID 64
1599#define MAX_MU_GROUP_SHOW 16
1600#define MAX_MU_GROUP_LENGTH (6 * MAX_MU_GROUP_SHOW)
1601
1602#define HAL_RX_RU_ALLOC_TYPE_MAX 6
1603#define RU_26 1
1604#define RU_52 2
1605#define RU_106 4
1606#define RU_242 9
1607#define RU_484 18
1608#define RU_996 37
1609
1610#endif /* ATH12K_RX_DESC_H */