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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Watchdog driver for Broadcom BCM2835
4 *
5 * "bcm2708_wdog" driver written by Luke Diamand that was obtained from
6 * branch "rpi-3.6.y" of git://github.com/raspberrypi/linux.git was used
7 * as a hardware reference for the Broadcom BCM2835 watchdog timer.
8 *
9 * Copyright (C) 2013 Lubomir Rintel <lkundrak@v3.sk>
10 *
11 */
12
13#include <linux/delay.h>
14#include <linux/types.h>
15#include <linux/mfd/bcm2835-pm.h>
16#include <linux/module.h>
17#include <linux/io.h>
18#include <linux/watchdog.h>
19#include <linux/platform_device.h>
20#include <linux/of_address.h>
21#include <linux/of_platform.h>
22
23#define PM_RSTC 0x1c
24#define PM_RSTS 0x20
25#define PM_WDOG 0x24
26
27#define PM_PASSWORD 0x5a000000
28
29#define PM_WDOG_TIME_SET 0x000fffff
30#define PM_RSTC_WRCFG_CLR 0xffffffcf
31#define PM_RSTS_HADWRH_SET 0x00000040
32#define PM_RSTC_WRCFG_SET 0x00000030
33#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
34#define PM_RSTC_RESET 0x00000102
35
36/*
37 * The Raspberry Pi firmware uses the RSTS register to know which partition
38 * to boot from. The partition value is spread into bits 0, 2, 4, 6, 8, 10.
39 * Partition 63 is a special partition used by the firmware to indicate halt.
40 */
41#define PM_RSTS_RASPBERRYPI_HALT 0x555
42
43#define SECS_TO_WDOG_TICKS(x) ((x) << 16)
44#define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
45#define WDOG_TICKS_TO_MSECS(x) ((x) * 1000 >> 16)
46
47struct bcm2835_wdt {
48 void __iomem *base;
49 spinlock_t lock;
50};
51
52static struct bcm2835_wdt *bcm2835_power_off_wdt;
53
54static unsigned int heartbeat;
55static bool nowayout = WATCHDOG_NOWAYOUT;
56
57static bool bcm2835_wdt_is_running(struct bcm2835_wdt *wdt)
58{
59 uint32_t cur;
60
61 cur = readl(wdt->base + PM_RSTC);
62
63 return !!(cur & PM_RSTC_WRCFG_FULL_RESET);
64}
65
66static int bcm2835_wdt_start(struct watchdog_device *wdog)
67{
68 struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
69 uint32_t cur;
70 unsigned long flags;
71
72 spin_lock_irqsave(&wdt->lock, flags);
73
74 writel_relaxed(PM_PASSWORD | (SECS_TO_WDOG_TICKS(wdog->timeout) &
75 PM_WDOG_TIME_SET), wdt->base + PM_WDOG);
76 cur = readl_relaxed(wdt->base + PM_RSTC);
77 writel_relaxed(PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) |
78 PM_RSTC_WRCFG_FULL_RESET, wdt->base + PM_RSTC);
79
80 spin_unlock_irqrestore(&wdt->lock, flags);
81
82 return 0;
83}
84
85static int bcm2835_wdt_stop(struct watchdog_device *wdog)
86{
87 struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
88
89 writel_relaxed(PM_PASSWORD | PM_RSTC_RESET, wdt->base + PM_RSTC);
90 return 0;
91}
92
93static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
94{
95 struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
96
97 uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
98 return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
99}
100
101static void __bcm2835_restart(struct bcm2835_wdt *wdt)
102{
103 u32 val;
104
105 /* use a timeout of 10 ticks (~150us) */
106 writel_relaxed(10 | PM_PASSWORD, wdt->base + PM_WDOG);
107 val = readl_relaxed(wdt->base + PM_RSTC);
108 val &= PM_RSTC_WRCFG_CLR;
109 val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
110 writel_relaxed(val, wdt->base + PM_RSTC);
111
112 /* No sleeping, possibly atomic. */
113 mdelay(1);
114}
115
116static int bcm2835_restart(struct watchdog_device *wdog,
117 unsigned long action, void *data)
118{
119 struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
120
121 __bcm2835_restart(wdt);
122
123 return 0;
124}
125
126static const struct watchdog_ops bcm2835_wdt_ops = {
127 .owner = THIS_MODULE,
128 .start = bcm2835_wdt_start,
129 .stop = bcm2835_wdt_stop,
130 .get_timeleft = bcm2835_wdt_get_timeleft,
131 .restart = bcm2835_restart,
132};
133
134static const struct watchdog_info bcm2835_wdt_info = {
135 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
136 WDIOF_KEEPALIVEPING,
137 .identity = "Broadcom BCM2835 Watchdog timer",
138};
139
140static struct watchdog_device bcm2835_wdt_wdd = {
141 .info = &bcm2835_wdt_info,
142 .ops = &bcm2835_wdt_ops,
143 .min_timeout = 1,
144 .max_hw_heartbeat_ms = WDOG_TICKS_TO_MSECS(PM_WDOG_TIME_SET),
145 .timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
146};
147
148/*
149 * We can't really power off, but if we do the normal reset scheme, and
150 * indicate to bootcode.bin not to reboot, then most of the chip will be
151 * powered off.
152 */
153static void bcm2835_power_off(void)
154{
155 struct bcm2835_wdt *wdt = bcm2835_power_off_wdt;
156 u32 val;
157
158 /*
159 * We set the watchdog hard reset bit here to distinguish this reset
160 * from the normal (full) reset. bootcode.bin will not reboot after a
161 * hard reset.
162 */
163 val = readl_relaxed(wdt->base + PM_RSTS);
164 val |= PM_PASSWORD | PM_RSTS_RASPBERRYPI_HALT;
165 writel_relaxed(val, wdt->base + PM_RSTS);
166
167 /* Continue with normal reset mechanism */
168 __bcm2835_restart(wdt);
169}
170
171static int bcm2835_wdt_probe(struct platform_device *pdev)
172{
173 struct bcm2835_pm *pm = dev_get_drvdata(pdev->dev.parent);
174 struct device *dev = &pdev->dev;
175 struct bcm2835_wdt *wdt;
176 int err;
177
178 wdt = devm_kzalloc(dev, sizeof(struct bcm2835_wdt), GFP_KERNEL);
179 if (!wdt)
180 return -ENOMEM;
181
182 spin_lock_init(&wdt->lock);
183
184 wdt->base = pm->base;
185
186 watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt);
187 watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev);
188 watchdog_set_nowayout(&bcm2835_wdt_wdd, nowayout);
189 bcm2835_wdt_wdd.parent = dev;
190 if (bcm2835_wdt_is_running(wdt)) {
191 /*
192 * The currently active timeout value (set by the
193 * bootloader) may be different from the module
194 * heartbeat parameter or the value in device
195 * tree. But we just need to set WDOG_HW_RUNNING,
196 * because then the framework will "immediately" ping
197 * the device, updating the timeout.
198 */
199 set_bit(WDOG_HW_RUNNING, &bcm2835_wdt_wdd.status);
200 }
201
202 watchdog_set_restart_priority(&bcm2835_wdt_wdd, 128);
203
204 watchdog_stop_on_reboot(&bcm2835_wdt_wdd);
205 err = devm_watchdog_register_device(dev, &bcm2835_wdt_wdd);
206 if (err)
207 return err;
208
209 if (of_device_is_system_power_controller(pdev->dev.parent->of_node)) {
210 if (!pm_power_off) {
211 pm_power_off = bcm2835_power_off;
212 bcm2835_power_off_wdt = wdt;
213 } else {
214 dev_info(dev, "Poweroff handler already present!\n");
215 }
216 }
217
218 dev_info(dev, "Broadcom BCM2835 watchdog timer");
219 return 0;
220}
221
222static void bcm2835_wdt_remove(struct platform_device *pdev)
223{
224 if (pm_power_off == bcm2835_power_off)
225 pm_power_off = NULL;
226}
227
228static struct platform_driver bcm2835_wdt_driver = {
229 .probe = bcm2835_wdt_probe,
230 .remove_new = bcm2835_wdt_remove,
231 .driver = {
232 .name = "bcm2835-wdt",
233 },
234};
235module_platform_driver(bcm2835_wdt_driver);
236
237module_param(heartbeat, uint, 0);
238MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
239
240module_param(nowayout, bool, 0);
241MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
242 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
243
244MODULE_ALIAS("platform:bcm2835-wdt");
245MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
246MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
247MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Watchdog driver for Broadcom BCM2835
4 *
5 * "bcm2708_wdog" driver written by Luke Diamand that was obtained from
6 * branch "rpi-3.6.y" of git://github.com/raspberrypi/linux.git was used
7 * as a hardware reference for the Broadcom BCM2835 watchdog timer.
8 *
9 * Copyright (C) 2013 Lubomir Rintel <lkundrak@v3.sk>
10 *
11 */
12
13#include <linux/delay.h>
14#include <linux/types.h>
15#include <linux/mfd/bcm2835-pm.h>
16#include <linux/module.h>
17#include <linux/io.h>
18#include <linux/watchdog.h>
19#include <linux/platform_device.h>
20#include <linux/of_address.h>
21#include <linux/of_platform.h>
22
23#define PM_RSTC 0x1c
24#define PM_RSTS 0x20
25#define PM_WDOG 0x24
26
27#define PM_PASSWORD 0x5a000000
28
29#define PM_WDOG_TIME_SET 0x000fffff
30#define PM_RSTC_WRCFG_CLR 0xffffffcf
31#define PM_RSTS_HADWRH_SET 0x00000040
32#define PM_RSTC_WRCFG_SET 0x00000030
33#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
34#define PM_RSTC_RESET 0x00000102
35
36/*
37 * The Raspberry Pi firmware uses the RSTS register to know which partition
38 * to boot from. The partition value is spread into bits 0, 2, 4, 6, 8, 10.
39 * Partition 63 is a special partition used by the firmware to indicate halt.
40 */
41#define PM_RSTS_RASPBERRYPI_HALT 0x555
42
43#define SECS_TO_WDOG_TICKS(x) ((x) << 16)
44#define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
45
46struct bcm2835_wdt {
47 void __iomem *base;
48 spinlock_t lock;
49};
50
51static struct bcm2835_wdt *bcm2835_power_off_wdt;
52
53static unsigned int heartbeat;
54static bool nowayout = WATCHDOG_NOWAYOUT;
55
56static bool bcm2835_wdt_is_running(struct bcm2835_wdt *wdt)
57{
58 uint32_t cur;
59
60 cur = readl(wdt->base + PM_RSTC);
61
62 return !!(cur & PM_RSTC_WRCFG_FULL_RESET);
63}
64
65static int bcm2835_wdt_start(struct watchdog_device *wdog)
66{
67 struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
68 uint32_t cur;
69 unsigned long flags;
70
71 spin_lock_irqsave(&wdt->lock, flags);
72
73 writel_relaxed(PM_PASSWORD | (SECS_TO_WDOG_TICKS(wdog->timeout) &
74 PM_WDOG_TIME_SET), wdt->base + PM_WDOG);
75 cur = readl_relaxed(wdt->base + PM_RSTC);
76 writel_relaxed(PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) |
77 PM_RSTC_WRCFG_FULL_RESET, wdt->base + PM_RSTC);
78
79 spin_unlock_irqrestore(&wdt->lock, flags);
80
81 return 0;
82}
83
84static int bcm2835_wdt_stop(struct watchdog_device *wdog)
85{
86 struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
87
88 writel_relaxed(PM_PASSWORD | PM_RSTC_RESET, wdt->base + PM_RSTC);
89 return 0;
90}
91
92static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
93{
94 struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
95
96 uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
97 return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
98}
99
100static void __bcm2835_restart(struct bcm2835_wdt *wdt)
101{
102 u32 val;
103
104 /* use a timeout of 10 ticks (~150us) */
105 writel_relaxed(10 | PM_PASSWORD, wdt->base + PM_WDOG);
106 val = readl_relaxed(wdt->base + PM_RSTC);
107 val &= PM_RSTC_WRCFG_CLR;
108 val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
109 writel_relaxed(val, wdt->base + PM_RSTC);
110
111 /* No sleeping, possibly atomic. */
112 mdelay(1);
113}
114
115static int bcm2835_restart(struct watchdog_device *wdog,
116 unsigned long action, void *data)
117{
118 struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
119
120 __bcm2835_restart(wdt);
121
122 return 0;
123}
124
125static const struct watchdog_ops bcm2835_wdt_ops = {
126 .owner = THIS_MODULE,
127 .start = bcm2835_wdt_start,
128 .stop = bcm2835_wdt_stop,
129 .get_timeleft = bcm2835_wdt_get_timeleft,
130 .restart = bcm2835_restart,
131};
132
133static const struct watchdog_info bcm2835_wdt_info = {
134 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
135 WDIOF_KEEPALIVEPING,
136 .identity = "Broadcom BCM2835 Watchdog timer",
137};
138
139static struct watchdog_device bcm2835_wdt_wdd = {
140 .info = &bcm2835_wdt_info,
141 .ops = &bcm2835_wdt_ops,
142 .min_timeout = 1,
143 .max_timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
144 .timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
145};
146
147/*
148 * We can't really power off, but if we do the normal reset scheme, and
149 * indicate to bootcode.bin not to reboot, then most of the chip will be
150 * powered off.
151 */
152static void bcm2835_power_off(void)
153{
154 struct bcm2835_wdt *wdt = bcm2835_power_off_wdt;
155 u32 val;
156
157 /*
158 * We set the watchdog hard reset bit here to distinguish this reset
159 * from the normal (full) reset. bootcode.bin will not reboot after a
160 * hard reset.
161 */
162 val = readl_relaxed(wdt->base + PM_RSTS);
163 val |= PM_PASSWORD | PM_RSTS_RASPBERRYPI_HALT;
164 writel_relaxed(val, wdt->base + PM_RSTS);
165
166 /* Continue with normal reset mechanism */
167 __bcm2835_restart(wdt);
168}
169
170static int bcm2835_wdt_probe(struct platform_device *pdev)
171{
172 struct bcm2835_pm *pm = dev_get_drvdata(pdev->dev.parent);
173 struct device *dev = &pdev->dev;
174 struct bcm2835_wdt *wdt;
175 int err;
176
177 wdt = devm_kzalloc(dev, sizeof(struct bcm2835_wdt), GFP_KERNEL);
178 if (!wdt)
179 return -ENOMEM;
180
181 spin_lock_init(&wdt->lock);
182
183 wdt->base = pm->base;
184
185 watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt);
186 watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev);
187 watchdog_set_nowayout(&bcm2835_wdt_wdd, nowayout);
188 bcm2835_wdt_wdd.parent = dev;
189 if (bcm2835_wdt_is_running(wdt)) {
190 /*
191 * The currently active timeout value (set by the
192 * bootloader) may be different from the module
193 * heartbeat parameter or the value in device
194 * tree. But we just need to set WDOG_HW_RUNNING,
195 * because then the framework will "immediately" ping
196 * the device, updating the timeout.
197 */
198 set_bit(WDOG_HW_RUNNING, &bcm2835_wdt_wdd.status);
199 }
200
201 watchdog_set_restart_priority(&bcm2835_wdt_wdd, 128);
202
203 watchdog_stop_on_reboot(&bcm2835_wdt_wdd);
204 err = devm_watchdog_register_device(dev, &bcm2835_wdt_wdd);
205 if (err)
206 return err;
207
208 if (of_device_is_system_power_controller(pdev->dev.parent->of_node)) {
209 if (!pm_power_off) {
210 pm_power_off = bcm2835_power_off;
211 bcm2835_power_off_wdt = wdt;
212 } else {
213 dev_info(dev, "Poweroff handler already present!\n");
214 }
215 }
216
217 dev_info(dev, "Broadcom BCM2835 watchdog timer");
218 return 0;
219}
220
221static int bcm2835_wdt_remove(struct platform_device *pdev)
222{
223 if (pm_power_off == bcm2835_power_off)
224 pm_power_off = NULL;
225
226 return 0;
227}
228
229static struct platform_driver bcm2835_wdt_driver = {
230 .probe = bcm2835_wdt_probe,
231 .remove = bcm2835_wdt_remove,
232 .driver = {
233 .name = "bcm2835-wdt",
234 },
235};
236module_platform_driver(bcm2835_wdt_driver);
237
238module_param(heartbeat, uint, 0);
239MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
240
241module_param(nowayout, bool, 0);
242MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
243 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
244
245MODULE_ALIAS("platform:bcm2835-wdt");
246MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
247MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
248MODULE_LICENSE("GPL");