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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * SPI host driver using generic bitbanged GPIO
4 *
5 * Copyright (C) 2006,2008 David Brownell
6 * Copyright (C) 2017 Linus Walleij
7 */
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/platform_device.h>
11#include <linux/gpio/consumer.h>
12#include <linux/of.h>
13
14#include <linux/spi/spi.h>
15#include <linux/spi/spi_bitbang.h>
16#include <linux/spi/spi_gpio.h>
17
18
19/*
20 * This bitbanging SPI host driver should help make systems usable
21 * when a native hardware SPI engine is not available, perhaps because
22 * its driver isn't yet working or because the I/O pins it requires
23 * are used for other purposes.
24 *
25 * platform_device->driver_data ... points to spi_gpio
26 *
27 * spi->controller_state ... reserved for bitbang framework code
28 *
29 * spi->controller->dev.driver_data ... points to spi_gpio->bitbang
30 */
31
32struct spi_gpio {
33 struct spi_bitbang bitbang;
34 struct gpio_desc *sck;
35 struct gpio_desc *miso;
36 struct gpio_desc *mosi;
37 struct gpio_desc **cs_gpios;
38};
39
40/*----------------------------------------------------------------------*/
41
42/*
43 * Because the overhead of going through four GPIO procedure calls
44 * per transferred bit can make performance a problem, this code
45 * is set up so that you can use it in either of two ways:
46 *
47 * - The slow generic way: set up platform_data to hold the GPIO
48 * numbers used for MISO/MOSI/SCK, and issue procedure calls for
49 * each of them. This driver can handle several such busses.
50 *
51 * - The quicker inlined way: only helps with platform GPIO code
52 * that inlines operations for constant GPIOs. This can give
53 * you tight (fast!) inner loops, but each such bus needs a
54 * new driver. You'll define a new C file, with Makefile and
55 * Kconfig support; the C code can be a total of six lines:
56 *
57 * #define DRIVER_NAME "myboard_spi2"
58 * #define SPI_MISO_GPIO 119
59 * #define SPI_MOSI_GPIO 120
60 * #define SPI_SCK_GPIO 121
61 * #define SPI_N_CHIPSEL 4
62 * #include "spi-gpio.c"
63 */
64
65#ifndef DRIVER_NAME
66#define DRIVER_NAME "spi_gpio"
67
68#define GENERIC_BITBANG /* vs tight inlines */
69
70#endif
71
72/*----------------------------------------------------------------------*/
73
74static inline struct spi_gpio *__pure
75spi_to_spi_gpio(const struct spi_device *spi)
76{
77 const struct spi_bitbang *bang;
78 struct spi_gpio *spi_gpio;
79
80 bang = spi_controller_get_devdata(spi->controller);
81 spi_gpio = container_of(bang, struct spi_gpio, bitbang);
82 return spi_gpio;
83}
84
85/* These helpers are in turn called by the bitbang inlines */
86static inline void setsck(const struct spi_device *spi, int is_on)
87{
88 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
89
90 gpiod_set_value_cansleep(spi_gpio->sck, is_on);
91}
92
93static inline void setmosi(const struct spi_device *spi, int is_on)
94{
95 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
96
97 gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
98}
99
100static inline int getmiso(const struct spi_device *spi)
101{
102 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
103
104 if (spi->mode & SPI_3WIRE)
105 return !!gpiod_get_value_cansleep(spi_gpio->mosi);
106 else
107 return !!gpiod_get_value_cansleep(spi_gpio->miso);
108}
109
110/*
111 * NOTE: this clocks "as fast as we can". It "should" be a function of the
112 * requested device clock. Software overhead means we usually have trouble
113 * reaching even one Mbit/sec (except when we can inline bitops), so for now
114 * we'll just assume we never need additional per-bit slowdowns.
115 */
116#define spidelay(nsecs) do {} while (0)
117
118#include "spi-bitbang-txrx.h"
119
120/*
121 * These functions can leverage inline expansion of GPIO calls to shrink
122 * costs for a txrx bit, often by factors of around ten (by instruction
123 * count). That is particularly visible for larger word sizes, but helps
124 * even with default 8-bit words.
125 *
126 * REVISIT overheads calling these functions for each word also have
127 * significant performance costs. Having txrx_bufs() calls that inline
128 * the txrx_word() logic would help performance, e.g. on larger blocks
129 * used with flash storage or MMC/SD. There should also be ways to make
130 * GCC be less stupid about reloading registers inside the I/O loops,
131 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
132 */
133
134static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
135 unsigned nsecs, u32 word, u8 bits, unsigned flags)
136{
137 if (unlikely(spi->mode & SPI_LSB_FIRST))
138 return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
139 else
140 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
141}
142
143static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
144 unsigned nsecs, u32 word, u8 bits, unsigned flags)
145{
146 if (unlikely(spi->mode & SPI_LSB_FIRST))
147 return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
148 else
149 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
150}
151
152static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
153 unsigned nsecs, u32 word, u8 bits, unsigned flags)
154{
155 if (unlikely(spi->mode & SPI_LSB_FIRST))
156 return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
157 else
158 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
159}
160
161static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
162 unsigned nsecs, u32 word, u8 bits, unsigned flags)
163{
164 if (unlikely(spi->mode & SPI_LSB_FIRST))
165 return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
166 else
167 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
168}
169
170/*
171 * These functions do not call setmosi or getmiso if respective flag
172 * (SPI_CONTROLLER_NO_RX or SPI_CONTROLLER_NO_TX) is set, so they are safe to
173 * call when such pin is not present or defined in the controller.
174 * A separate set of callbacks is defined to get highest possible
175 * speed in the generic case (when both MISO and MOSI lines are
176 * available), as optimiser will remove the checks when argument is
177 * constant.
178 */
179
180static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
181 unsigned nsecs, u32 word, u8 bits, unsigned flags)
182{
183 flags = spi->controller->flags;
184 if (unlikely(spi->mode & SPI_LSB_FIRST))
185 return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
186 else
187 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
188}
189
190static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
191 unsigned nsecs, u32 word, u8 bits, unsigned flags)
192{
193 flags = spi->controller->flags;
194 if (unlikely(spi->mode & SPI_LSB_FIRST))
195 return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
196 else
197 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
198}
199
200static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
201 unsigned nsecs, u32 word, u8 bits, unsigned flags)
202{
203 flags = spi->controller->flags;
204 if (unlikely(spi->mode & SPI_LSB_FIRST))
205 return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
206 else
207 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
208}
209
210static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
211 unsigned nsecs, u32 word, u8 bits, unsigned flags)
212{
213 flags = spi->controller->flags;
214 if (unlikely(spi->mode & SPI_LSB_FIRST))
215 return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
216 else
217 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
218}
219
220/*----------------------------------------------------------------------*/
221
222static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
223{
224 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
225
226 /* set initial clock line level */
227 if (is_active)
228 gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
229
230 /* Drive chip select line, if we have one */
231 if (spi_gpio->cs_gpios) {
232 struct gpio_desc *cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];
233
234 /* SPI chip selects are normally active-low */
235 gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
236 }
237}
238
239static int spi_gpio_setup(struct spi_device *spi)
240{
241 struct gpio_desc *cs;
242 int status = 0;
243 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
244
245 /*
246 * The CS GPIOs have already been
247 * initialized from the descriptor lookup.
248 */
249 if (spi_gpio->cs_gpios) {
250 cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];
251 if (!spi->controller_state && cs)
252 status = gpiod_direction_output(cs,
253 !(spi->mode & SPI_CS_HIGH));
254 }
255
256 if (!status)
257 status = spi_bitbang_setup(spi);
258
259 return status;
260}
261
262static int spi_gpio_set_direction(struct spi_device *spi, bool output)
263{
264 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
265 int ret;
266
267 if (output)
268 return gpiod_direction_output(spi_gpio->mosi, 1);
269
270 /*
271 * Only change MOSI to an input if using 3WIRE mode.
272 * Otherwise, MOSI could be left floating if there is
273 * no pull resistor connected to the I/O pin, or could
274 * be left logic high if there is a pull-up. Transmitting
275 * logic high when only clocking MISO data in can put some
276 * SPI devices in to a bad state.
277 */
278 if (spi->mode & SPI_3WIRE) {
279 ret = gpiod_direction_input(spi_gpio->mosi);
280 if (ret)
281 return ret;
282 }
283 /*
284 * Send a turnaround high impedance cycle when switching
285 * from output to input. Theoretically there should be
286 * a clock delay here, but as has been noted above, the
287 * nsec delay function for bit-banged GPIO is simply
288 * {} because bit-banging just doesn't get fast enough
289 * anyway.
290 */
291 if (spi->mode & SPI_3WIRE_HIZ) {
292 gpiod_set_value_cansleep(spi_gpio->sck,
293 !(spi->mode & SPI_CPOL));
294 gpiod_set_value_cansleep(spi_gpio->sck,
295 !!(spi->mode & SPI_CPOL));
296 }
297 return 0;
298}
299
300static void spi_gpio_cleanup(struct spi_device *spi)
301{
302 spi_bitbang_cleanup(spi);
303}
304
305/*
306 * It can be convenient to use this driver with pins that have alternate
307 * functions associated with a "native" SPI controller if a driver for that
308 * controller is not available, or is missing important functionality.
309 *
310 * On platforms which can do so, configure MISO with a weak pullup unless
311 * there's an external pullup on that signal. That saves power by avoiding
312 * floating signals. (A weak pulldown would save power too, but many
313 * drivers expect to see all-ones data as the no target "response".)
314 */
315static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
316{
317 spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
318 if (IS_ERR(spi_gpio->mosi))
319 return PTR_ERR(spi_gpio->mosi);
320
321 spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
322 if (IS_ERR(spi_gpio->miso))
323 return PTR_ERR(spi_gpio->miso);
324
325 spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
326 return PTR_ERR_OR_ZERO(spi_gpio->sck);
327}
328
329#ifdef CONFIG_OF
330static const struct of_device_id spi_gpio_dt_ids[] = {
331 { .compatible = "spi-gpio" },
332 {}
333};
334MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
335
336static int spi_gpio_probe_dt(struct platform_device *pdev,
337 struct spi_controller *host)
338{
339 host->dev.of_node = pdev->dev.of_node;
340 host->use_gpio_descriptors = true;
341
342 return 0;
343}
344#else
345static inline int spi_gpio_probe_dt(struct platform_device *pdev,
346 struct spi_controller *host)
347{
348 return 0;
349}
350#endif
351
352static int spi_gpio_probe_pdata(struct platform_device *pdev,
353 struct spi_controller *host)
354{
355 struct device *dev = &pdev->dev;
356 struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
357 struct spi_gpio *spi_gpio = spi_controller_get_devdata(host);
358 int i;
359
360#ifdef GENERIC_BITBANG
361 if (!pdata || !pdata->num_chipselect)
362 return -ENODEV;
363#endif
364 /*
365 * The host needs to think there is a chipselect even if not
366 * connected
367 */
368 host->num_chipselect = pdata->num_chipselect ?: 1;
369
370 spi_gpio->cs_gpios = devm_kcalloc(dev, host->num_chipselect,
371 sizeof(*spi_gpio->cs_gpios),
372 GFP_KERNEL);
373 if (!spi_gpio->cs_gpios)
374 return -ENOMEM;
375
376 for (i = 0; i < host->num_chipselect; i++) {
377 spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
378 GPIOD_OUT_HIGH);
379 if (IS_ERR(spi_gpio->cs_gpios[i]))
380 return PTR_ERR(spi_gpio->cs_gpios[i]);
381 }
382
383 return 0;
384}
385
386static int spi_gpio_probe(struct platform_device *pdev)
387{
388 int status;
389 struct spi_controller *host;
390 struct spi_gpio *spi_gpio;
391 struct device *dev = &pdev->dev;
392 struct spi_bitbang *bb;
393
394 host = devm_spi_alloc_host(dev, sizeof(*spi_gpio));
395 if (!host)
396 return -ENOMEM;
397
398 if (pdev->dev.of_node)
399 status = spi_gpio_probe_dt(pdev, host);
400 else
401 status = spi_gpio_probe_pdata(pdev, host);
402
403 if (status)
404 return status;
405
406 spi_gpio = spi_controller_get_devdata(host);
407
408 status = spi_gpio_request(dev, spi_gpio);
409 if (status)
410 return status;
411
412 host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
413 host->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
414 SPI_CS_HIGH | SPI_LSB_FIRST;
415 if (!spi_gpio->mosi) {
416 /* HW configuration without MOSI pin
417 *
418 * No setting SPI_CONTROLLER_NO_RX here - if there is only
419 * a MOSI pin connected the host can still do RX by
420 * changing the direction of the line.
421 */
422 host->flags = SPI_CONTROLLER_NO_TX;
423 }
424
425 host->bus_num = pdev->id;
426 host->setup = spi_gpio_setup;
427 host->cleanup = spi_gpio_cleanup;
428
429 bb = &spi_gpio->bitbang;
430 bb->master = host;
431 /*
432 * There is some additional business, apart from driving the CS GPIO
433 * line, that we need to do on selection. This makes the local
434 * callback for chipselect always get called.
435 */
436 host->flags |= SPI_CONTROLLER_GPIO_SS;
437 bb->chipselect = spi_gpio_chipselect;
438 bb->set_line_direction = spi_gpio_set_direction;
439
440 if (host->flags & SPI_CONTROLLER_NO_TX) {
441 bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
442 bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
443 bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
444 bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
445 } else {
446 bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
447 bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
448 bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
449 bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
450 }
451 bb->setup_transfer = spi_bitbang_setup_transfer;
452
453 status = spi_bitbang_init(&spi_gpio->bitbang);
454 if (status)
455 return status;
456
457 return devm_spi_register_controller(&pdev->dev, host);
458}
459
460MODULE_ALIAS("platform:" DRIVER_NAME);
461
462static struct platform_driver spi_gpio_driver = {
463 .driver = {
464 .name = DRIVER_NAME,
465 .of_match_table = of_match_ptr(spi_gpio_dt_ids),
466 },
467 .probe = spi_gpio_probe,
468};
469module_platform_driver(spi_gpio_driver);
470
471MODULE_DESCRIPTION("SPI host driver using generic bitbanged GPIO ");
472MODULE_AUTHOR("David Brownell");
473MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * SPI master driver using generic bitbanged GPIO
4 *
5 * Copyright (C) 2006,2008 David Brownell
6 * Copyright (C) 2017 Linus Walleij
7 */
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/platform_device.h>
11#include <linux/gpio/consumer.h>
12#include <linux/of.h>
13#include <linux/of_device.h>
14
15#include <linux/spi/spi.h>
16#include <linux/spi/spi_bitbang.h>
17#include <linux/spi/spi_gpio.h>
18
19
20/*
21 * This bitbanging SPI master driver should help make systems usable
22 * when a native hardware SPI engine is not available, perhaps because
23 * its driver isn't yet working or because the I/O pins it requires
24 * are used for other purposes.
25 *
26 * platform_device->driver_data ... points to spi_gpio
27 *
28 * spi->controller_state ... reserved for bitbang framework code
29 *
30 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
31 */
32
33struct spi_gpio {
34 struct spi_bitbang bitbang;
35 struct gpio_desc *sck;
36 struct gpio_desc *miso;
37 struct gpio_desc *mosi;
38 struct gpio_desc **cs_gpios;
39};
40
41/*----------------------------------------------------------------------*/
42
43/*
44 * Because the overhead of going through four GPIO procedure calls
45 * per transferred bit can make performance a problem, this code
46 * is set up so that you can use it in either of two ways:
47 *
48 * - The slow generic way: set up platform_data to hold the GPIO
49 * numbers used for MISO/MOSI/SCK, and issue procedure calls for
50 * each of them. This driver can handle several such busses.
51 *
52 * - The quicker inlined way: only helps with platform GPIO code
53 * that inlines operations for constant GPIOs. This can give
54 * you tight (fast!) inner loops, but each such bus needs a
55 * new driver. You'll define a new C file, with Makefile and
56 * Kconfig support; the C code can be a total of six lines:
57 *
58 * #define DRIVER_NAME "myboard_spi2"
59 * #define SPI_MISO_GPIO 119
60 * #define SPI_MOSI_GPIO 120
61 * #define SPI_SCK_GPIO 121
62 * #define SPI_N_CHIPSEL 4
63 * #include "spi-gpio.c"
64 */
65
66#ifndef DRIVER_NAME
67#define DRIVER_NAME "spi_gpio"
68
69#define GENERIC_BITBANG /* vs tight inlines */
70
71#endif
72
73/*----------------------------------------------------------------------*/
74
75static inline struct spi_gpio *__pure
76spi_to_spi_gpio(const struct spi_device *spi)
77{
78 const struct spi_bitbang *bang;
79 struct spi_gpio *spi_gpio;
80
81 bang = spi_master_get_devdata(spi->master);
82 spi_gpio = container_of(bang, struct spi_gpio, bitbang);
83 return spi_gpio;
84}
85
86/* These helpers are in turn called by the bitbang inlines */
87static inline void setsck(const struct spi_device *spi, int is_on)
88{
89 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
90
91 gpiod_set_value_cansleep(spi_gpio->sck, is_on);
92}
93
94static inline void setmosi(const struct spi_device *spi, int is_on)
95{
96 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
97
98 gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
99}
100
101static inline int getmiso(const struct spi_device *spi)
102{
103 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
104
105 if (spi->mode & SPI_3WIRE)
106 return !!gpiod_get_value_cansleep(spi_gpio->mosi);
107 else
108 return !!gpiod_get_value_cansleep(spi_gpio->miso);
109}
110
111/*
112 * NOTE: this clocks "as fast as we can". It "should" be a function of the
113 * requested device clock. Software overhead means we usually have trouble
114 * reaching even one Mbit/sec (except when we can inline bitops), so for now
115 * we'll just assume we never need additional per-bit slowdowns.
116 */
117#define spidelay(nsecs) do {} while (0)
118
119#include "spi-bitbang-txrx.h"
120
121/*
122 * These functions can leverage inline expansion of GPIO calls to shrink
123 * costs for a txrx bit, often by factors of around ten (by instruction
124 * count). That is particularly visible for larger word sizes, but helps
125 * even with default 8-bit words.
126 *
127 * REVISIT overheads calling these functions for each word also have
128 * significant performance costs. Having txrx_bufs() calls that inline
129 * the txrx_word() logic would help performance, e.g. on larger blocks
130 * used with flash storage or MMC/SD. There should also be ways to make
131 * GCC be less stupid about reloading registers inside the I/O loops,
132 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
133 */
134
135static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
136 unsigned nsecs, u32 word, u8 bits, unsigned flags)
137{
138 if (unlikely(spi->mode & SPI_LSB_FIRST))
139 return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
140 else
141 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
142}
143
144static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
145 unsigned nsecs, u32 word, u8 bits, unsigned flags)
146{
147 if (unlikely(spi->mode & SPI_LSB_FIRST))
148 return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
149 else
150 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
151}
152
153static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
154 unsigned nsecs, u32 word, u8 bits, unsigned flags)
155{
156 if (unlikely(spi->mode & SPI_LSB_FIRST))
157 return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
158 else
159 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
160}
161
162static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
163 unsigned nsecs, u32 word, u8 bits, unsigned flags)
164{
165 if (unlikely(spi->mode & SPI_LSB_FIRST))
166 return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
167 else
168 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
169}
170
171/*
172 * These functions do not call setmosi or getmiso if respective flag
173 * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
174 * call when such pin is not present or defined in the controller.
175 * A separate set of callbacks is defined to get highest possible
176 * speed in the generic case (when both MISO and MOSI lines are
177 * available), as optimiser will remove the checks when argument is
178 * constant.
179 */
180
181static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
182 unsigned nsecs, u32 word, u8 bits, unsigned flags)
183{
184 flags = spi->master->flags;
185 if (unlikely(spi->mode & SPI_LSB_FIRST))
186 return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
187 else
188 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
189}
190
191static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
192 unsigned nsecs, u32 word, u8 bits, unsigned flags)
193{
194 flags = spi->master->flags;
195 if (unlikely(spi->mode & SPI_LSB_FIRST))
196 return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
197 else
198 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
199}
200
201static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
202 unsigned nsecs, u32 word, u8 bits, unsigned flags)
203{
204 flags = spi->master->flags;
205 if (unlikely(spi->mode & SPI_LSB_FIRST))
206 return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
207 else
208 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
209}
210
211static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
212 unsigned nsecs, u32 word, u8 bits, unsigned flags)
213{
214 flags = spi->master->flags;
215 if (unlikely(spi->mode & SPI_LSB_FIRST))
216 return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
217 else
218 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
219}
220
221/*----------------------------------------------------------------------*/
222
223static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
224{
225 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
226
227 /* set initial clock line level */
228 if (is_active)
229 gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
230
231 /* Drive chip select line, if we have one */
232 if (spi_gpio->cs_gpios) {
233 struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
234
235 /* SPI chip selects are normally active-low */
236 gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
237 }
238}
239
240static int spi_gpio_setup(struct spi_device *spi)
241{
242 struct gpio_desc *cs;
243 int status = 0;
244 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
245
246 /*
247 * The CS GPIOs have already been
248 * initialized from the descriptor lookup.
249 */
250 if (spi_gpio->cs_gpios) {
251 cs = spi_gpio->cs_gpios[spi->chip_select];
252 if (!spi->controller_state && cs)
253 status = gpiod_direction_output(cs,
254 !(spi->mode & SPI_CS_HIGH));
255 }
256
257 if (!status)
258 status = spi_bitbang_setup(spi);
259
260 return status;
261}
262
263static int spi_gpio_set_direction(struct spi_device *spi, bool output)
264{
265 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
266 int ret;
267
268 if (output)
269 return gpiod_direction_output(spi_gpio->mosi, 1);
270
271 /*
272 * Only change MOSI to an input if using 3WIRE mode.
273 * Otherwise, MOSI could be left floating if there is
274 * no pull resistor connected to the I/O pin, or could
275 * be left logic high if there is a pull-up. Transmitting
276 * logic high when only clocking MISO data in can put some
277 * SPI devices in to a bad state.
278 */
279 if (spi->mode & SPI_3WIRE) {
280 ret = gpiod_direction_input(spi_gpio->mosi);
281 if (ret)
282 return ret;
283 }
284 /*
285 * Send a turnaround high impedance cycle when switching
286 * from output to input. Theoretically there should be
287 * a clock delay here, but as has been noted above, the
288 * nsec delay function for bit-banged GPIO is simply
289 * {} because bit-banging just doesn't get fast enough
290 * anyway.
291 */
292 if (spi->mode & SPI_3WIRE_HIZ) {
293 gpiod_set_value_cansleep(spi_gpio->sck,
294 !(spi->mode & SPI_CPOL));
295 gpiod_set_value_cansleep(spi_gpio->sck,
296 !!(spi->mode & SPI_CPOL));
297 }
298 return 0;
299}
300
301static void spi_gpio_cleanup(struct spi_device *spi)
302{
303 spi_bitbang_cleanup(spi);
304}
305
306/*
307 * It can be convenient to use this driver with pins that have alternate
308 * functions associated with a "native" SPI controller if a driver for that
309 * controller is not available, or is missing important functionality.
310 *
311 * On platforms which can do so, configure MISO with a weak pullup unless
312 * there's an external pullup on that signal. That saves power by avoiding
313 * floating signals. (A weak pulldown would save power too, but many
314 * drivers expect to see all-ones data as the no slave "response".)
315 */
316static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
317{
318 spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
319 if (IS_ERR(spi_gpio->mosi))
320 return PTR_ERR(spi_gpio->mosi);
321
322 spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
323 if (IS_ERR(spi_gpio->miso))
324 return PTR_ERR(spi_gpio->miso);
325
326 spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
327 return PTR_ERR_OR_ZERO(spi_gpio->sck);
328}
329
330#ifdef CONFIG_OF
331static const struct of_device_id spi_gpio_dt_ids[] = {
332 { .compatible = "spi-gpio" },
333 {}
334};
335MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
336
337static int spi_gpio_probe_dt(struct platform_device *pdev,
338 struct spi_master *master)
339{
340 master->dev.of_node = pdev->dev.of_node;
341 master->use_gpio_descriptors = true;
342
343 return 0;
344}
345#else
346static inline int spi_gpio_probe_dt(struct platform_device *pdev,
347 struct spi_master *master)
348{
349 return 0;
350}
351#endif
352
353static int spi_gpio_probe_pdata(struct platform_device *pdev,
354 struct spi_master *master)
355{
356 struct device *dev = &pdev->dev;
357 struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
358 struct spi_gpio *spi_gpio = spi_master_get_devdata(master);
359 int i;
360
361#ifdef GENERIC_BITBANG
362 if (!pdata || !pdata->num_chipselect)
363 return -ENODEV;
364#endif
365 /*
366 * The master needs to think there is a chipselect even if not
367 * connected
368 */
369 master->num_chipselect = pdata->num_chipselect ?: 1;
370
371 spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect,
372 sizeof(*spi_gpio->cs_gpios),
373 GFP_KERNEL);
374 if (!spi_gpio->cs_gpios)
375 return -ENOMEM;
376
377 for (i = 0; i < master->num_chipselect; i++) {
378 spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
379 GPIOD_OUT_HIGH);
380 if (IS_ERR(spi_gpio->cs_gpios[i]))
381 return PTR_ERR(spi_gpio->cs_gpios[i]);
382 }
383
384 return 0;
385}
386
387static int spi_gpio_probe(struct platform_device *pdev)
388{
389 int status;
390 struct spi_master *master;
391 struct spi_gpio *spi_gpio;
392 struct device *dev = &pdev->dev;
393 struct spi_bitbang *bb;
394
395 master = devm_spi_alloc_master(dev, sizeof(*spi_gpio));
396 if (!master)
397 return -ENOMEM;
398
399 if (pdev->dev.of_node)
400 status = spi_gpio_probe_dt(pdev, master);
401 else
402 status = spi_gpio_probe_pdata(pdev, master);
403
404 if (status)
405 return status;
406
407 spi_gpio = spi_master_get_devdata(master);
408
409 status = spi_gpio_request(dev, spi_gpio);
410 if (status)
411 return status;
412
413 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
414 master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
415 SPI_CS_HIGH | SPI_LSB_FIRST;
416 if (!spi_gpio->mosi) {
417 /* HW configuration without MOSI pin
418 *
419 * No setting SPI_MASTER_NO_RX here - if there is only
420 * a MOSI pin connected the host can still do RX by
421 * changing the direction of the line.
422 */
423 master->flags = SPI_MASTER_NO_TX;
424 }
425
426 master->bus_num = pdev->id;
427 master->setup = spi_gpio_setup;
428 master->cleanup = spi_gpio_cleanup;
429
430 bb = &spi_gpio->bitbang;
431 bb->master = master;
432 /*
433 * There is some additional business, apart from driving the CS GPIO
434 * line, that we need to do on selection. This makes the local
435 * callback for chipselect always get called.
436 */
437 master->flags |= SPI_MASTER_GPIO_SS;
438 bb->chipselect = spi_gpio_chipselect;
439 bb->set_line_direction = spi_gpio_set_direction;
440
441 if (master->flags & SPI_MASTER_NO_TX) {
442 bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
443 bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
444 bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
445 bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
446 } else {
447 bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
448 bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
449 bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
450 bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
451 }
452 bb->setup_transfer = spi_bitbang_setup_transfer;
453
454 status = spi_bitbang_init(&spi_gpio->bitbang);
455 if (status)
456 return status;
457
458 return devm_spi_register_master(&pdev->dev, master);
459}
460
461MODULE_ALIAS("platform:" DRIVER_NAME);
462
463static struct platform_driver spi_gpio_driver = {
464 .driver = {
465 .name = DRIVER_NAME,
466 .of_match_table = of_match_ptr(spi_gpio_dt_ids),
467 },
468 .probe = spi_gpio_probe,
469};
470module_platform_driver(spi_gpio_driver);
471
472MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
473MODULE_AUTHOR("David Brownell");
474MODULE_LICENSE("GPL");