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1// SPDX-License-Identifier: ISC
2/* Copyright (C) 2020 MediaTek Inc. */
3
4#include <linux/firmware.h>
5#include "mt76_connac2_mac.h"
6#include "mt76_connac_mcu.h"
7
8int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option)
9{
10 struct {
11 __le32 option;
12 __le32 addr;
13 } req = {
14 .option = cpu_to_le32(option),
15 .addr = cpu_to_le32(addr),
16 };
17
18 return mt76_mcu_send_msg(dev, MCU_CMD(FW_START_REQ), &req,
19 sizeof(req), true);
20}
21EXPORT_SYMBOL_GPL(mt76_connac_mcu_start_firmware);
22
23int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get)
24{
25 u32 op = get ? PATCH_SEM_GET : PATCH_SEM_RELEASE;
26 struct {
27 __le32 op;
28 } req = {
29 .op = cpu_to_le32(op),
30 };
31
32 return mt76_mcu_send_msg(dev, MCU_CMD(PATCH_SEM_CONTROL),
33 &req, sizeof(req), true);
34}
35EXPORT_SYMBOL_GPL(mt76_connac_mcu_patch_sem_ctrl);
36
37int mt76_connac_mcu_start_patch(struct mt76_dev *dev)
38{
39 struct {
40 u8 check_crc;
41 u8 reserved[3];
42 } req = {
43 .check_crc = 0,
44 };
45
46 return mt76_mcu_send_msg(dev, MCU_CMD(PATCH_FINISH_REQ),
47 &req, sizeof(req), true);
48}
49EXPORT_SYMBOL_GPL(mt76_connac_mcu_start_patch);
50
51#define MCU_PATCH_ADDRESS 0x200000
52
53int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len,
54 u32 mode)
55{
56 struct {
57 __le32 addr;
58 __le32 len;
59 __le32 mode;
60 } req = {
61 .addr = cpu_to_le32(addr),
62 .len = cpu_to_le32(len),
63 .mode = cpu_to_le32(mode),
64 };
65 int cmd;
66
67 if ((!is_connac_v1(dev) && addr == MCU_PATCH_ADDRESS) ||
68 (is_mt7921(dev) && addr == 0x900000) ||
69 (is_mt7925(dev) && addr == 0x900000) ||
70 (is_mt7996(dev) && addr == 0x900000) ||
71 (is_mt7992(dev) && addr == 0x900000))
72 cmd = MCU_CMD(PATCH_START_REQ);
73 else
74 cmd = MCU_CMD(TARGET_ADDRESS_LEN_REQ);
75
76 return mt76_mcu_send_msg(dev, cmd, &req, sizeof(req), true);
77}
78EXPORT_SYMBOL_GPL(mt76_connac_mcu_init_download);
79
80int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy)
81{
82 int len, i, n_max_channels, n_2ch = 0, n_5ch = 0, n_6ch = 0;
83 struct mt76_connac_mcu_channel_domain {
84 u8 alpha2[4]; /* regulatory_request.alpha2 */
85 u8 bw_2g; /* BW_20_40M 0
86 * BW_20M 1
87 * BW_20_40_80M 2
88 * BW_20_40_80_160M 3
89 * BW_20_40_80_8080M 4
90 */
91 u8 bw_5g;
92 u8 bw_6g;
93 u8 pad;
94 u8 n_2ch;
95 u8 n_5ch;
96 u8 n_6ch;
97 u8 pad2;
98 } __packed hdr = {
99 .bw_2g = 0,
100 .bw_5g = 3, /* BW_20_40_80_160M */
101 .bw_6g = 3,
102 };
103 struct mt76_connac_mcu_chan {
104 __le16 hw_value;
105 __le16 pad;
106 __le32 flags;
107 } __packed channel;
108 struct mt76_dev *dev = phy->dev;
109 struct ieee80211_channel *chan;
110 struct sk_buff *skb;
111
112 n_max_channels = phy->sband_2g.sband.n_channels +
113 phy->sband_5g.sband.n_channels +
114 phy->sband_6g.sband.n_channels;
115 len = sizeof(hdr) + n_max_channels * sizeof(channel);
116
117 skb = mt76_mcu_msg_alloc(dev, NULL, len);
118 if (!skb)
119 return -ENOMEM;
120
121 skb_reserve(skb, sizeof(hdr));
122
123 for (i = 0; i < phy->sband_2g.sband.n_channels; i++) {
124 chan = &phy->sband_2g.sband.channels[i];
125 if (chan->flags & IEEE80211_CHAN_DISABLED)
126 continue;
127
128 channel.hw_value = cpu_to_le16(chan->hw_value);
129 channel.flags = cpu_to_le32(chan->flags);
130 channel.pad = 0;
131
132 skb_put_data(skb, &channel, sizeof(channel));
133 n_2ch++;
134 }
135 for (i = 0; i < phy->sband_5g.sband.n_channels; i++) {
136 chan = &phy->sband_5g.sband.channels[i];
137 if (chan->flags & IEEE80211_CHAN_DISABLED)
138 continue;
139
140 channel.hw_value = cpu_to_le16(chan->hw_value);
141 channel.flags = cpu_to_le32(chan->flags);
142 channel.pad = 0;
143
144 skb_put_data(skb, &channel, sizeof(channel));
145 n_5ch++;
146 }
147 for (i = 0; i < phy->sband_6g.sband.n_channels; i++) {
148 chan = &phy->sband_6g.sband.channels[i];
149 if (chan->flags & IEEE80211_CHAN_DISABLED)
150 continue;
151
152 channel.hw_value = cpu_to_le16(chan->hw_value);
153 channel.flags = cpu_to_le32(chan->flags);
154 channel.pad = 0;
155
156 skb_put_data(skb, &channel, sizeof(channel));
157 n_6ch++;
158 }
159
160 BUILD_BUG_ON(sizeof(dev->alpha2) > sizeof(hdr.alpha2));
161 memcpy(hdr.alpha2, dev->alpha2, sizeof(dev->alpha2));
162 hdr.n_2ch = n_2ch;
163 hdr.n_5ch = n_5ch;
164 hdr.n_6ch = n_6ch;
165
166 memcpy(__skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr));
167
168 return mt76_mcu_skb_send_msg(dev, skb, MCU_CE_CMD(SET_CHAN_DOMAIN),
169 false);
170}
171EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_channel_domain);
172
173int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable,
174 bool hdr_trans)
175{
176 struct {
177 u8 enable;
178 u8 band;
179 u8 rsv[2];
180 } __packed req_mac = {
181 .enable = enable,
182 .band = band,
183 };
184
185 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(MAC_INIT_CTRL), &req_mac,
186 sizeof(req_mac), true);
187}
188EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_mac_enable);
189
190int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif)
191{
192 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
193 struct {
194 u8 bss_idx;
195 u8 ps_state; /* 0: device awake
196 * 1: static power save
197 * 2: dynamic power saving
198 */
199 } req = {
200 .bss_idx = mvif->idx,
201 .ps_state = vif->cfg.ps ? 2 : 0,
202 };
203
204 if (vif->type != NL80211_IFTYPE_STATION)
205 return -EOPNOTSUPP;
206
207 return mt76_mcu_send_msg(dev, MCU_CE_CMD(SET_PS_PROFILE),
208 &req, sizeof(req), false);
209}
210EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_vif_ps);
211
212int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band)
213{
214 struct {
215 u8 prot_idx;
216 u8 band;
217 u8 rsv[2];
218 __le32 len_thresh;
219 __le32 pkt_thresh;
220 } __packed req = {
221 .prot_idx = 1,
222 .band = band,
223 .len_thresh = cpu_to_le32(val),
224 .pkt_thresh = cpu_to_le32(0x2),
225 };
226
227 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(PROTECT_CTRL), &req,
228 sizeof(req), true);
229}
230EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_rts_thresh);
231
232void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac,
233 struct ieee80211_vif *vif)
234{
235 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
236 struct mt76_connac_beacon_loss_event *event = priv;
237
238 if (mvif->idx != event->bss_idx)
239 return;
240
241 if (!(vif->driver_flags & IEEE80211_VIF_BEACON_FILTER))
242 return;
243
244 ieee80211_beacon_loss(vif);
245}
246EXPORT_SYMBOL_GPL(mt76_connac_mcu_beacon_loss_iter);
247
248struct tlv *
249mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, int len,
250 void *sta_ntlv, void *sta_wtbl)
251{
252 struct sta_ntlv_hdr *ntlv_hdr = sta_ntlv;
253 struct tlv *sta_hdr = sta_wtbl;
254 struct tlv *ptlv, tlv = {
255 .tag = cpu_to_le16(tag),
256 .len = cpu_to_le16(len),
257 };
258 u16 ntlv;
259
260 ptlv = skb_put(skb, len);
261 memcpy(ptlv, &tlv, sizeof(tlv));
262
263 ntlv = le16_to_cpu(ntlv_hdr->tlv_num);
264 ntlv_hdr->tlv_num = cpu_to_le16(ntlv + 1);
265
266 if (sta_hdr) {
267 len += le16_to_cpu(sta_hdr->len);
268 sta_hdr->len = cpu_to_le16(len);
269 }
270
271 return ptlv;
272}
273EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_nested_tlv);
274
275struct sk_buff *
276__mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif,
277 struct mt76_wcid *wcid, int len)
278{
279 struct sta_req_hdr hdr = {
280 .bss_idx = mvif->idx,
281 .muar_idx = wcid ? mvif->omac_idx : 0,
282 .is_tlv_append = 1,
283 };
284 struct sk_buff *skb;
285
286 mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo,
287 &hdr.wlan_idx_hi);
288 skb = mt76_mcu_msg_alloc(dev, NULL, len);
289 if (!skb)
290 return ERR_PTR(-ENOMEM);
291
292 skb_put_data(skb, &hdr, sizeof(hdr));
293
294 return skb;
295}
296EXPORT_SYMBOL_GPL(__mt76_connac_mcu_alloc_sta_req);
297
298struct wtbl_req_hdr *
299mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid,
300 int cmd, void *sta_wtbl, struct sk_buff **skb)
301{
302 struct tlv *sta_hdr = sta_wtbl;
303 struct wtbl_req_hdr hdr = {
304 .operation = cmd,
305 };
306 struct sk_buff *nskb = *skb;
307
308 mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo,
309 &hdr.wlan_idx_hi);
310 if (!nskb) {
311 nskb = mt76_mcu_msg_alloc(dev, NULL,
312 MT76_CONNAC_WTBL_UPDATE_MAX_SIZE);
313 if (!nskb)
314 return ERR_PTR(-ENOMEM);
315
316 *skb = nskb;
317 }
318
319 if (sta_hdr)
320 le16_add_cpu(&sta_hdr->len, sizeof(hdr));
321
322 return skb_put_data(nskb, &hdr, sizeof(hdr));
323}
324EXPORT_SYMBOL_GPL(mt76_connac_mcu_alloc_wtbl_req);
325
326void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb,
327 struct ieee80211_vif *vif)
328{
329 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
330 u8 omac_idx = mvif->omac_idx;
331 struct bss_info_omac *omac;
332 struct tlv *tlv;
333 u32 type = 0;
334
335 switch (vif->type) {
336 case NL80211_IFTYPE_MONITOR:
337 case NL80211_IFTYPE_MESH_POINT:
338 case NL80211_IFTYPE_AP:
339 if (vif->p2p)
340 type = CONNECTION_P2P_GO;
341 else
342 type = CONNECTION_INFRA_AP;
343 break;
344 case NL80211_IFTYPE_STATION:
345 if (vif->p2p)
346 type = CONNECTION_P2P_GC;
347 else
348 type = CONNECTION_INFRA_STA;
349 break;
350 case NL80211_IFTYPE_ADHOC:
351 type = CONNECTION_IBSS_ADHOC;
352 break;
353 default:
354 WARN_ON(1);
355 break;
356 }
357
358 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_OMAC, sizeof(*omac));
359
360 omac = (struct bss_info_omac *)tlv;
361 omac->conn_type = cpu_to_le32(type);
362 omac->omac_idx = mvif->omac_idx;
363 omac->band_idx = mvif->band_idx;
364 omac->hw_bss_idx = omac_idx > EXT_BSSID_START ? HW_BSSID_0 : omac_idx;
365}
366EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_omac_tlv);
367
368void mt76_connac_mcu_sta_basic_tlv(struct mt76_dev *dev, struct sk_buff *skb,
369 struct ieee80211_vif *vif,
370 struct ieee80211_sta *sta,
371 bool enable, bool newly)
372{
373 struct sta_rec_basic *basic;
374 struct tlv *tlv;
375 int conn_type;
376
377 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BASIC, sizeof(*basic));
378
379 basic = (struct sta_rec_basic *)tlv;
380 basic->extra_info = cpu_to_le16(EXTRA_INFO_VER);
381
382 if (enable) {
383 if (newly)
384 basic->extra_info |= cpu_to_le16(EXTRA_INFO_NEW);
385 basic->conn_state = CONN_STATE_PORT_SECURE;
386 } else {
387 basic->conn_state = CONN_STATE_DISCONNECT;
388 }
389
390 if (!sta) {
391 basic->conn_type = cpu_to_le32(CONNECTION_INFRA_BC);
392 eth_broadcast_addr(basic->peer_addr);
393 return;
394 }
395
396 switch (vif->type) {
397 case NL80211_IFTYPE_MESH_POINT:
398 case NL80211_IFTYPE_AP:
399 if (vif->p2p && !is_mt7921(dev))
400 conn_type = CONNECTION_P2P_GC;
401 else
402 conn_type = CONNECTION_INFRA_STA;
403 basic->conn_type = cpu_to_le32(conn_type);
404 basic->aid = cpu_to_le16(sta->aid);
405 break;
406 case NL80211_IFTYPE_STATION:
407 if (vif->p2p && !is_mt7921(dev))
408 conn_type = CONNECTION_P2P_GO;
409 else
410 conn_type = CONNECTION_INFRA_AP;
411 basic->conn_type = cpu_to_le32(conn_type);
412 basic->aid = cpu_to_le16(vif->cfg.aid);
413 break;
414 case NL80211_IFTYPE_ADHOC:
415 basic->conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC);
416 basic->aid = cpu_to_le16(sta->aid);
417 break;
418 default:
419 WARN_ON(1);
420 break;
421 }
422
423 memcpy(basic->peer_addr, sta->addr, ETH_ALEN);
424 basic->qos = sta->wme;
425}
426EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_basic_tlv);
427
428void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif,
429 struct ieee80211_sta *sta)
430{
431 struct sta_rec_uapsd *uapsd;
432 struct tlv *tlv;
433
434 if (vif->type != NL80211_IFTYPE_AP || !sta->wme)
435 return;
436
437 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_APPS, sizeof(*uapsd));
438 uapsd = (struct sta_rec_uapsd *)tlv;
439
440 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO) {
441 uapsd->dac_map |= BIT(3);
442 uapsd->tac_map |= BIT(3);
443 }
444 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI) {
445 uapsd->dac_map |= BIT(2);
446 uapsd->tac_map |= BIT(2);
447 }
448 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE) {
449 uapsd->dac_map |= BIT(1);
450 uapsd->tac_map |= BIT(1);
451 }
452 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK) {
453 uapsd->dac_map |= BIT(0);
454 uapsd->tac_map |= BIT(0);
455 }
456 uapsd->max_sp = sta->max_sp;
457}
458EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_uapsd);
459
460void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb,
461 struct ieee80211_vif *vif,
462 struct mt76_wcid *wcid,
463 void *sta_wtbl, void *wtbl_tlv)
464{
465 struct wtbl_hdr_trans *htr;
466 struct tlv *tlv;
467
468 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_HDR_TRANS,
469 sizeof(*htr),
470 wtbl_tlv, sta_wtbl);
471 htr = (struct wtbl_hdr_trans *)tlv;
472 htr->no_rx_trans = true;
473
474 if (vif->type == NL80211_IFTYPE_STATION)
475 htr->to_ds = true;
476 else
477 htr->from_ds = true;
478
479 if (!wcid)
480 return;
481
482 htr->no_rx_trans = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags);
483 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) {
484 htr->to_ds = true;
485 htr->from_ds = true;
486 }
487}
488EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_hdr_trans_tlv);
489
490int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev,
491 struct ieee80211_vif *vif,
492 struct mt76_wcid *wcid, int cmd)
493{
494 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
495 struct wtbl_req_hdr *wtbl_hdr;
496 struct tlv *sta_wtbl;
497 struct sk_buff *skb;
498
499 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
500 if (IS_ERR(skb))
501 return PTR_ERR(skb);
502
503 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
504 sizeof(struct tlv));
505
506 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET,
507 sta_wtbl, &skb);
508 if (IS_ERR(wtbl_hdr))
509 return PTR_ERR(wtbl_hdr);
510
511 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, sta_wtbl, wtbl_hdr);
512
513 return mt76_mcu_skb_send_msg(dev, skb, cmd, true);
514}
515EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_update_hdr_trans);
516
517int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev,
518 struct ieee80211_vif *vif,
519 struct ieee80211_sta *sta)
520{
521 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
522 struct wtbl_req_hdr *wtbl_hdr;
523 struct sk_buff *skb = NULL;
524
525 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET, NULL,
526 &skb);
527 if (IS_ERR(wtbl_hdr))
528 return PTR_ERR(wtbl_hdr);
529
530 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, NULL, wtbl_hdr);
531
532 return mt76_mcu_skb_send_msg(dev, skb, MCU_EXT_CMD(WTBL_UPDATE), true);
533}
534EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_update_hdr_trans);
535
536void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev,
537 struct sk_buff *skb,
538 struct ieee80211_vif *vif,
539 struct ieee80211_sta *sta,
540 void *sta_wtbl, void *wtbl_tlv)
541{
542 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
543 struct wtbl_generic *generic;
544 struct wtbl_rx *rx;
545 struct wtbl_spe *spe;
546 struct tlv *tlv;
547
548 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_GENERIC,
549 sizeof(*generic),
550 wtbl_tlv, sta_wtbl);
551
552 generic = (struct wtbl_generic *)tlv;
553
554 if (sta) {
555 if (vif->type == NL80211_IFTYPE_STATION)
556 generic->partial_aid = cpu_to_le16(vif->cfg.aid);
557 else
558 generic->partial_aid = cpu_to_le16(sta->aid);
559 memcpy(generic->peer_addr, sta->addr, ETH_ALEN);
560 generic->muar_idx = mvif->omac_idx;
561 generic->qos = sta->wme;
562 } else {
563 if (!is_connac_v1(dev) && vif->type == NL80211_IFTYPE_STATION)
564 memcpy(generic->peer_addr, vif->bss_conf.bssid,
565 ETH_ALEN);
566 else
567 eth_broadcast_addr(generic->peer_addr);
568
569 generic->muar_idx = 0xe;
570 }
571
572 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_RX, sizeof(*rx),
573 wtbl_tlv, sta_wtbl);
574
575 rx = (struct wtbl_rx *)tlv;
576 rx->rca1 = sta ? vif->type != NL80211_IFTYPE_AP : 1;
577 rx->rca2 = 1;
578 rx->rv = 1;
579
580 if (!is_connac_v1(dev))
581 return;
582
583 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SPE, sizeof(*spe),
584 wtbl_tlv, sta_wtbl);
585 spe = (struct wtbl_spe *)tlv;
586 spe->spe_idx = 24;
587}
588EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_generic_tlv);
589
590static void
591mt76_connac_mcu_sta_amsdu_tlv(struct sk_buff *skb, struct ieee80211_sta *sta,
592 struct ieee80211_vif *vif)
593{
594 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
595 struct sta_rec_amsdu *amsdu;
596 struct tlv *tlv;
597
598 if (vif->type != NL80211_IFTYPE_AP &&
599 vif->type != NL80211_IFTYPE_STATION)
600 return;
601
602 if (!sta->deflink.agg.max_amsdu_len)
603 return;
604
605 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu));
606 amsdu = (struct sta_rec_amsdu *)tlv;
607 amsdu->max_amsdu_num = 8;
608 amsdu->amsdu_en = true;
609 amsdu->max_mpdu_size = sta->deflink.agg.max_amsdu_len >=
610 IEEE80211_MAX_MPDU_LEN_VHT_7991;
611
612 wcid->amsdu = true;
613}
614
615#define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p)
616#define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m)
617static void
618mt76_connac_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
619{
620 struct ieee80211_sta_he_cap *he_cap = &sta->deflink.he_cap;
621 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
622 struct sta_rec_he *he;
623 struct tlv *tlv;
624 u32 cap = 0;
625
626 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he));
627
628 he = (struct sta_rec_he *)tlv;
629
630 if (elem->mac_cap_info[0] & IEEE80211_HE_MAC_CAP0_HTC_HE)
631 cap |= STA_REC_HE_CAP_HTC;
632
633 if (elem->mac_cap_info[2] & IEEE80211_HE_MAC_CAP2_BSR)
634 cap |= STA_REC_HE_CAP_BSR;
635
636 if (elem->mac_cap_info[3] & IEEE80211_HE_MAC_CAP3_OMI_CONTROL)
637 cap |= STA_REC_HE_CAP_OM;
638
639 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU)
640 cap |= STA_REC_HE_CAP_AMSDU_IN_AMPDU;
641
642 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_BQR)
643 cap |= STA_REC_HE_CAP_BQR;
644
645 if (elem->phy_cap_info[0] &
646 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G |
647 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G))
648 cap |= STA_REC_HE_CAP_BW20_RU242_SUPPORT;
649
650 if (elem->phy_cap_info[1] &
651 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD)
652 cap |= STA_REC_HE_CAP_LDPC;
653
654 if (elem->phy_cap_info[1] &
655 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US)
656 cap |= STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI;
657
658 if (elem->phy_cap_info[2] &
659 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US)
660 cap |= STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI;
661
662 if (elem->phy_cap_info[2] &
663 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ)
664 cap |= STA_REC_HE_CAP_LE_EQ_80M_TX_STBC;
665
666 if (elem->phy_cap_info[2] &
667 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ)
668 cap |= STA_REC_HE_CAP_LE_EQ_80M_RX_STBC;
669
670 if (elem->phy_cap_info[6] &
671 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE)
672 cap |= STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE;
673
674 if (elem->phy_cap_info[7] &
675 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI)
676 cap |= STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI;
677
678 if (elem->phy_cap_info[7] &
679 IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ)
680 cap |= STA_REC_HE_CAP_GT_80M_TX_STBC;
681
682 if (elem->phy_cap_info[7] &
683 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ)
684 cap |= STA_REC_HE_CAP_GT_80M_RX_STBC;
685
686 if (elem->phy_cap_info[8] &
687 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI)
688 cap |= STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI;
689
690 if (elem->phy_cap_info[8] &
691 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI)
692 cap |= STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI;
693
694 if (elem->phy_cap_info[9] &
695 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK)
696 cap |= STA_REC_HE_CAP_TRIG_CQI_FK;
697
698 if (elem->phy_cap_info[9] &
699 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU)
700 cap |= STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242;
701
702 if (elem->phy_cap_info[9] &
703 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU)
704 cap |= STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242;
705
706 he->he_cap = cpu_to_le32(cap);
707
708 switch (sta->deflink.bandwidth) {
709 case IEEE80211_STA_RX_BW_160:
710 if (elem->phy_cap_info[0] &
711 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
712 he->max_nss_mcs[CMD_HE_MCS_BW8080] =
713 he_cap->he_mcs_nss_supp.rx_mcs_80p80;
714
715 he->max_nss_mcs[CMD_HE_MCS_BW160] =
716 he_cap->he_mcs_nss_supp.rx_mcs_160;
717 fallthrough;
718 default:
719 he->max_nss_mcs[CMD_HE_MCS_BW80] =
720 he_cap->he_mcs_nss_supp.rx_mcs_80;
721 break;
722 }
723
724 he->t_frame_dur =
725 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
726 he->max_ampdu_exp =
727 HE_MAC(CAP3_MAX_AMPDU_LEN_EXP_MASK, elem->mac_cap_info[3]);
728
729 he->bw_set =
730 HE_PHY(CAP0_CHANNEL_WIDTH_SET_MASK, elem->phy_cap_info[0]);
731 he->device_class =
732 HE_PHY(CAP1_DEVICE_CLASS_A, elem->phy_cap_info[1]);
733 he->punc_pream_rx =
734 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
735
736 he->dcm_tx_mode =
737 HE_PHY(CAP3_DCM_MAX_CONST_TX_MASK, elem->phy_cap_info[3]);
738 he->dcm_tx_max_nss =
739 HE_PHY(CAP3_DCM_MAX_TX_NSS_2, elem->phy_cap_info[3]);
740 he->dcm_rx_mode =
741 HE_PHY(CAP3_DCM_MAX_CONST_RX_MASK, elem->phy_cap_info[3]);
742 he->dcm_rx_max_nss =
743 HE_PHY(CAP3_DCM_MAX_RX_NSS_2, elem->phy_cap_info[3]);
744 he->dcm_rx_max_nss =
745 HE_PHY(CAP8_DCM_MAX_RU_MASK, elem->phy_cap_info[8]);
746
747 he->pkt_ext = 2;
748}
749
750void
751mt76_connac_mcu_sta_he_tlv_v2(struct sk_buff *skb, struct ieee80211_sta *sta)
752{
753 struct ieee80211_sta_he_cap *he_cap = &sta->deflink.he_cap;
754 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
755 struct sta_rec_he_v2 *he;
756 struct tlv *tlv;
757
758 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he));
759
760 he = (struct sta_rec_he_v2 *)tlv;
761 memcpy(he->he_phy_cap, elem->phy_cap_info, sizeof(he->he_phy_cap));
762 memcpy(he->he_mac_cap, elem->mac_cap_info, sizeof(he->he_mac_cap));
763
764 switch (sta->deflink.bandwidth) {
765 case IEEE80211_STA_RX_BW_160:
766 if (elem->phy_cap_info[0] &
767 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
768 he->max_nss_mcs[CMD_HE_MCS_BW8080] =
769 he_cap->he_mcs_nss_supp.rx_mcs_80p80;
770
771 he->max_nss_mcs[CMD_HE_MCS_BW160] =
772 he_cap->he_mcs_nss_supp.rx_mcs_160;
773 fallthrough;
774 default:
775 he->max_nss_mcs[CMD_HE_MCS_BW80] =
776 he_cap->he_mcs_nss_supp.rx_mcs_80;
777 break;
778 }
779
780 he->pkt_ext = IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US;
781}
782EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_he_tlv_v2);
783
784u8
785mt76_connac_get_phy_mode_v2(struct mt76_phy *mphy, struct ieee80211_vif *vif,
786 enum nl80211_band band, struct ieee80211_sta *sta)
787{
788 struct ieee80211_sta_ht_cap *ht_cap;
789 struct ieee80211_sta_vht_cap *vht_cap;
790 const struct ieee80211_sta_he_cap *he_cap;
791 const struct ieee80211_sta_eht_cap *eht_cap;
792 u8 mode = 0;
793
794 if (sta) {
795 ht_cap = &sta->deflink.ht_cap;
796 vht_cap = &sta->deflink.vht_cap;
797 he_cap = &sta->deflink.he_cap;
798 eht_cap = &sta->deflink.eht_cap;
799 } else {
800 struct ieee80211_supported_band *sband;
801
802 sband = mphy->hw->wiphy->bands[band];
803 ht_cap = &sband->ht_cap;
804 vht_cap = &sband->vht_cap;
805 he_cap = ieee80211_get_he_iftype_cap(sband, vif->type);
806 eht_cap = ieee80211_get_eht_iftype_cap(sband, vif->type);
807 }
808
809 if (band == NL80211_BAND_2GHZ) {
810 mode |= PHY_TYPE_BIT_HR_DSSS | PHY_TYPE_BIT_ERP;
811
812 if (ht_cap->ht_supported)
813 mode |= PHY_TYPE_BIT_HT;
814
815 if (he_cap && he_cap->has_he)
816 mode |= PHY_TYPE_BIT_HE;
817
818 if (eht_cap && eht_cap->has_eht)
819 mode |= PHY_TYPE_BIT_BE;
820 } else if (band == NL80211_BAND_5GHZ || band == NL80211_BAND_6GHZ) {
821 mode |= PHY_TYPE_BIT_OFDM;
822
823 if (ht_cap->ht_supported)
824 mode |= PHY_TYPE_BIT_HT;
825
826 if (vht_cap->vht_supported)
827 mode |= PHY_TYPE_BIT_VHT;
828
829 if (he_cap && he_cap->has_he)
830 mode |= PHY_TYPE_BIT_HE;
831
832 if (eht_cap && eht_cap->has_eht)
833 mode |= PHY_TYPE_BIT_BE;
834 }
835
836 return mode;
837}
838EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode_v2);
839
840void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb,
841 struct ieee80211_sta *sta,
842 struct ieee80211_vif *vif,
843 u8 rcpi, u8 sta_state)
844{
845 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
846 struct cfg80211_chan_def *chandef = mvif->ctx ?
847 &mvif->ctx->def : &mphy->chandef;
848 enum nl80211_band band = chandef->chan->band;
849 struct mt76_dev *dev = mphy->dev;
850 struct sta_rec_ra_info *ra_info;
851 struct sta_rec_state *state;
852 struct sta_rec_phy *phy;
853 struct tlv *tlv;
854 u16 supp_rates;
855
856 /* starec ht */
857 if (sta->deflink.ht_cap.ht_supported) {
858 struct sta_rec_ht *ht;
859
860 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht));
861 ht = (struct sta_rec_ht *)tlv;
862 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap);
863 }
864
865 /* starec vht */
866 if (sta->deflink.vht_cap.vht_supported) {
867 struct sta_rec_vht *vht;
868 int len;
869
870 len = is_mt7921(dev) ? sizeof(*vht) : sizeof(*vht) - 4;
871 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, len);
872 vht = (struct sta_rec_vht *)tlv;
873 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap);
874 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map;
875 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map;
876 }
877
878 /* starec uapsd */
879 mt76_connac_mcu_sta_uapsd(skb, vif, sta);
880
881 if (!is_mt7921(dev))
882 return;
883
884 if (sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he)
885 mt76_connac_mcu_sta_amsdu_tlv(skb, sta, vif);
886
887 /* starec he */
888 if (sta->deflink.he_cap.has_he) {
889 mt76_connac_mcu_sta_he_tlv(skb, sta);
890 mt76_connac_mcu_sta_he_tlv_v2(skb, sta);
891 if (band == NL80211_BAND_6GHZ &&
892 sta_state == MT76_STA_INFO_STATE_ASSOC) {
893 struct sta_rec_he_6g_capa *he_6g_capa;
894
895 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G,
896 sizeof(*he_6g_capa));
897 he_6g_capa = (struct sta_rec_he_6g_capa *)tlv;
898 he_6g_capa->capa = sta->deflink.he_6ghz_capa.capa;
899 }
900 }
901
902 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PHY, sizeof(*phy));
903 phy = (struct sta_rec_phy *)tlv;
904 phy->phy_type = mt76_connac_get_phy_mode_v2(mphy, vif, band, sta);
905 phy->basic_rate = cpu_to_le16((u16)vif->bss_conf.basic_rates);
906 phy->rcpi = rcpi;
907 phy->ampdu = FIELD_PREP(IEEE80211_HT_AMPDU_PARM_FACTOR,
908 sta->deflink.ht_cap.ampdu_factor) |
909 FIELD_PREP(IEEE80211_HT_AMPDU_PARM_DENSITY,
910 sta->deflink.ht_cap.ampdu_density);
911
912 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra_info));
913 ra_info = (struct sta_rec_ra_info *)tlv;
914
915 supp_rates = sta->deflink.supp_rates[band];
916 if (band == NL80211_BAND_2GHZ)
917 supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates >> 4) |
918 FIELD_PREP(RA_LEGACY_CCK, supp_rates & 0xf);
919 else
920 supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates);
921
922 ra_info->legacy = cpu_to_le16(supp_rates);
923
924 if (sta->deflink.ht_cap.ht_supported)
925 memcpy(ra_info->rx_mcs_bitmask,
926 sta->deflink.ht_cap.mcs.rx_mask,
927 HT_MCS_MASK_NUM);
928
929 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_STATE, sizeof(*state));
930 state = (struct sta_rec_state *)tlv;
931 state->state = sta_state;
932
933 if (sta->deflink.vht_cap.vht_supported) {
934 state->vht_opmode = sta->deflink.bandwidth;
935 state->vht_opmode |= (sta->deflink.rx_nss - 1) <<
936 IEEE80211_OPMODE_NOTIF_RX_NSS_SHIFT;
937 }
938}
939EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_tlv);
940
941void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb,
942 struct ieee80211_sta *sta,
943 void *sta_wtbl, void *wtbl_tlv)
944{
945 struct wtbl_smps *smps;
946 struct tlv *tlv;
947
948 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SMPS, sizeof(*smps),
949 wtbl_tlv, sta_wtbl);
950 smps = (struct wtbl_smps *)tlv;
951 smps->smps = (sta->deflink.smps_mode == IEEE80211_SMPS_DYNAMIC);
952}
953EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_smps_tlv);
954
955void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb,
956 struct ieee80211_sta *sta, void *sta_wtbl,
957 void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc)
958{
959 struct wtbl_ht *ht = NULL;
960 struct tlv *tlv;
961 u32 flags = 0;
962
963 if (sta->deflink.ht_cap.ht_supported || sta->deflink.he_6ghz_capa.capa) {
964 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_HT, sizeof(*ht),
965 wtbl_tlv, sta_wtbl);
966 ht = (struct wtbl_ht *)tlv;
967 ht->ldpc = ht_ldpc &&
968 !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING);
969
970 if (sta->deflink.ht_cap.ht_supported) {
971 ht->af = sta->deflink.ht_cap.ampdu_factor;
972 ht->mm = sta->deflink.ht_cap.ampdu_density;
973 } else {
974 ht->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
975 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
976 ht->mm = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
977 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START);
978 }
979
980 ht->ht = true;
981 }
982
983 if (sta->deflink.vht_cap.vht_supported || sta->deflink.he_6ghz_capa.capa) {
984 struct wtbl_vht *vht;
985 u8 af;
986
987 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_VHT,
988 sizeof(*vht), wtbl_tlv,
989 sta_wtbl);
990 vht = (struct wtbl_vht *)tlv;
991 vht->ldpc = vht_ldpc &&
992 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC);
993 vht->vht = true;
994
995 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK,
996 sta->deflink.vht_cap.cap);
997 if (ht)
998 ht->af = max(ht->af, af);
999 }
1000
1001 mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_tlv);
1002
1003 if (is_connac_v1(dev) && sta->deflink.ht_cap.ht_supported) {
1004 /* sgi */
1005 u32 msk = MT_WTBL_W5_SHORT_GI_20 | MT_WTBL_W5_SHORT_GI_40 |
1006 MT_WTBL_W5_SHORT_GI_80 | MT_WTBL_W5_SHORT_GI_160;
1007 struct wtbl_raw *raw;
1008
1009 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_RAW_DATA,
1010 sizeof(*raw), wtbl_tlv,
1011 sta_wtbl);
1012
1013 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20)
1014 flags |= MT_WTBL_W5_SHORT_GI_20;
1015 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
1016 flags |= MT_WTBL_W5_SHORT_GI_40;
1017
1018 if (sta->deflink.vht_cap.vht_supported) {
1019 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
1020 flags |= MT_WTBL_W5_SHORT_GI_80;
1021 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160)
1022 flags |= MT_WTBL_W5_SHORT_GI_160;
1023 }
1024 raw = (struct wtbl_raw *)tlv;
1025 raw->val = cpu_to_le32(flags);
1026 raw->msk = cpu_to_le32(~msk);
1027 raw->wtbl_idx = 1;
1028 raw->dw = 5;
1029 }
1030}
1031EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_ht_tlv);
1032
1033int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy,
1034 struct mt76_sta_cmd_info *info)
1035{
1036 struct mt76_vif *mvif = (struct mt76_vif *)info->vif->drv_priv;
1037 struct mt76_dev *dev = phy->dev;
1038 struct wtbl_req_hdr *wtbl_hdr;
1039 struct tlv *sta_wtbl;
1040 struct sk_buff *skb;
1041
1042 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, info->wcid);
1043 if (IS_ERR(skb))
1044 return PTR_ERR(skb);
1045
1046 if (info->sta || !info->offload_fw)
1047 mt76_connac_mcu_sta_basic_tlv(dev, skb, info->vif, info->sta,
1048 info->enable, info->newly);
1049 if (info->sta && info->enable)
1050 mt76_connac_mcu_sta_tlv(phy, skb, info->sta,
1051 info->vif, info->rcpi,
1052 info->state);
1053
1054 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
1055 sizeof(struct tlv));
1056
1057 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, info->wcid,
1058 WTBL_RESET_AND_SET,
1059 sta_wtbl, &skb);
1060 if (IS_ERR(wtbl_hdr))
1061 return PTR_ERR(wtbl_hdr);
1062
1063 if (info->enable) {
1064 mt76_connac_mcu_wtbl_generic_tlv(dev, skb, info->vif,
1065 info->sta, sta_wtbl,
1066 wtbl_hdr);
1067 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, info->vif, info->wcid,
1068 sta_wtbl, wtbl_hdr);
1069 if (info->sta)
1070 mt76_connac_mcu_wtbl_ht_tlv(dev, skb, info->sta,
1071 sta_wtbl, wtbl_hdr,
1072 true, true);
1073 }
1074
1075 return mt76_mcu_skb_send_msg(dev, skb, info->cmd, true);
1076}
1077EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_cmd);
1078
1079void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb,
1080 struct ieee80211_ampdu_params *params,
1081 bool enable, bool tx, void *sta_wtbl,
1082 void *wtbl_tlv)
1083{
1084 struct wtbl_ba *ba;
1085 struct tlv *tlv;
1086
1087 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_BA, sizeof(*ba),
1088 wtbl_tlv, sta_wtbl);
1089
1090 ba = (struct wtbl_ba *)tlv;
1091 ba->tid = params->tid;
1092
1093 if (tx) {
1094 ba->ba_type = MT_BA_TYPE_ORIGINATOR;
1095 ba->sn = enable ? cpu_to_le16(params->ssn) : 0;
1096 ba->ba_winsize = enable ? cpu_to_le16(params->buf_size) : 0;
1097 ba->ba_en = enable;
1098 } else {
1099 memcpy(ba->peer_addr, params->sta->addr, ETH_ALEN);
1100 ba->ba_type = MT_BA_TYPE_RECIPIENT;
1101 ba->rst_ba_tid = params->tid;
1102 ba->rst_ba_sel = RST_BA_MAC_TID_MATCH;
1103 ba->rst_ba_sb = 1;
1104 }
1105
1106 if (!is_connac_v1(dev)) {
1107 ba->ba_winsize = enable ? cpu_to_le16(params->buf_size) : 0;
1108 return;
1109 }
1110
1111 if (enable && tx) {
1112 static const u8 ba_range[] = { 4, 8, 12, 24, 36, 48, 54, 64 };
1113 int i;
1114
1115 for (i = 7; i > 0; i--) {
1116 if (params->buf_size >= ba_range[i])
1117 break;
1118 }
1119 ba->ba_winsize_idx = i;
1120 }
1121}
1122EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_ba_tlv);
1123
1124int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy,
1125 struct ieee80211_vif *vif,
1126 struct mt76_wcid *wcid,
1127 bool enable)
1128{
1129 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1130 struct mt76_dev *dev = phy->dev;
1131 struct {
1132 struct {
1133 u8 omac_idx;
1134 u8 band_idx;
1135 __le16 pad;
1136 } __packed hdr;
1137 struct req_tlv {
1138 __le16 tag;
1139 __le16 len;
1140 u8 active;
1141 u8 pad;
1142 u8 omac_addr[ETH_ALEN];
1143 } __packed tlv;
1144 } dev_req = {
1145 .hdr = {
1146 .omac_idx = mvif->omac_idx,
1147 .band_idx = mvif->band_idx,
1148 },
1149 .tlv = {
1150 .tag = cpu_to_le16(DEV_INFO_ACTIVE),
1151 .len = cpu_to_le16(sizeof(struct req_tlv)),
1152 .active = enable,
1153 },
1154 };
1155 struct {
1156 struct {
1157 u8 bss_idx;
1158 u8 pad[3];
1159 } __packed hdr;
1160 struct mt76_connac_bss_basic_tlv basic;
1161 } basic_req = {
1162 .hdr = {
1163 .bss_idx = mvif->idx,
1164 },
1165 .basic = {
1166 .tag = cpu_to_le16(UNI_BSS_INFO_BASIC),
1167 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_basic_tlv)),
1168 .omac_idx = mvif->omac_idx,
1169 .band_idx = mvif->band_idx,
1170 .wmm_idx = mvif->wmm_idx,
1171 .active = enable,
1172 .bmc_tx_wlan_idx = cpu_to_le16(wcid->idx),
1173 .sta_idx = cpu_to_le16(wcid->idx),
1174 .conn_state = 1,
1175 },
1176 };
1177 int err, idx, cmd, len;
1178 void *data;
1179
1180 switch (vif->type) {
1181 case NL80211_IFTYPE_MESH_POINT:
1182 case NL80211_IFTYPE_MONITOR:
1183 case NL80211_IFTYPE_AP:
1184 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_AP);
1185 break;
1186 case NL80211_IFTYPE_STATION:
1187 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_STA);
1188 break;
1189 case NL80211_IFTYPE_ADHOC:
1190 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC);
1191 break;
1192 default:
1193 WARN_ON(1);
1194 break;
1195 }
1196
1197 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx;
1198 basic_req.basic.hw_bss_idx = idx;
1199
1200 memcpy(dev_req.tlv.omac_addr, vif->addr, ETH_ALEN);
1201
1202 cmd = enable ? MCU_UNI_CMD(DEV_INFO_UPDATE) : MCU_UNI_CMD(BSS_INFO_UPDATE);
1203 data = enable ? (void *)&dev_req : (void *)&basic_req;
1204 len = enable ? sizeof(dev_req) : sizeof(basic_req);
1205
1206 err = mt76_mcu_send_msg(dev, cmd, data, len, true);
1207 if (err < 0)
1208 return err;
1209
1210 cmd = enable ? MCU_UNI_CMD(BSS_INFO_UPDATE) : MCU_UNI_CMD(DEV_INFO_UPDATE);
1211 data = enable ? (void *)&basic_req : (void *)&dev_req;
1212 len = enable ? sizeof(basic_req) : sizeof(dev_req);
1213
1214 return mt76_mcu_send_msg(dev, cmd, data, len, true);
1215}
1216EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_add_dev);
1217
1218void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb,
1219 struct ieee80211_ampdu_params *params,
1220 bool enable, bool tx)
1221{
1222 struct sta_rec_ba *ba;
1223 struct tlv *tlv;
1224
1225 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba));
1226
1227 ba = (struct sta_rec_ba *)tlv;
1228 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT;
1229 ba->winsize = cpu_to_le16(params->buf_size);
1230 ba->ssn = cpu_to_le16(params->ssn);
1231 ba->ba_en = enable << params->tid;
1232 ba->amsdu = params->amsdu;
1233 ba->tid = params->tid;
1234}
1235EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba_tlv);
1236
1237int mt76_connac_mcu_sta_wed_update(struct mt76_dev *dev, struct sk_buff *skb)
1238{
1239 if (!mt76_is_mmio(dev))
1240 return 0;
1241
1242 if (!mtk_wed_device_active(&dev->mmio.wed))
1243 return 0;
1244
1245 return mtk_wed_device_update_msg(&dev->mmio.wed, WED_WO_STA_REC,
1246 skb->data, skb->len);
1247}
1248EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_wed_update);
1249
1250int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif,
1251 struct ieee80211_ampdu_params *params,
1252 int cmd, bool enable, bool tx)
1253{
1254 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv;
1255 struct wtbl_req_hdr *wtbl_hdr;
1256 struct tlv *sta_wtbl;
1257 struct sk_buff *skb;
1258 int ret;
1259
1260 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
1261 if (IS_ERR(skb))
1262 return PTR_ERR(skb);
1263
1264 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
1265 sizeof(struct tlv));
1266
1267 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET,
1268 sta_wtbl, &skb);
1269 if (IS_ERR(wtbl_hdr))
1270 return PTR_ERR(wtbl_hdr);
1271
1272 mt76_connac_mcu_wtbl_ba_tlv(dev, skb, params, enable, tx, sta_wtbl,
1273 wtbl_hdr);
1274
1275 ret = mt76_connac_mcu_sta_wed_update(dev, skb);
1276 if (ret)
1277 return ret;
1278
1279 ret = mt76_mcu_skb_send_msg(dev, skb, cmd, true);
1280 if (ret)
1281 return ret;
1282
1283 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
1284 if (IS_ERR(skb))
1285 return PTR_ERR(skb);
1286
1287 mt76_connac_mcu_sta_ba_tlv(skb, params, enable, tx);
1288
1289 ret = mt76_connac_mcu_sta_wed_update(dev, skb);
1290 if (ret)
1291 return ret;
1292
1293 return mt76_mcu_skb_send_msg(dev, skb, cmd, true);
1294}
1295EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba);
1296
1297u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif,
1298 enum nl80211_band band, struct ieee80211_sta *sta)
1299{
1300 struct mt76_dev *dev = phy->dev;
1301 const struct ieee80211_sta_he_cap *he_cap;
1302 struct ieee80211_sta_vht_cap *vht_cap;
1303 struct ieee80211_sta_ht_cap *ht_cap;
1304 u8 mode = 0;
1305
1306 if (is_connac_v1(dev))
1307 return 0x38;
1308
1309 if (sta) {
1310 ht_cap = &sta->deflink.ht_cap;
1311 vht_cap = &sta->deflink.vht_cap;
1312 he_cap = &sta->deflink.he_cap;
1313 } else {
1314 struct ieee80211_supported_band *sband;
1315
1316 sband = phy->hw->wiphy->bands[band];
1317 ht_cap = &sband->ht_cap;
1318 vht_cap = &sband->vht_cap;
1319 he_cap = ieee80211_get_he_iftype_cap(sband, vif->type);
1320 }
1321
1322 if (band == NL80211_BAND_2GHZ) {
1323 mode |= PHY_MODE_B | PHY_MODE_G;
1324
1325 if (ht_cap->ht_supported)
1326 mode |= PHY_MODE_GN;
1327
1328 if (he_cap && he_cap->has_he)
1329 mode |= PHY_MODE_AX_24G;
1330 } else if (band == NL80211_BAND_5GHZ) {
1331 mode |= PHY_MODE_A;
1332
1333 if (ht_cap->ht_supported)
1334 mode |= PHY_MODE_AN;
1335
1336 if (vht_cap->vht_supported)
1337 mode |= PHY_MODE_AC;
1338
1339 if (he_cap && he_cap->has_he)
1340 mode |= PHY_MODE_AX_5G;
1341 } else if (band == NL80211_BAND_6GHZ) {
1342 mode |= PHY_MODE_A | PHY_MODE_AN |
1343 PHY_MODE_AC | PHY_MODE_AX_5G;
1344 }
1345
1346 return mode;
1347}
1348EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode);
1349
1350u8 mt76_connac_get_phy_mode_ext(struct mt76_phy *phy, struct ieee80211_vif *vif,
1351 enum nl80211_band band)
1352{
1353 const struct ieee80211_sta_eht_cap *eht_cap;
1354 struct ieee80211_supported_band *sband;
1355 u8 mode = 0;
1356
1357 if (band == NL80211_BAND_6GHZ)
1358 mode |= PHY_MODE_AX_6G;
1359
1360 sband = phy->hw->wiphy->bands[band];
1361 eht_cap = ieee80211_get_eht_iftype_cap(sband, vif->type);
1362
1363 if (!eht_cap || !eht_cap->has_eht || !vif->bss_conf.eht_support)
1364 return mode;
1365
1366 switch (band) {
1367 case NL80211_BAND_6GHZ:
1368 mode |= PHY_MODE_BE_6G;
1369 break;
1370 case NL80211_BAND_5GHZ:
1371 mode |= PHY_MODE_BE_5G;
1372 break;
1373 case NL80211_BAND_2GHZ:
1374 mode |= PHY_MODE_BE_24G;
1375 break;
1376 default:
1377 break;
1378 }
1379
1380 return mode;
1381}
1382EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode_ext);
1383
1384const struct ieee80211_sta_he_cap *
1385mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif)
1386{
1387 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1388 struct cfg80211_chan_def *chandef = mvif->ctx ?
1389 &mvif->ctx->def : &phy->chandef;
1390 enum nl80211_band band = chandef->chan->band;
1391 struct ieee80211_supported_band *sband;
1392
1393 sband = phy->hw->wiphy->bands[band];
1394
1395 return ieee80211_get_he_iftype_cap(sband, vif->type);
1396}
1397EXPORT_SYMBOL_GPL(mt76_connac_get_he_phy_cap);
1398
1399const struct ieee80211_sta_eht_cap *
1400mt76_connac_get_eht_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif)
1401{
1402 enum nl80211_band band = phy->chandef.chan->band;
1403 struct ieee80211_supported_band *sband;
1404
1405 sband = phy->hw->wiphy->bands[band];
1406
1407 return ieee80211_get_eht_iftype_cap(sband, vif->type);
1408}
1409EXPORT_SYMBOL_GPL(mt76_connac_get_eht_phy_cap);
1410
1411#define DEFAULT_HE_PE_DURATION 4
1412#define DEFAULT_HE_DURATION_RTS_THRES 1023
1413static void
1414mt76_connac_mcu_uni_bss_he_tlv(struct mt76_phy *phy, struct ieee80211_vif *vif,
1415 struct tlv *tlv)
1416{
1417 const struct ieee80211_sta_he_cap *cap;
1418 struct bss_info_uni_he *he;
1419
1420 cap = mt76_connac_get_he_phy_cap(phy, vif);
1421
1422 he = (struct bss_info_uni_he *)tlv;
1423 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext;
1424 if (!he->he_pe_duration)
1425 he->he_pe_duration = DEFAULT_HE_PE_DURATION;
1426
1427 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th);
1428 if (!he->he_rts_thres)
1429 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES);
1430
1431 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80;
1432 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160;
1433 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80;
1434}
1435
1436int mt76_connac_mcu_uni_set_chctx(struct mt76_phy *phy, struct mt76_vif *mvif,
1437 struct ieee80211_chanctx_conf *ctx)
1438{
1439 struct cfg80211_chan_def *chandef = ctx ? &ctx->def : &phy->chandef;
1440 int freq1 = chandef->center_freq1, freq2 = chandef->center_freq2;
1441 enum nl80211_band band = chandef->chan->band;
1442 struct mt76_dev *mdev = phy->dev;
1443 struct {
1444 struct {
1445 u8 bss_idx;
1446 u8 pad[3];
1447 } __packed hdr;
1448 struct rlm_tlv {
1449 __le16 tag;
1450 __le16 len;
1451 u8 control_channel;
1452 u8 center_chan;
1453 u8 center_chan2;
1454 u8 bw;
1455 u8 tx_streams;
1456 u8 rx_streams;
1457 u8 short_st;
1458 u8 ht_op_info;
1459 u8 sco;
1460 u8 band;
1461 u8 pad[2];
1462 } __packed rlm;
1463 } __packed rlm_req = {
1464 .hdr = {
1465 .bss_idx = mvif->idx,
1466 },
1467 .rlm = {
1468 .tag = cpu_to_le16(UNI_BSS_INFO_RLM),
1469 .len = cpu_to_le16(sizeof(struct rlm_tlv)),
1470 .control_channel = chandef->chan->hw_value,
1471 .center_chan = ieee80211_frequency_to_channel(freq1),
1472 .center_chan2 = ieee80211_frequency_to_channel(freq2),
1473 .tx_streams = hweight8(phy->antenna_mask),
1474 .ht_op_info = 4, /* set HT 40M allowed */
1475 .rx_streams = phy->chainmask,
1476 .short_st = true,
1477 .band = band,
1478 },
1479 };
1480
1481 switch (chandef->width) {
1482 case NL80211_CHAN_WIDTH_40:
1483 rlm_req.rlm.bw = CMD_CBW_40MHZ;
1484 break;
1485 case NL80211_CHAN_WIDTH_80:
1486 rlm_req.rlm.bw = CMD_CBW_80MHZ;
1487 break;
1488 case NL80211_CHAN_WIDTH_80P80:
1489 rlm_req.rlm.bw = CMD_CBW_8080MHZ;
1490 break;
1491 case NL80211_CHAN_WIDTH_160:
1492 rlm_req.rlm.bw = CMD_CBW_160MHZ;
1493 break;
1494 case NL80211_CHAN_WIDTH_5:
1495 rlm_req.rlm.bw = CMD_CBW_5MHZ;
1496 break;
1497 case NL80211_CHAN_WIDTH_10:
1498 rlm_req.rlm.bw = CMD_CBW_10MHZ;
1499 break;
1500 case NL80211_CHAN_WIDTH_20_NOHT:
1501 case NL80211_CHAN_WIDTH_20:
1502 default:
1503 rlm_req.rlm.bw = CMD_CBW_20MHZ;
1504 rlm_req.rlm.ht_op_info = 0;
1505 break;
1506 }
1507
1508 if (rlm_req.rlm.control_channel < rlm_req.rlm.center_chan)
1509 rlm_req.rlm.sco = 1; /* SCA */
1510 else if (rlm_req.rlm.control_channel > rlm_req.rlm.center_chan)
1511 rlm_req.rlm.sco = 3; /* SCB */
1512
1513 return mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), &rlm_req,
1514 sizeof(rlm_req), true);
1515}
1516EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_set_chctx);
1517
1518int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy,
1519 struct ieee80211_vif *vif,
1520 struct mt76_wcid *wcid,
1521 bool enable,
1522 struct ieee80211_chanctx_conf *ctx)
1523{
1524 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1525 struct cfg80211_chan_def *chandef = ctx ? &ctx->def : &phy->chandef;
1526 enum nl80211_band band = chandef->chan->band;
1527 struct mt76_dev *mdev = phy->dev;
1528 struct {
1529 struct {
1530 u8 bss_idx;
1531 u8 pad[3];
1532 } __packed hdr;
1533 struct mt76_connac_bss_basic_tlv basic;
1534 struct mt76_connac_bss_qos_tlv qos;
1535 } basic_req = {
1536 .hdr = {
1537 .bss_idx = mvif->idx,
1538 },
1539 .basic = {
1540 .tag = cpu_to_le16(UNI_BSS_INFO_BASIC),
1541 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_basic_tlv)),
1542 .bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int),
1543 .dtim_period = vif->bss_conf.dtim_period,
1544 .omac_idx = mvif->omac_idx,
1545 .band_idx = mvif->band_idx,
1546 .wmm_idx = mvif->wmm_idx,
1547 .active = true, /* keep bss deactivated */
1548 .phymode = mt76_connac_get_phy_mode(phy, vif, band, NULL),
1549 },
1550 .qos = {
1551 .tag = cpu_to_le16(UNI_BSS_INFO_QBSS),
1552 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_qos_tlv)),
1553 .qos = vif->bss_conf.qos,
1554 },
1555 };
1556 int err, conn_type;
1557 u8 idx, basic_phy;
1558
1559 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx;
1560 basic_req.basic.hw_bss_idx = idx;
1561 if (band == NL80211_BAND_6GHZ)
1562 basic_req.basic.phymode_ext = PHY_MODE_AX_6G;
1563
1564 basic_phy = mt76_connac_get_phy_mode_v2(phy, vif, band, NULL);
1565 basic_req.basic.nonht_basic_phy = cpu_to_le16(basic_phy);
1566
1567 switch (vif->type) {
1568 case NL80211_IFTYPE_MESH_POINT:
1569 case NL80211_IFTYPE_AP:
1570 if (vif->p2p)
1571 conn_type = CONNECTION_P2P_GO;
1572 else
1573 conn_type = CONNECTION_INFRA_AP;
1574 basic_req.basic.conn_type = cpu_to_le32(conn_type);
1575 /* Fully active/deactivate BSS network in AP mode only */
1576 basic_req.basic.active = enable;
1577 break;
1578 case NL80211_IFTYPE_STATION:
1579 if (vif->p2p)
1580 conn_type = CONNECTION_P2P_GC;
1581 else
1582 conn_type = CONNECTION_INFRA_STA;
1583 basic_req.basic.conn_type = cpu_to_le32(conn_type);
1584 break;
1585 case NL80211_IFTYPE_ADHOC:
1586 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC);
1587 break;
1588 default:
1589 WARN_ON(1);
1590 break;
1591 }
1592
1593 memcpy(basic_req.basic.bssid, vif->bss_conf.bssid, ETH_ALEN);
1594 basic_req.basic.bmc_tx_wlan_idx = cpu_to_le16(wcid->idx);
1595 basic_req.basic.sta_idx = cpu_to_le16(wcid->idx);
1596 basic_req.basic.conn_state = !enable;
1597
1598 err = mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), &basic_req,
1599 sizeof(basic_req), true);
1600 if (err < 0)
1601 return err;
1602
1603 if (vif->bss_conf.he_support) {
1604 struct {
1605 struct {
1606 u8 bss_idx;
1607 u8 pad[3];
1608 } __packed hdr;
1609 struct bss_info_uni_he he;
1610 struct bss_info_uni_bss_color bss_color;
1611 } he_req = {
1612 .hdr = {
1613 .bss_idx = mvif->idx,
1614 },
1615 .he = {
1616 .tag = cpu_to_le16(UNI_BSS_INFO_HE_BASIC),
1617 .len = cpu_to_le16(sizeof(struct bss_info_uni_he)),
1618 },
1619 .bss_color = {
1620 .tag = cpu_to_le16(UNI_BSS_INFO_BSS_COLOR),
1621 .len = cpu_to_le16(sizeof(struct bss_info_uni_bss_color)),
1622 .enable = 0,
1623 .bss_color = 0,
1624 },
1625 };
1626
1627 if (enable) {
1628 he_req.bss_color.enable =
1629 vif->bss_conf.he_bss_color.enabled;
1630 he_req.bss_color.bss_color =
1631 vif->bss_conf.he_bss_color.color;
1632 }
1633
1634 mt76_connac_mcu_uni_bss_he_tlv(phy, vif,
1635 (struct tlv *)&he_req.he);
1636 err = mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE),
1637 &he_req, sizeof(he_req), true);
1638 if (err < 0)
1639 return err;
1640 }
1641
1642 return mt76_connac_mcu_uni_set_chctx(phy, mvif, ctx);
1643}
1644EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_add_bss);
1645
1646#define MT76_CONNAC_SCAN_CHANNEL_TIME 60
1647int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif,
1648 struct ieee80211_scan_request *scan_req)
1649{
1650 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1651 struct cfg80211_scan_request *sreq = &scan_req->req;
1652 int n_ssids = 0, err, i, duration;
1653 int ext_channels_num = max_t(int, sreq->n_channels - 32, 0);
1654 struct ieee80211_channel **scan_list = sreq->channels;
1655 struct mt76_dev *mdev = phy->dev;
1656 struct mt76_connac_mcu_scan_channel *chan;
1657 struct mt76_connac_hw_scan_req *req;
1658 struct sk_buff *skb;
1659
1660 if (test_bit(MT76_HW_SCANNING, &phy->state))
1661 return -EBUSY;
1662
1663 skb = mt76_mcu_msg_alloc(mdev, NULL, sizeof(*req));
1664 if (!skb)
1665 return -ENOMEM;
1666
1667 set_bit(MT76_HW_SCANNING, &phy->state);
1668 mvif->scan_seq_num = (mvif->scan_seq_num + 1) & 0x7f;
1669
1670 req = (struct mt76_connac_hw_scan_req *)skb_put(skb, sizeof(*req));
1671
1672 req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7;
1673 req->bss_idx = mvif->idx;
1674 req->scan_type = sreq->n_ssids ? 1 : 0;
1675 req->probe_req_num = sreq->n_ssids ? 2 : 0;
1676 req->version = 1;
1677
1678 for (i = 0; i < sreq->n_ssids; i++) {
1679 if (!sreq->ssids[i].ssid_len)
1680 continue;
1681
1682 req->ssids[i].ssid_len = cpu_to_le32(sreq->ssids[i].ssid_len);
1683 memcpy(req->ssids[i].ssid, sreq->ssids[i].ssid,
1684 sreq->ssids[i].ssid_len);
1685 n_ssids++;
1686 }
1687 req->ssid_type = n_ssids ? BIT(2) : BIT(0);
1688 req->ssid_type_ext = n_ssids ? BIT(0) : 0;
1689 req->ssids_num = n_ssids;
1690
1691 duration = is_mt7921(phy->dev) ? 0 : MT76_CONNAC_SCAN_CHANNEL_TIME;
1692 /* increase channel time for passive scan */
1693 if (!sreq->n_ssids)
1694 duration *= 2;
1695 req->timeout_value = cpu_to_le16(sreq->n_channels * duration);
1696 req->channel_min_dwell_time = cpu_to_le16(duration);
1697 req->channel_dwell_time = cpu_to_le16(duration);
1698
1699 if (sreq->n_channels == 0 || sreq->n_channels > 64) {
1700 req->channel_type = 0;
1701 req->channels_num = 0;
1702 req->ext_channels_num = 0;
1703 } else {
1704 req->channel_type = 4;
1705 req->channels_num = min_t(u8, sreq->n_channels, 32);
1706 req->ext_channels_num = min_t(u8, ext_channels_num, 32);
1707 }
1708
1709 for (i = 0; i < req->channels_num + req->ext_channels_num; i++) {
1710 if (i >= 32)
1711 chan = &req->ext_channels[i - 32];
1712 else
1713 chan = &req->channels[i];
1714
1715 switch (scan_list[i]->band) {
1716 case NL80211_BAND_2GHZ:
1717 chan->band = 1;
1718 break;
1719 case NL80211_BAND_6GHZ:
1720 chan->band = 3;
1721 break;
1722 default:
1723 chan->band = 2;
1724 break;
1725 }
1726 chan->channel_num = scan_list[i]->hw_value;
1727 }
1728
1729 if (sreq->ie_len > 0) {
1730 memcpy(req->ies, sreq->ie, sreq->ie_len);
1731 req->ies_len = cpu_to_le16(sreq->ie_len);
1732 }
1733
1734 if (is_mt7921(phy->dev))
1735 req->scan_func |= SCAN_FUNC_SPLIT_SCAN;
1736
1737 memcpy(req->bssid, sreq->bssid, ETH_ALEN);
1738 if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) {
1739 get_random_mask_addr(req->random_mac, sreq->mac_addr,
1740 sreq->mac_addr_mask);
1741 req->scan_func |= SCAN_FUNC_RANDOM_MAC;
1742 }
1743
1744 err = mt76_mcu_skb_send_msg(mdev, skb, MCU_CE_CMD(START_HW_SCAN),
1745 false);
1746 if (err < 0)
1747 clear_bit(MT76_HW_SCANNING, &phy->state);
1748
1749 return err;
1750}
1751EXPORT_SYMBOL_GPL(mt76_connac_mcu_hw_scan);
1752
1753int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy,
1754 struct ieee80211_vif *vif)
1755{
1756 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1757 struct {
1758 u8 seq_num;
1759 u8 is_ext_channel;
1760 u8 rsv[2];
1761 } __packed req = {
1762 .seq_num = mvif->scan_seq_num,
1763 };
1764
1765 if (test_and_clear_bit(MT76_HW_SCANNING, &phy->state)) {
1766 struct cfg80211_scan_info info = {
1767 .aborted = true,
1768 };
1769
1770 ieee80211_scan_completed(phy->hw, &info);
1771 }
1772
1773 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(CANCEL_HW_SCAN),
1774 &req, sizeof(req), false);
1775}
1776EXPORT_SYMBOL_GPL(mt76_connac_mcu_cancel_hw_scan);
1777
1778int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy,
1779 struct ieee80211_vif *vif,
1780 struct cfg80211_sched_scan_request *sreq)
1781{
1782 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1783 struct ieee80211_channel **scan_list = sreq->channels;
1784 struct mt76_connac_mcu_scan_channel *chan;
1785 struct mt76_connac_sched_scan_req *req;
1786 struct mt76_dev *mdev = phy->dev;
1787 struct cfg80211_match_set *match;
1788 struct cfg80211_ssid *ssid;
1789 struct sk_buff *skb;
1790 int i;
1791
1792 skb = mt76_mcu_msg_alloc(mdev, NULL, sizeof(*req) + sreq->ie_len);
1793 if (!skb)
1794 return -ENOMEM;
1795
1796 mvif->scan_seq_num = (mvif->scan_seq_num + 1) & 0x7f;
1797
1798 req = (struct mt76_connac_sched_scan_req *)skb_put(skb, sizeof(*req));
1799 req->version = 1;
1800 req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7;
1801
1802 if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) {
1803 u8 *addr = is_mt7663(phy->dev) ? req->mt7663.random_mac
1804 : req->mt7921.random_mac;
1805
1806 req->scan_func = 1;
1807 get_random_mask_addr(addr, sreq->mac_addr,
1808 sreq->mac_addr_mask);
1809 }
1810 if (is_mt7921(phy->dev)) {
1811 req->mt7921.bss_idx = mvif->idx;
1812 req->mt7921.delay = cpu_to_le32(sreq->delay);
1813 }
1814
1815 req->ssids_num = sreq->n_ssids;
1816 for (i = 0; i < req->ssids_num; i++) {
1817 ssid = &sreq->ssids[i];
1818 memcpy(req->ssids[i].ssid, ssid->ssid, ssid->ssid_len);
1819 req->ssids[i].ssid_len = cpu_to_le32(ssid->ssid_len);
1820 }
1821
1822 req->match_num = sreq->n_match_sets;
1823 for (i = 0; i < req->match_num; i++) {
1824 match = &sreq->match_sets[i];
1825 memcpy(req->match[i].ssid, match->ssid.ssid,
1826 match->ssid.ssid_len);
1827 req->match[i].rssi_th = cpu_to_le32(match->rssi_thold);
1828 req->match[i].ssid_len = match->ssid.ssid_len;
1829 }
1830
1831 req->channel_type = sreq->n_channels ? 4 : 0;
1832 req->channels_num = min_t(u8, sreq->n_channels, 64);
1833 for (i = 0; i < req->channels_num; i++) {
1834 chan = &req->channels[i];
1835
1836 switch (scan_list[i]->band) {
1837 case NL80211_BAND_2GHZ:
1838 chan->band = 1;
1839 break;
1840 case NL80211_BAND_6GHZ:
1841 chan->band = 3;
1842 break;
1843 default:
1844 chan->band = 2;
1845 break;
1846 }
1847 chan->channel_num = scan_list[i]->hw_value;
1848 }
1849
1850 req->intervals_num = sreq->n_scan_plans;
1851 for (i = 0; i < req->intervals_num; i++)
1852 req->intervals[i] = cpu_to_le16(sreq->scan_plans[i].interval);
1853
1854 if (sreq->ie_len > 0) {
1855 req->ie_len = cpu_to_le16(sreq->ie_len);
1856 memcpy(skb_put(skb, sreq->ie_len), sreq->ie, sreq->ie_len);
1857 }
1858
1859 return mt76_mcu_skb_send_msg(mdev, skb, MCU_CE_CMD(SCHED_SCAN_REQ),
1860 false);
1861}
1862EXPORT_SYMBOL_GPL(mt76_connac_mcu_sched_scan_req);
1863
1864int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy,
1865 struct ieee80211_vif *vif,
1866 bool enable)
1867{
1868 struct {
1869 u8 active; /* 0: enabled 1: disabled */
1870 u8 rsv[3];
1871 } __packed req = {
1872 .active = !enable,
1873 };
1874
1875 if (enable)
1876 set_bit(MT76_HW_SCHED_SCANNING, &phy->state);
1877 else
1878 clear_bit(MT76_HW_SCHED_SCANNING, &phy->state);
1879
1880 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(SCHED_SCAN_ENABLE),
1881 &req, sizeof(req), false);
1882}
1883EXPORT_SYMBOL_GPL(mt76_connac_mcu_sched_scan_enable);
1884
1885int mt76_connac_mcu_chip_config(struct mt76_dev *dev)
1886{
1887 struct mt76_connac_config req = {
1888 .resp_type = 0,
1889 };
1890
1891 memcpy(req.data, "assert", 7);
1892
1893 return mt76_mcu_send_msg(dev, MCU_CE_CMD(CHIP_CONFIG),
1894 &req, sizeof(req), false);
1895}
1896EXPORT_SYMBOL_GPL(mt76_connac_mcu_chip_config);
1897
1898int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable)
1899{
1900 struct mt76_connac_config req = {
1901 .resp_type = 0,
1902 };
1903
1904 snprintf(req.data, sizeof(req.data), "KeepFullPwr %d", !enable);
1905
1906 return mt76_mcu_send_msg(dev, MCU_CE_CMD(CHIP_CONFIG),
1907 &req, sizeof(req), false);
1908}
1909EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_deep_sleep);
1910
1911int mt76_connac_sta_state_dp(struct mt76_dev *dev,
1912 enum ieee80211_sta_state old_state,
1913 enum ieee80211_sta_state new_state)
1914{
1915 if ((old_state == IEEE80211_STA_ASSOC &&
1916 new_state == IEEE80211_STA_AUTHORIZED) ||
1917 (old_state == IEEE80211_STA_NONE &&
1918 new_state == IEEE80211_STA_NOTEXIST))
1919 mt76_connac_mcu_set_deep_sleep(dev, true);
1920
1921 if ((old_state == IEEE80211_STA_NOTEXIST &&
1922 new_state == IEEE80211_STA_NONE) ||
1923 (old_state == IEEE80211_STA_AUTHORIZED &&
1924 new_state == IEEE80211_STA_ASSOC))
1925 mt76_connac_mcu_set_deep_sleep(dev, false);
1926
1927 return 0;
1928}
1929EXPORT_SYMBOL_GPL(mt76_connac_sta_state_dp);
1930
1931void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb,
1932 struct mt76_connac_coredump *coredump)
1933{
1934 spin_lock_bh(&dev->lock);
1935 __skb_queue_tail(&coredump->msg_list, skb);
1936 spin_unlock_bh(&dev->lock);
1937
1938 coredump->last_activity = jiffies;
1939
1940 queue_delayed_work(dev->wq, &coredump->work,
1941 MT76_CONNAC_COREDUMP_TIMEOUT);
1942}
1943EXPORT_SYMBOL_GPL(mt76_connac_mcu_coredump_event);
1944
1945static void
1946mt76_connac_mcu_build_sku(struct mt76_dev *dev, s8 *sku,
1947 struct mt76_power_limits *limits,
1948 enum nl80211_band band)
1949{
1950 int max_power = is_mt7921(dev) ? 127 : 63;
1951 int i, offset = sizeof(limits->cck);
1952
1953 memset(sku, max_power, MT_SKU_POWER_LIMIT);
1954
1955 if (band == NL80211_BAND_2GHZ) {
1956 /* cck */
1957 memcpy(sku, limits->cck, sizeof(limits->cck));
1958 }
1959
1960 /* ofdm */
1961 memcpy(&sku[offset], limits->ofdm, sizeof(limits->ofdm));
1962 offset += sizeof(limits->ofdm);
1963
1964 /* ht */
1965 for (i = 0; i < 2; i++) {
1966 memcpy(&sku[offset], limits->mcs[i], 8);
1967 offset += 8;
1968 }
1969 sku[offset++] = limits->mcs[0][0];
1970
1971 /* vht */
1972 for (i = 0; i < ARRAY_SIZE(limits->mcs); i++) {
1973 memcpy(&sku[offset], limits->mcs[i],
1974 ARRAY_SIZE(limits->mcs[i]));
1975 offset += 12;
1976 }
1977
1978 if (!is_mt7921(dev))
1979 return;
1980
1981 /* he */
1982 for (i = 0; i < ARRAY_SIZE(limits->ru); i++) {
1983 memcpy(&sku[offset], limits->ru[i], ARRAY_SIZE(limits->ru[i]));
1984 offset += ARRAY_SIZE(limits->ru[i]);
1985 }
1986}
1987
1988s8 mt76_connac_get_ch_power(struct mt76_phy *phy,
1989 struct ieee80211_channel *chan,
1990 s8 target_power)
1991{
1992 struct mt76_dev *dev = phy->dev;
1993 struct ieee80211_supported_band *sband;
1994 int i;
1995
1996 switch (chan->band) {
1997 case NL80211_BAND_2GHZ:
1998 sband = &phy->sband_2g.sband;
1999 break;
2000 case NL80211_BAND_5GHZ:
2001 sband = &phy->sband_5g.sband;
2002 break;
2003 case NL80211_BAND_6GHZ:
2004 sband = &phy->sband_6g.sband;
2005 break;
2006 default:
2007 return target_power;
2008 }
2009
2010 for (i = 0; i < sband->n_channels; i++) {
2011 struct ieee80211_channel *ch = &sband->channels[i];
2012
2013 if (ch->hw_value == chan->hw_value) {
2014 if (!(ch->flags & IEEE80211_CHAN_DISABLED)) {
2015 int power = 2 * ch->max_reg_power;
2016
2017 if (is_mt7663(dev) && (power > 63 || power < -64))
2018 power = 63;
2019 target_power = min_t(s8, power, target_power);
2020 }
2021 break;
2022 }
2023 }
2024
2025 return target_power;
2026}
2027EXPORT_SYMBOL_GPL(mt76_connac_get_ch_power);
2028
2029static int
2030mt76_connac_mcu_rate_txpower_band(struct mt76_phy *phy,
2031 enum nl80211_band band)
2032{
2033 struct mt76_dev *dev = phy->dev;
2034 int sku_len, batch_len = is_mt7921(dev) ? 8 : 16;
2035 static const u8 chan_list_2ghz[] = {
2036 1, 2, 3, 4, 5, 6, 7,
2037 8, 9, 10, 11, 12, 13, 14
2038 };
2039 static const u8 chan_list_5ghz[] = {
2040 36, 38, 40, 42, 44, 46, 48,
2041 50, 52, 54, 56, 58, 60, 62,
2042 64, 100, 102, 104, 106, 108, 110,
2043 112, 114, 116, 118, 120, 122, 124,
2044 126, 128, 132, 134, 136, 138, 140,
2045 142, 144, 149, 151, 153, 155, 157,
2046 159, 161, 165, 169, 173, 177
2047 };
2048 static const u8 chan_list_6ghz[] = {
2049 1, 3, 5, 7, 9, 11, 13,
2050 15, 17, 19, 21, 23, 25, 27,
2051 29, 33, 35, 37, 39, 41, 43,
2052 45, 47, 49, 51, 53, 55, 57,
2053 59, 61, 65, 67, 69, 71, 73,
2054 75, 77, 79, 81, 83, 85, 87,
2055 89, 91, 93, 97, 99, 101, 103,
2056 105, 107, 109, 111, 113, 115, 117,
2057 119, 121, 123, 125, 129, 131, 133,
2058 135, 137, 139, 141, 143, 145, 147,
2059 149, 151, 153, 155, 157, 161, 163,
2060 165, 167, 169, 171, 173, 175, 177,
2061 179, 181, 183, 185, 187, 189, 193,
2062 195, 197, 199, 201, 203, 205, 207,
2063 209, 211, 213, 215, 217, 219, 221,
2064 225, 227, 229, 233
2065 };
2066 int i, n_chan, batch_size, idx = 0, tx_power, last_ch, err = 0;
2067 struct mt76_connac_sku_tlv sku_tlbv;
2068 struct mt76_power_limits *limits;
2069 const u8 *ch_list;
2070
2071 limits = devm_kmalloc(dev->dev, sizeof(*limits), GFP_KERNEL);
2072 if (!limits)
2073 return -ENOMEM;
2074
2075 sku_len = is_mt7921(dev) ? sizeof(sku_tlbv) : sizeof(sku_tlbv) - 92;
2076 tx_power = 2 * phy->hw->conf.power_level;
2077 if (!tx_power)
2078 tx_power = 127;
2079
2080 if (band == NL80211_BAND_2GHZ) {
2081 n_chan = ARRAY_SIZE(chan_list_2ghz);
2082 ch_list = chan_list_2ghz;
2083 } else if (band == NL80211_BAND_6GHZ) {
2084 n_chan = ARRAY_SIZE(chan_list_6ghz);
2085 ch_list = chan_list_6ghz;
2086 } else {
2087 n_chan = ARRAY_SIZE(chan_list_5ghz);
2088 ch_list = chan_list_5ghz;
2089 }
2090 batch_size = DIV_ROUND_UP(n_chan, batch_len);
2091
2092 if (phy->cap.has_6ghz)
2093 last_ch = chan_list_6ghz[ARRAY_SIZE(chan_list_6ghz) - 1];
2094 else if (phy->cap.has_5ghz)
2095 last_ch = chan_list_5ghz[ARRAY_SIZE(chan_list_5ghz) - 1];
2096 else
2097 last_ch = chan_list_2ghz[ARRAY_SIZE(chan_list_2ghz) - 1];
2098
2099 for (i = 0; i < batch_size; i++) {
2100 struct mt76_connac_tx_power_limit_tlv tx_power_tlv = {};
2101 int j, msg_len, num_ch;
2102 struct sk_buff *skb;
2103
2104 num_ch = i == batch_size - 1 ? n_chan % batch_len : batch_len;
2105 msg_len = sizeof(tx_power_tlv) + num_ch * sizeof(sku_tlbv);
2106 skb = mt76_mcu_msg_alloc(dev, NULL, msg_len);
2107 if (!skb) {
2108 err = -ENOMEM;
2109 goto out;
2110 }
2111
2112 skb_reserve(skb, sizeof(tx_power_tlv));
2113
2114 BUILD_BUG_ON(sizeof(dev->alpha2) > sizeof(tx_power_tlv.alpha2));
2115 memcpy(tx_power_tlv.alpha2, dev->alpha2, sizeof(dev->alpha2));
2116 tx_power_tlv.n_chan = num_ch;
2117
2118 switch (band) {
2119 case NL80211_BAND_2GHZ:
2120 tx_power_tlv.band = 1;
2121 break;
2122 case NL80211_BAND_6GHZ:
2123 tx_power_tlv.band = 3;
2124 break;
2125 default:
2126 tx_power_tlv.band = 2;
2127 break;
2128 }
2129
2130 for (j = 0; j < num_ch; j++, idx++) {
2131 struct ieee80211_channel chan = {
2132 .hw_value = ch_list[idx],
2133 .band = band,
2134 };
2135 s8 reg_power, sar_power;
2136
2137 reg_power = mt76_connac_get_ch_power(phy, &chan,
2138 tx_power);
2139 sar_power = mt76_get_sar_power(phy, &chan, reg_power);
2140
2141 mt76_get_rate_power_limits(phy, &chan, limits,
2142 sar_power);
2143
2144 tx_power_tlv.last_msg = ch_list[idx] == last_ch;
2145 sku_tlbv.channel = ch_list[idx];
2146
2147 mt76_connac_mcu_build_sku(dev, sku_tlbv.pwr_limit,
2148 limits, band);
2149 skb_put_data(skb, &sku_tlbv, sku_len);
2150 }
2151 __skb_push(skb, sizeof(tx_power_tlv));
2152 memcpy(skb->data, &tx_power_tlv, sizeof(tx_power_tlv));
2153
2154 err = mt76_mcu_skb_send_msg(dev, skb,
2155 MCU_CE_CMD(SET_RATE_TX_POWER),
2156 false);
2157 if (err < 0)
2158 goto out;
2159 }
2160
2161out:
2162 devm_kfree(dev->dev, limits);
2163 return err;
2164}
2165
2166int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy)
2167{
2168 int err;
2169
2170 if (phy->cap.has_2ghz) {
2171 err = mt76_connac_mcu_rate_txpower_band(phy,
2172 NL80211_BAND_2GHZ);
2173 if (err < 0)
2174 return err;
2175 }
2176 if (phy->cap.has_5ghz) {
2177 err = mt76_connac_mcu_rate_txpower_band(phy,
2178 NL80211_BAND_5GHZ);
2179 if (err < 0)
2180 return err;
2181 }
2182 if (phy->cap.has_6ghz) {
2183 err = mt76_connac_mcu_rate_txpower_band(phy,
2184 NL80211_BAND_6GHZ);
2185 if (err < 0)
2186 return err;
2187 }
2188
2189 return 0;
2190}
2191EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_rate_txpower);
2192
2193int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev,
2194 struct mt76_vif *vif,
2195 struct ieee80211_bss_conf *info)
2196{
2197 struct ieee80211_vif *mvif = container_of(info, struct ieee80211_vif,
2198 bss_conf);
2199 struct sk_buff *skb;
2200 int i, len = min_t(int, mvif->cfg.arp_addr_cnt,
2201 IEEE80211_BSS_ARP_ADDR_LIST_LEN);
2202 struct {
2203 struct {
2204 u8 bss_idx;
2205 u8 pad[3];
2206 } __packed hdr;
2207 struct mt76_connac_arpns_tlv arp;
2208 } req_hdr = {
2209 .hdr = {
2210 .bss_idx = vif->idx,
2211 },
2212 .arp = {
2213 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_ARP),
2214 .len = cpu_to_le16(sizeof(struct mt76_connac_arpns_tlv)),
2215 .ips_num = len,
2216 .mode = 2, /* update */
2217 .option = 1,
2218 },
2219 };
2220
2221 skb = mt76_mcu_msg_alloc(dev, NULL,
2222 sizeof(req_hdr) + len * sizeof(__be32));
2223 if (!skb)
2224 return -ENOMEM;
2225
2226 skb_put_data(skb, &req_hdr, sizeof(req_hdr));
2227 for (i = 0; i < len; i++)
2228 skb_put_data(skb, &mvif->cfg.arp_addr_list[i], sizeof(__be32));
2229
2230 return mt76_mcu_skb_send_msg(dev, skb, MCU_UNI_CMD(OFFLOAD), true);
2231}
2232EXPORT_SYMBOL_GPL(mt76_connac_mcu_update_arp_filter);
2233
2234int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw,
2235 struct ieee80211_vif *vif)
2236{
2237 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2238 int ct_window = vif->bss_conf.p2p_noa_attr.oppps_ctwindow;
2239 struct mt76_phy *phy = hw->priv;
2240 struct {
2241 __le32 ct_win;
2242 u8 bss_idx;
2243 u8 rsv[3];
2244 } __packed req = {
2245 .ct_win = cpu_to_le32(ct_window),
2246 .bss_idx = mvif->idx,
2247 };
2248
2249 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(SET_P2P_OPPPS),
2250 &req, sizeof(req), false);
2251}
2252EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_p2p_oppps);
2253
2254#ifdef CONFIG_PM
2255
2256const struct wiphy_wowlan_support mt76_connac_wowlan_support = {
2257 .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT |
2258 WIPHY_WOWLAN_SUPPORTS_GTK_REKEY | WIPHY_WOWLAN_NET_DETECT,
2259 .n_patterns = 1,
2260 .pattern_min_len = 1,
2261 .pattern_max_len = MT76_CONNAC_WOW_PATTEN_MAX_LEN,
2262 .max_nd_match_sets = 10,
2263};
2264EXPORT_SYMBOL_GPL(mt76_connac_wowlan_support);
2265
2266static void
2267mt76_connac_mcu_key_iter(struct ieee80211_hw *hw,
2268 struct ieee80211_vif *vif,
2269 struct ieee80211_sta *sta,
2270 struct ieee80211_key_conf *key,
2271 void *data)
2272{
2273 struct mt76_connac_gtk_rekey_tlv *gtk_tlv = data;
2274 u32 cipher;
2275
2276 if (key->cipher != WLAN_CIPHER_SUITE_AES_CMAC &&
2277 key->cipher != WLAN_CIPHER_SUITE_CCMP &&
2278 key->cipher != WLAN_CIPHER_SUITE_TKIP)
2279 return;
2280
2281 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
2282 cipher = BIT(3);
2283 else
2284 cipher = BIT(4);
2285
2286 /* we are assuming here to have a single pairwise key */
2287 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) {
2288 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
2289 gtk_tlv->proto = cpu_to_le32(NL80211_WPA_VERSION_1);
2290 else
2291 gtk_tlv->proto = cpu_to_le32(NL80211_WPA_VERSION_2);
2292
2293 gtk_tlv->pairwise_cipher = cpu_to_le32(cipher);
2294 gtk_tlv->keyid = key->keyidx;
2295 } else {
2296 gtk_tlv->group_cipher = cpu_to_le32(cipher);
2297 }
2298}
2299
2300int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw,
2301 struct ieee80211_vif *vif,
2302 struct cfg80211_gtk_rekey_data *key)
2303{
2304 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2305 struct mt76_connac_gtk_rekey_tlv *gtk_tlv;
2306 struct mt76_phy *phy = hw->priv;
2307 struct sk_buff *skb;
2308 struct {
2309 u8 bss_idx;
2310 u8 pad[3];
2311 } __packed hdr = {
2312 .bss_idx = mvif->idx,
2313 };
2314
2315 skb = mt76_mcu_msg_alloc(phy->dev, NULL,
2316 sizeof(hdr) + sizeof(*gtk_tlv));
2317 if (!skb)
2318 return -ENOMEM;
2319
2320 skb_put_data(skb, &hdr, sizeof(hdr));
2321 gtk_tlv = (struct mt76_connac_gtk_rekey_tlv *)skb_put(skb,
2322 sizeof(*gtk_tlv));
2323 gtk_tlv->tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_GTK_REKEY);
2324 gtk_tlv->len = cpu_to_le16(sizeof(*gtk_tlv));
2325 gtk_tlv->rekey_mode = 2;
2326 gtk_tlv->option = 1;
2327
2328 rcu_read_lock();
2329 ieee80211_iter_keys_rcu(hw, vif, mt76_connac_mcu_key_iter, gtk_tlv);
2330 rcu_read_unlock();
2331
2332 memcpy(gtk_tlv->kek, key->kek, NL80211_KEK_LEN);
2333 memcpy(gtk_tlv->kck, key->kck, NL80211_KCK_LEN);
2334 memcpy(gtk_tlv->replay_ctr, key->replay_ctr, NL80211_REPLAY_CTR_LEN);
2335
2336 return mt76_mcu_skb_send_msg(phy->dev, skb,
2337 MCU_UNI_CMD(OFFLOAD), true);
2338}
2339EXPORT_SYMBOL_GPL(mt76_connac_mcu_update_gtk_rekey);
2340
2341static int
2342mt76_connac_mcu_set_arp_filter(struct mt76_dev *dev, struct ieee80211_vif *vif,
2343 bool suspend)
2344{
2345 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2346 struct {
2347 struct {
2348 u8 bss_idx;
2349 u8 pad[3];
2350 } __packed hdr;
2351 struct mt76_connac_arpns_tlv arpns;
2352 } req = {
2353 .hdr = {
2354 .bss_idx = mvif->idx,
2355 },
2356 .arpns = {
2357 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_ARP),
2358 .len = cpu_to_le16(sizeof(struct mt76_connac_arpns_tlv)),
2359 .mode = suspend,
2360 },
2361 };
2362
2363 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(OFFLOAD), &req,
2364 sizeof(req), true);
2365}
2366
2367int
2368mt76_connac_mcu_set_gtk_rekey(struct mt76_dev *dev, struct ieee80211_vif *vif,
2369 bool suspend)
2370{
2371 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2372 struct {
2373 struct {
2374 u8 bss_idx;
2375 u8 pad[3];
2376 } __packed hdr;
2377 struct mt76_connac_gtk_rekey_tlv gtk_tlv;
2378 } __packed req = {
2379 .hdr = {
2380 .bss_idx = mvif->idx,
2381 },
2382 .gtk_tlv = {
2383 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_GTK_REKEY),
2384 .len = cpu_to_le16(sizeof(struct mt76_connac_gtk_rekey_tlv)),
2385 .rekey_mode = !suspend,
2386 },
2387 };
2388
2389 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(OFFLOAD), &req,
2390 sizeof(req), true);
2391}
2392EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_gtk_rekey);
2393
2394int
2395mt76_connac_mcu_set_suspend_mode(struct mt76_dev *dev,
2396 struct ieee80211_vif *vif,
2397 bool enable, u8 mdtim,
2398 bool wow_suspend)
2399{
2400 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2401 struct {
2402 struct {
2403 u8 bss_idx;
2404 u8 pad[3];
2405 } __packed hdr;
2406 struct mt76_connac_suspend_tlv suspend_tlv;
2407 } req = {
2408 .hdr = {
2409 .bss_idx = mvif->idx,
2410 },
2411 .suspend_tlv = {
2412 .tag = cpu_to_le16(UNI_SUSPEND_MODE_SETTING),
2413 .len = cpu_to_le16(sizeof(struct mt76_connac_suspend_tlv)),
2414 .enable = enable,
2415 .mdtim = mdtim,
2416 .wow_suspend = wow_suspend,
2417 },
2418 };
2419
2420 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(SUSPEND), &req,
2421 sizeof(req), true);
2422}
2423EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_suspend_mode);
2424
2425static int
2426mt76_connac_mcu_set_wow_pattern(struct mt76_dev *dev,
2427 struct ieee80211_vif *vif,
2428 u8 index, bool enable,
2429 struct cfg80211_pkt_pattern *pattern)
2430{
2431 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2432 struct mt76_connac_wow_pattern_tlv *ptlv;
2433 struct sk_buff *skb;
2434 struct req_hdr {
2435 u8 bss_idx;
2436 u8 pad[3];
2437 } __packed hdr = {
2438 .bss_idx = mvif->idx,
2439 };
2440
2441 skb = mt76_mcu_msg_alloc(dev, NULL, sizeof(hdr) + sizeof(*ptlv));
2442 if (!skb)
2443 return -ENOMEM;
2444
2445 skb_put_data(skb, &hdr, sizeof(hdr));
2446 ptlv = (struct mt76_connac_wow_pattern_tlv *)skb_put(skb, sizeof(*ptlv));
2447 ptlv->tag = cpu_to_le16(UNI_SUSPEND_WOW_PATTERN);
2448 ptlv->len = cpu_to_le16(sizeof(*ptlv));
2449 ptlv->data_len = pattern->pattern_len;
2450 ptlv->enable = enable;
2451 ptlv->index = index;
2452
2453 memcpy(ptlv->pattern, pattern->pattern, pattern->pattern_len);
2454 memcpy(ptlv->mask, pattern->mask, DIV_ROUND_UP(pattern->pattern_len, 8));
2455
2456 return mt76_mcu_skb_send_msg(dev, skb, MCU_UNI_CMD(SUSPEND), true);
2457}
2458
2459int
2460mt76_connac_mcu_set_wow_ctrl(struct mt76_phy *phy, struct ieee80211_vif *vif,
2461 bool suspend, struct cfg80211_wowlan *wowlan)
2462{
2463 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2464 struct mt76_dev *dev = phy->dev;
2465 struct {
2466 struct {
2467 u8 bss_idx;
2468 u8 pad[3];
2469 } __packed hdr;
2470 struct mt76_connac_wow_ctrl_tlv wow_ctrl_tlv;
2471 struct mt76_connac_wow_gpio_param_tlv gpio_tlv;
2472 } req = {
2473 .hdr = {
2474 .bss_idx = mvif->idx,
2475 },
2476 .wow_ctrl_tlv = {
2477 .tag = cpu_to_le16(UNI_SUSPEND_WOW_CTRL),
2478 .len = cpu_to_le16(sizeof(struct mt76_connac_wow_ctrl_tlv)),
2479 .cmd = suspend ? 1 : 2,
2480 },
2481 .gpio_tlv = {
2482 .tag = cpu_to_le16(UNI_SUSPEND_WOW_GPIO_PARAM),
2483 .len = cpu_to_le16(sizeof(struct mt76_connac_wow_gpio_param_tlv)),
2484 .gpio_pin = 0xff, /* follow fw about GPIO pin */
2485 },
2486 };
2487
2488 if (wowlan->magic_pkt)
2489 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_MAGIC;
2490 if (wowlan->disconnect)
2491 req.wow_ctrl_tlv.trigger |= (UNI_WOW_DETECT_TYPE_DISCONNECT |
2492 UNI_WOW_DETECT_TYPE_BCN_LOST);
2493 if (wowlan->nd_config) {
2494 mt76_connac_mcu_sched_scan_req(phy, vif, wowlan->nd_config);
2495 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT;
2496 mt76_connac_mcu_sched_scan_enable(phy, vif, suspend);
2497 }
2498 if (wowlan->n_patterns)
2499 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_BITMAP;
2500
2501 if (mt76_is_mmio(dev))
2502 req.wow_ctrl_tlv.wakeup_hif = WOW_PCIE;
2503 else if (mt76_is_usb(dev))
2504 req.wow_ctrl_tlv.wakeup_hif = WOW_USB;
2505 else if (mt76_is_sdio(dev))
2506 req.wow_ctrl_tlv.wakeup_hif = WOW_GPIO;
2507
2508 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(SUSPEND), &req,
2509 sizeof(req), true);
2510}
2511EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_wow_ctrl);
2512
2513int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend)
2514{
2515 struct {
2516 struct {
2517 u8 hif_type; /* 0x0: HIF_SDIO
2518 * 0x1: HIF_USB
2519 * 0x2: HIF_PCIE
2520 */
2521 u8 pad[3];
2522 } __packed hdr;
2523 struct hif_suspend_tlv {
2524 __le16 tag;
2525 __le16 len;
2526 u8 suspend;
2527 } __packed hif_suspend;
2528 } req = {
2529 .hif_suspend = {
2530 .tag = cpu_to_le16(0), /* 0: UNI_HIF_CTRL_BASIC */
2531 .len = cpu_to_le16(sizeof(struct hif_suspend_tlv)),
2532 .suspend = suspend,
2533 },
2534 };
2535
2536 if (mt76_is_mmio(dev))
2537 req.hdr.hif_type = 2;
2538 else if (mt76_is_usb(dev))
2539 req.hdr.hif_type = 1;
2540 else if (mt76_is_sdio(dev))
2541 req.hdr.hif_type = 0;
2542
2543 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(HIF_CTRL), &req,
2544 sizeof(req), true);
2545}
2546EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_hif_suspend);
2547
2548void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac,
2549 struct ieee80211_vif *vif)
2550{
2551 struct mt76_phy *phy = priv;
2552 bool suspend = !test_bit(MT76_STATE_RUNNING, &phy->state);
2553 struct ieee80211_hw *hw = phy->hw;
2554 struct cfg80211_wowlan *wowlan = hw->wiphy->wowlan_config;
2555 int i;
2556
2557 mt76_connac_mcu_set_gtk_rekey(phy->dev, vif, suspend);
2558 mt76_connac_mcu_set_arp_filter(phy->dev, vif, suspend);
2559
2560 mt76_connac_mcu_set_suspend_mode(phy->dev, vif, suspend, 1, true);
2561
2562 for (i = 0; i < wowlan->n_patterns; i++)
2563 mt76_connac_mcu_set_wow_pattern(phy->dev, vif, i, suspend,
2564 &wowlan->patterns[i]);
2565 mt76_connac_mcu_set_wow_ctrl(phy, vif, suspend, wowlan);
2566}
2567EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_suspend_iter);
2568#endif /* CONFIG_PM */
2569
2570u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset)
2571{
2572 struct {
2573 __le32 addr;
2574 __le32 val;
2575 } __packed req = {
2576 .addr = cpu_to_le32(offset),
2577 };
2578
2579 return mt76_mcu_send_msg(dev, MCU_CE_QUERY(REG_READ), &req,
2580 sizeof(req), true);
2581}
2582EXPORT_SYMBOL_GPL(mt76_connac_mcu_reg_rr);
2583
2584void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val)
2585{
2586 struct {
2587 __le32 addr;
2588 __le32 val;
2589 } __packed req = {
2590 .addr = cpu_to_le32(offset),
2591 .val = cpu_to_le32(val),
2592 };
2593
2594 mt76_mcu_send_msg(dev, MCU_CE_CMD(REG_WRITE), &req,
2595 sizeof(req), false);
2596}
2597EXPORT_SYMBOL_GPL(mt76_connac_mcu_reg_wr);
2598
2599static int
2600mt76_connac_mcu_sta_key_tlv(struct mt76_connac_sta_key_conf *sta_key_conf,
2601 struct sk_buff *skb,
2602 struct ieee80211_key_conf *key,
2603 enum set_key_cmd cmd)
2604{
2605 struct sta_rec_sec *sec;
2606 u32 len = sizeof(*sec);
2607 struct tlv *tlv;
2608
2609 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec));
2610 sec = (struct sta_rec_sec *)tlv;
2611 sec->add = cmd;
2612
2613 if (cmd == SET_KEY) {
2614 struct sec_key *sec_key;
2615 u8 cipher;
2616
2617 cipher = mt76_connac_mcu_get_cipher(key->cipher);
2618 if (cipher == MCU_CIPHER_NONE)
2619 return -EOPNOTSUPP;
2620
2621 sec_key = &sec->key[0];
2622 sec_key->cipher_len = sizeof(*sec_key);
2623
2624 if (cipher == MCU_CIPHER_BIP_CMAC_128) {
2625 sec_key->cipher_id = MCU_CIPHER_AES_CCMP;
2626 sec_key->key_id = sta_key_conf->keyidx;
2627 sec_key->key_len = 16;
2628 memcpy(sec_key->key, sta_key_conf->key, 16);
2629
2630 sec_key = &sec->key[1];
2631 sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128;
2632 sec_key->cipher_len = sizeof(*sec_key);
2633 sec_key->key_len = 16;
2634 memcpy(sec_key->key, key->key, 16);
2635 sec->n_cipher = 2;
2636 } else {
2637 sec_key->cipher_id = cipher;
2638 sec_key->key_id = key->keyidx;
2639 sec_key->key_len = key->keylen;
2640 memcpy(sec_key->key, key->key, key->keylen);
2641
2642 if (cipher == MCU_CIPHER_TKIP) {
2643 /* Rx/Tx MIC keys are swapped */
2644 memcpy(sec_key->key + 16, key->key + 24, 8);
2645 memcpy(sec_key->key + 24, key->key + 16, 8);
2646 }
2647
2648 /* store key_conf for BIP batch update */
2649 if (cipher == MCU_CIPHER_AES_CCMP) {
2650 memcpy(sta_key_conf->key, key->key, key->keylen);
2651 sta_key_conf->keyidx = key->keyidx;
2652 }
2653
2654 len -= sizeof(*sec_key);
2655 sec->n_cipher = 1;
2656 }
2657 } else {
2658 len -= sizeof(sec->key);
2659 sec->n_cipher = 0;
2660 }
2661 sec->len = cpu_to_le16(len);
2662
2663 return 0;
2664}
2665
2666int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif,
2667 struct mt76_connac_sta_key_conf *sta_key_conf,
2668 struct ieee80211_key_conf *key, int mcu_cmd,
2669 struct mt76_wcid *wcid, enum set_key_cmd cmd)
2670{
2671 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2672 struct sk_buff *skb;
2673 int ret;
2674
2675 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
2676 if (IS_ERR(skb))
2677 return PTR_ERR(skb);
2678
2679 ret = mt76_connac_mcu_sta_key_tlv(sta_key_conf, skb, key, cmd);
2680 if (ret)
2681 return ret;
2682
2683 ret = mt76_connac_mcu_sta_wed_update(dev, skb);
2684 if (ret)
2685 return ret;
2686
2687 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true);
2688}
2689EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_key);
2690
2691/* SIFS 20us + 512 byte beacon transmitted by 1Mbps (3906us) */
2692#define BCN_TX_ESTIMATE_TIME (4096 + 20)
2693void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif)
2694{
2695 struct bss_info_ext_bss *ext;
2696 int ext_bss_idx, tsf_offset;
2697 struct tlv *tlv;
2698
2699 ext_bss_idx = mvif->omac_idx - EXT_BSSID_START;
2700 if (ext_bss_idx < 0)
2701 return;
2702
2703 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_EXT_BSS, sizeof(*ext));
2704
2705 ext = (struct bss_info_ext_bss *)tlv;
2706 tsf_offset = ext_bss_idx * BCN_TX_ESTIMATE_TIME;
2707 ext->mbss_tsf_offset = cpu_to_le32(tsf_offset);
2708}
2709EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_ext_tlv);
2710
2711int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb,
2712 struct ieee80211_vif *vif,
2713 struct ieee80211_sta *sta,
2714 struct mt76_phy *phy, u16 wlan_idx,
2715 bool enable)
2716{
2717 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2718 u32 type = vif->p2p ? NETWORK_P2P : NETWORK_INFRA;
2719 struct bss_info_basic *bss;
2720 struct tlv *tlv;
2721
2722 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BASIC, sizeof(*bss));
2723 bss = (struct bss_info_basic *)tlv;
2724
2725 switch (vif->type) {
2726 case NL80211_IFTYPE_MESH_POINT:
2727 case NL80211_IFTYPE_MONITOR:
2728 break;
2729 case NL80211_IFTYPE_AP:
2730 if (ieee80211_hw_check(phy->hw, SUPPORTS_MULTI_BSSID)) {
2731 u8 bssid_id = vif->bss_conf.bssid_indicator;
2732 struct wiphy *wiphy = phy->hw->wiphy;
2733
2734 if (bssid_id > ilog2(wiphy->mbssid_max_interfaces))
2735 return -EINVAL;
2736
2737 bss->non_tx_bssid = vif->bss_conf.bssid_index;
2738 bss->max_bssid = bssid_id;
2739 }
2740 break;
2741 case NL80211_IFTYPE_STATION:
2742 if (enable) {
2743 rcu_read_lock();
2744 if (!sta)
2745 sta = ieee80211_find_sta(vif,
2746 vif->bss_conf.bssid);
2747 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */
2748 if (sta) {
2749 struct mt76_wcid *wcid;
2750
2751 wcid = (struct mt76_wcid *)sta->drv_priv;
2752 wlan_idx = wcid->idx;
2753 }
2754 rcu_read_unlock();
2755 }
2756 break;
2757 case NL80211_IFTYPE_ADHOC:
2758 type = NETWORK_IBSS;
2759 break;
2760 default:
2761 WARN_ON(1);
2762 break;
2763 }
2764
2765 bss->network_type = cpu_to_le32(type);
2766 bss->bmc_wcid_lo = to_wcid_lo(wlan_idx);
2767 bss->bmc_wcid_hi = to_wcid_hi(wlan_idx);
2768 bss->wmm_idx = mvif->wmm_idx;
2769 bss->active = enable;
2770 bss->cipher = mvif->cipher;
2771
2772 if (vif->type != NL80211_IFTYPE_MONITOR) {
2773 struct cfg80211_chan_def *chandef = &phy->chandef;
2774
2775 memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN);
2776 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int);
2777 bss->dtim_period = vif->bss_conf.dtim_period;
2778 bss->phy_mode = mt76_connac_get_phy_mode(phy, vif,
2779 chandef->chan->band, NULL);
2780 } else {
2781 memcpy(bss->bssid, phy->macaddr, ETH_ALEN);
2782 }
2783
2784 return 0;
2785}
2786EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_basic_tlv);
2787
2788#define ENTER_PM_STATE 1
2789#define EXIT_PM_STATE 2
2790int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter)
2791{
2792 struct {
2793 u8 pm_number;
2794 u8 pm_state;
2795 u8 bssid[ETH_ALEN];
2796 u8 dtim_period;
2797 u8 wlan_idx_lo;
2798 __le16 bcn_interval;
2799 __le32 aid;
2800 __le32 rx_filter;
2801 u8 band_idx;
2802 u8 wlan_idx_hi;
2803 u8 rsv[2];
2804 __le32 feature;
2805 u8 omac_idx;
2806 u8 wmm_idx;
2807 u8 bcn_loss_cnt;
2808 u8 bcn_sp_duration;
2809 } __packed req = {
2810 .pm_number = 5,
2811 .pm_state = enter ? ENTER_PM_STATE : EXIT_PM_STATE,
2812 .band_idx = band,
2813 };
2814
2815 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(PM_STATE_CTRL), &req,
2816 sizeof(req), true);
2817}
2818EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_pm);
2819
2820int mt76_connac_mcu_restart(struct mt76_dev *dev)
2821{
2822 struct {
2823 u8 power_mode;
2824 u8 rsv[3];
2825 } req = {
2826 .power_mode = 1,
2827 };
2828
2829 return mt76_mcu_send_msg(dev, MCU_CMD(NIC_POWER_CTRL), &req,
2830 sizeof(req), false);
2831}
2832EXPORT_SYMBOL_GPL(mt76_connac_mcu_restart);
2833
2834int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index,
2835 u8 rx_sel, u8 val)
2836{
2837 struct {
2838 u8 ctrl;
2839 u8 rdd_idx;
2840 u8 rdd_rx_sel;
2841 u8 val;
2842 u8 rsv[4];
2843 } __packed req = {
2844 .ctrl = cmd,
2845 .rdd_idx = index,
2846 .rdd_rx_sel = rx_sel,
2847 .val = val,
2848 };
2849
2850 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(SET_RDD_CTRL), &req,
2851 sizeof(req), true);
2852}
2853EXPORT_SYMBOL_GPL(mt76_connac_mcu_rdd_cmd);
2854
2855static int
2856mt76_connac_mcu_send_ram_firmware(struct mt76_dev *dev,
2857 const struct mt76_connac2_fw_trailer *hdr,
2858 const u8 *data, bool is_wa)
2859{
2860 int i, offset = 0, max_len = mt76_is_sdio(dev) ? 2048 : 4096;
2861 u32 override = 0, option = 0;
2862
2863 for (i = 0; i < hdr->n_region; i++) {
2864 const struct mt76_connac2_fw_region *region;
2865 u32 len, addr, mode;
2866 int err;
2867
2868 region = (const void *)((const u8 *)hdr -
2869 (hdr->n_region - i) * sizeof(*region));
2870 mode = mt76_connac_mcu_gen_dl_mode(dev, region->feature_set,
2871 is_wa);
2872 len = le32_to_cpu(region->len);
2873 addr = le32_to_cpu(region->addr);
2874
2875 if (region->feature_set & FW_FEATURE_NON_DL)
2876 goto next;
2877
2878 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR)
2879 override = addr;
2880
2881 err = mt76_connac_mcu_init_download(dev, addr, len, mode);
2882 if (err) {
2883 dev_err(dev->dev, "Download request failed\n");
2884 return err;
2885 }
2886
2887 err = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER),
2888 data + offset, len, max_len);
2889 if (err) {
2890 dev_err(dev->dev, "Failed to send firmware.\n");
2891 return err;
2892 }
2893
2894next:
2895 offset += len;
2896 }
2897
2898 if (override)
2899 option |= FW_START_OVERRIDE;
2900 if (is_wa)
2901 option |= FW_START_WORKING_PDA_CR4;
2902
2903 return mt76_connac_mcu_start_firmware(dev, override, option);
2904}
2905
2906int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm,
2907 const char *fw_wa)
2908{
2909 const struct mt76_connac2_fw_trailer *hdr;
2910 const struct firmware *fw;
2911 int ret;
2912
2913 ret = request_firmware(&fw, fw_wm, dev->dev);
2914 if (ret)
2915 return ret;
2916
2917 if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2918 dev_err(dev->dev, "Invalid firmware\n");
2919 ret = -EINVAL;
2920 goto out;
2921 }
2922
2923 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
2924 dev_info(dev->dev, "WM Firmware Version: %.10s, Build Time: %.15s\n",
2925 hdr->fw_ver, hdr->build_date);
2926
2927 ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, false);
2928 if (ret) {
2929 dev_err(dev->dev, "Failed to start WM firmware\n");
2930 goto out;
2931 }
2932
2933 snprintf(dev->hw->wiphy->fw_version,
2934 sizeof(dev->hw->wiphy->fw_version),
2935 "%.10s-%.15s", hdr->fw_ver, hdr->build_date);
2936
2937 release_firmware(fw);
2938
2939 if (!fw_wa)
2940 return 0;
2941
2942 ret = request_firmware(&fw, fw_wa, dev->dev);
2943 if (ret)
2944 return ret;
2945
2946 if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2947 dev_err(dev->dev, "Invalid firmware\n");
2948 ret = -EINVAL;
2949 goto out;
2950 }
2951
2952 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
2953 dev_info(dev->dev, "WA Firmware Version: %.10s, Build Time: %.15s\n",
2954 hdr->fw_ver, hdr->build_date);
2955
2956 ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, true);
2957 if (ret) {
2958 dev_err(dev->dev, "Failed to start WA firmware\n");
2959 goto out;
2960 }
2961
2962 snprintf(dev->hw->wiphy->fw_version,
2963 sizeof(dev->hw->wiphy->fw_version),
2964 "%.10s-%.15s", hdr->fw_ver, hdr->build_date);
2965
2966out:
2967 release_firmware(fw);
2968
2969 return ret;
2970}
2971EXPORT_SYMBOL_GPL(mt76_connac2_load_ram);
2972
2973static u32 mt76_connac2_get_data_mode(struct mt76_dev *dev, u32 info)
2974{
2975 u32 mode = DL_MODE_NEED_RSP;
2976
2977 if ((!is_mt7921(dev) && !is_mt7925(dev)) || info == PATCH_SEC_NOT_SUPPORT)
2978 return mode;
2979
2980 switch (FIELD_GET(PATCH_SEC_ENC_TYPE_MASK, info)) {
2981 case PATCH_SEC_ENC_TYPE_PLAIN:
2982 break;
2983 case PATCH_SEC_ENC_TYPE_AES:
2984 mode |= DL_MODE_ENCRYPT;
2985 mode |= FIELD_PREP(DL_MODE_KEY_IDX,
2986 (info & PATCH_SEC_ENC_AES_KEY_MASK)) & DL_MODE_KEY_IDX;
2987 mode |= DL_MODE_RESET_SEC_IV;
2988 break;
2989 case PATCH_SEC_ENC_TYPE_SCRAMBLE:
2990 mode |= DL_MODE_ENCRYPT;
2991 mode |= DL_CONFIG_ENCRY_MODE_SEL;
2992 mode |= DL_MODE_RESET_SEC_IV;
2993 break;
2994 default:
2995 dev_err(dev->dev, "Encryption type not support!\n");
2996 }
2997
2998 return mode;
2999}
3000
3001int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name)
3002{
3003 int i, ret, sem, max_len = mt76_is_sdio(dev) ? 2048 : 4096;
3004 const struct mt76_connac2_patch_hdr *hdr;
3005 const struct firmware *fw = NULL;
3006
3007 sem = mt76_connac_mcu_patch_sem_ctrl(dev, true);
3008 switch (sem) {
3009 case PATCH_IS_DL:
3010 return 0;
3011 case PATCH_NOT_DL_SEM_SUCCESS:
3012 break;
3013 default:
3014 dev_err(dev->dev, "Failed to get patch semaphore\n");
3015 return -EAGAIN;
3016 }
3017
3018 ret = request_firmware(&fw, fw_name, dev->dev);
3019 if (ret)
3020 goto out;
3021
3022 if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
3023 dev_err(dev->dev, "Invalid firmware\n");
3024 ret = -EINVAL;
3025 goto out;
3026 }
3027
3028 hdr = (const void *)fw->data;
3029 dev_info(dev->dev, "HW/SW Version: 0x%x, Build Time: %.16s\n",
3030 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date);
3031
3032 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) {
3033 struct mt76_connac2_patch_sec *sec;
3034 u32 len, addr, mode;
3035 const u8 *dl;
3036 u32 sec_info;
3037
3038 sec = (void *)(fw->data + sizeof(*hdr) + i * sizeof(*sec));
3039 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) !=
3040 PATCH_SEC_TYPE_INFO) {
3041 ret = -EINVAL;
3042 goto out;
3043 }
3044
3045 addr = be32_to_cpu(sec->info.addr);
3046 len = be32_to_cpu(sec->info.len);
3047 dl = fw->data + be32_to_cpu(sec->offs);
3048 sec_info = be32_to_cpu(sec->info.sec_key_idx);
3049 mode = mt76_connac2_get_data_mode(dev, sec_info);
3050
3051 ret = mt76_connac_mcu_init_download(dev, addr, len, mode);
3052 if (ret) {
3053 dev_err(dev->dev, "Download request failed\n");
3054 goto out;
3055 }
3056
3057 ret = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER),
3058 dl, len, max_len);
3059 if (ret) {
3060 dev_err(dev->dev, "Failed to send patch\n");
3061 goto out;
3062 }
3063 }
3064
3065 ret = mt76_connac_mcu_start_patch(dev);
3066 if (ret)
3067 dev_err(dev->dev, "Failed to start patch\n");
3068
3069out:
3070 sem = mt76_connac_mcu_patch_sem_ctrl(dev, false);
3071 switch (sem) {
3072 case PATCH_REL_SEM_SUCCESS:
3073 break;
3074 default:
3075 ret = -EAGAIN;
3076 dev_err(dev->dev, "Failed to release patch semaphore\n");
3077 break;
3078 }
3079
3080 release_firmware(fw);
3081
3082 return ret;
3083}
3084EXPORT_SYMBOL_GPL(mt76_connac2_load_patch);
3085
3086int mt76_connac2_mcu_fill_message(struct mt76_dev *dev, struct sk_buff *skb,
3087 int cmd, int *wait_seq)
3088{
3089 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
3090 struct mt76_connac2_mcu_uni_txd *uni_txd;
3091 struct mt76_connac2_mcu_txd *mcu_txd;
3092 __le32 *txd;
3093 u32 val;
3094 u8 seq;
3095
3096 /* TODO: make dynamic based on msg type */
3097 dev->mcu.timeout = 20 * HZ;
3098
3099 seq = ++dev->mcu.msg_seq & 0xf;
3100 if (!seq)
3101 seq = ++dev->mcu.msg_seq & 0xf;
3102
3103 if (cmd == MCU_CMD(FW_SCATTER))
3104 goto exit;
3105
3106 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd);
3107 txd = (__le32 *)skb_push(skb, txd_len);
3108
3109 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) |
3110 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) |
3111 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0);
3112 txd[0] = cpu_to_le32(val);
3113
3114 val = MT_TXD1_LONG_FORMAT |
3115 FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD);
3116 txd[1] = cpu_to_le32(val);
3117
3118 if (cmd & __MCU_CMD_FIELD_UNI) {
3119 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd;
3120 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd));
3121 uni_txd->option = MCU_CMD_UNI_EXT_ACK;
3122 uni_txd->cid = cpu_to_le16(mcu_cmd);
3123 uni_txd->s2d_index = MCU_S2D_H2N;
3124 uni_txd->pkt_type = MCU_PKT_ID;
3125 uni_txd->seq = seq;
3126
3127 goto exit;
3128 }
3129
3130 mcu_txd = (struct mt76_connac2_mcu_txd *)txd;
3131 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd));
3132 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU,
3133 MT_TX_MCU_PORT_RX_Q0));
3134 mcu_txd->pkt_type = MCU_PKT_ID;
3135 mcu_txd->seq = seq;
3136 mcu_txd->cid = mcu_cmd;
3137 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd);
3138
3139 if (mcu_txd->ext_cid || (cmd & __MCU_CMD_FIELD_CE)) {
3140 if (cmd & __MCU_CMD_FIELD_QUERY)
3141 mcu_txd->set_query = MCU_Q_QUERY;
3142 else
3143 mcu_txd->set_query = MCU_Q_SET;
3144 mcu_txd->ext_cid_ack = !!mcu_txd->ext_cid;
3145 } else {
3146 mcu_txd->set_query = MCU_Q_NA;
3147 }
3148
3149 if (cmd & __MCU_CMD_FIELD_WA)
3150 mcu_txd->s2d_index = MCU_S2D_H2C;
3151 else
3152 mcu_txd->s2d_index = MCU_S2D_H2N;
3153
3154exit:
3155 if (wait_seq)
3156 *wait_seq = seq;
3157
3158 return 0;
3159}
3160EXPORT_SYMBOL_GPL(mt76_connac2_mcu_fill_message);
3161
3162MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
3163MODULE_DESCRIPTION("MediaTek MT76x connac layer helpers");
3164MODULE_LICENSE("Dual BSD/GPL");
1// SPDX-License-Identifier: ISC
2/* Copyright (C) 2020 MediaTek Inc. */
3
4#include <linux/firmware.h>
5#include "mt76_connac2_mac.h"
6#include "mt76_connac_mcu.h"
7
8int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option)
9{
10 struct {
11 __le32 option;
12 __le32 addr;
13 } req = {
14 .option = cpu_to_le32(option),
15 .addr = cpu_to_le32(addr),
16 };
17
18 return mt76_mcu_send_msg(dev, MCU_CMD(FW_START_REQ), &req,
19 sizeof(req), true);
20}
21EXPORT_SYMBOL_GPL(mt76_connac_mcu_start_firmware);
22
23int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get)
24{
25 u32 op = get ? PATCH_SEM_GET : PATCH_SEM_RELEASE;
26 struct {
27 __le32 op;
28 } req = {
29 .op = cpu_to_le32(op),
30 };
31
32 return mt76_mcu_send_msg(dev, MCU_CMD(PATCH_SEM_CONTROL),
33 &req, sizeof(req), true);
34}
35EXPORT_SYMBOL_GPL(mt76_connac_mcu_patch_sem_ctrl);
36
37int mt76_connac_mcu_start_patch(struct mt76_dev *dev)
38{
39 struct {
40 u8 check_crc;
41 u8 reserved[3];
42 } req = {
43 .check_crc = 0,
44 };
45
46 return mt76_mcu_send_msg(dev, MCU_CMD(PATCH_FINISH_REQ),
47 &req, sizeof(req), true);
48}
49EXPORT_SYMBOL_GPL(mt76_connac_mcu_start_patch);
50
51#define MCU_PATCH_ADDRESS 0x200000
52
53int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len,
54 u32 mode)
55{
56 struct {
57 __le32 addr;
58 __le32 len;
59 __le32 mode;
60 } req = {
61 .addr = cpu_to_le32(addr),
62 .len = cpu_to_le32(len),
63 .mode = cpu_to_le32(mode),
64 };
65 int cmd;
66
67 if ((!is_connac_v1(dev) && addr == MCU_PATCH_ADDRESS) ||
68 (is_mt7921(dev) && addr == 0x900000) ||
69 (is_mt7996(dev) && addr == 0x900000))
70 cmd = MCU_CMD(PATCH_START_REQ);
71 else
72 cmd = MCU_CMD(TARGET_ADDRESS_LEN_REQ);
73
74 return mt76_mcu_send_msg(dev, cmd, &req, sizeof(req), true);
75}
76EXPORT_SYMBOL_GPL(mt76_connac_mcu_init_download);
77
78int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy)
79{
80 int len, i, n_max_channels, n_2ch = 0, n_5ch = 0, n_6ch = 0;
81 struct mt76_connac_mcu_channel_domain {
82 u8 alpha2[4]; /* regulatory_request.alpha2 */
83 u8 bw_2g; /* BW_20_40M 0
84 * BW_20M 1
85 * BW_20_40_80M 2
86 * BW_20_40_80_160M 3
87 * BW_20_40_80_8080M 4
88 */
89 u8 bw_5g;
90 u8 bw_6g;
91 u8 pad;
92 u8 n_2ch;
93 u8 n_5ch;
94 u8 n_6ch;
95 u8 pad2;
96 } __packed hdr = {
97 .bw_2g = 0,
98 .bw_5g = 3, /* BW_20_40_80_160M */
99 .bw_6g = 3,
100 };
101 struct mt76_connac_mcu_chan {
102 __le16 hw_value;
103 __le16 pad;
104 __le32 flags;
105 } __packed channel;
106 struct mt76_dev *dev = phy->dev;
107 struct ieee80211_channel *chan;
108 struct sk_buff *skb;
109
110 n_max_channels = phy->sband_2g.sband.n_channels +
111 phy->sband_5g.sband.n_channels +
112 phy->sband_6g.sband.n_channels;
113 len = sizeof(hdr) + n_max_channels * sizeof(channel);
114
115 skb = mt76_mcu_msg_alloc(dev, NULL, len);
116 if (!skb)
117 return -ENOMEM;
118
119 skb_reserve(skb, sizeof(hdr));
120
121 for (i = 0; i < phy->sband_2g.sband.n_channels; i++) {
122 chan = &phy->sband_2g.sband.channels[i];
123 if (chan->flags & IEEE80211_CHAN_DISABLED)
124 continue;
125
126 channel.hw_value = cpu_to_le16(chan->hw_value);
127 channel.flags = cpu_to_le32(chan->flags);
128 channel.pad = 0;
129
130 skb_put_data(skb, &channel, sizeof(channel));
131 n_2ch++;
132 }
133 for (i = 0; i < phy->sband_5g.sband.n_channels; i++) {
134 chan = &phy->sband_5g.sband.channels[i];
135 if (chan->flags & IEEE80211_CHAN_DISABLED)
136 continue;
137
138 channel.hw_value = cpu_to_le16(chan->hw_value);
139 channel.flags = cpu_to_le32(chan->flags);
140 channel.pad = 0;
141
142 skb_put_data(skb, &channel, sizeof(channel));
143 n_5ch++;
144 }
145 for (i = 0; i < phy->sband_6g.sband.n_channels; i++) {
146 chan = &phy->sband_6g.sband.channels[i];
147 if (chan->flags & IEEE80211_CHAN_DISABLED)
148 continue;
149
150 channel.hw_value = cpu_to_le16(chan->hw_value);
151 channel.flags = cpu_to_le32(chan->flags);
152 channel.pad = 0;
153
154 skb_put_data(skb, &channel, sizeof(channel));
155 n_6ch++;
156 }
157
158 BUILD_BUG_ON(sizeof(dev->alpha2) > sizeof(hdr.alpha2));
159 memcpy(hdr.alpha2, dev->alpha2, sizeof(dev->alpha2));
160 hdr.n_2ch = n_2ch;
161 hdr.n_5ch = n_5ch;
162 hdr.n_6ch = n_6ch;
163
164 memcpy(__skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr));
165
166 return mt76_mcu_skb_send_msg(dev, skb, MCU_CE_CMD(SET_CHAN_DOMAIN),
167 false);
168}
169EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_channel_domain);
170
171int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable,
172 bool hdr_trans)
173{
174 struct {
175 u8 enable;
176 u8 band;
177 u8 rsv[2];
178 } __packed req_mac = {
179 .enable = enable,
180 .band = band,
181 };
182
183 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(MAC_INIT_CTRL), &req_mac,
184 sizeof(req_mac), true);
185}
186EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_mac_enable);
187
188int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif)
189{
190 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
191 struct {
192 u8 bss_idx;
193 u8 ps_state; /* 0: device awake
194 * 1: static power save
195 * 2: dynamic power saving
196 */
197 } req = {
198 .bss_idx = mvif->idx,
199 .ps_state = vif->cfg.ps ? 2 : 0,
200 };
201
202 if (vif->type != NL80211_IFTYPE_STATION)
203 return -EOPNOTSUPP;
204
205 return mt76_mcu_send_msg(dev, MCU_CE_CMD(SET_PS_PROFILE),
206 &req, sizeof(req), false);
207}
208EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_vif_ps);
209
210int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band)
211{
212 struct {
213 u8 prot_idx;
214 u8 band;
215 u8 rsv[2];
216 __le32 len_thresh;
217 __le32 pkt_thresh;
218 } __packed req = {
219 .prot_idx = 1,
220 .band = band,
221 .len_thresh = cpu_to_le32(val),
222 .pkt_thresh = cpu_to_le32(0x2),
223 };
224
225 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(PROTECT_CTRL), &req,
226 sizeof(req), true);
227}
228EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_rts_thresh);
229
230void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac,
231 struct ieee80211_vif *vif)
232{
233 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
234 struct mt76_connac_beacon_loss_event *event = priv;
235
236 if (mvif->idx != event->bss_idx)
237 return;
238
239 if (!(vif->driver_flags & IEEE80211_VIF_BEACON_FILTER))
240 return;
241
242 ieee80211_beacon_loss(vif);
243}
244EXPORT_SYMBOL_GPL(mt76_connac_mcu_beacon_loss_iter);
245
246struct tlv *
247mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, int len,
248 void *sta_ntlv, void *sta_wtbl)
249{
250 struct sta_ntlv_hdr *ntlv_hdr = sta_ntlv;
251 struct tlv *sta_hdr = sta_wtbl;
252 struct tlv *ptlv, tlv = {
253 .tag = cpu_to_le16(tag),
254 .len = cpu_to_le16(len),
255 };
256 u16 ntlv;
257
258 ptlv = skb_put(skb, len);
259 memcpy(ptlv, &tlv, sizeof(tlv));
260
261 ntlv = le16_to_cpu(ntlv_hdr->tlv_num);
262 ntlv_hdr->tlv_num = cpu_to_le16(ntlv + 1);
263
264 if (sta_hdr) {
265 len += le16_to_cpu(sta_hdr->len);
266 sta_hdr->len = cpu_to_le16(len);
267 }
268
269 return ptlv;
270}
271EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_nested_tlv);
272
273struct sk_buff *
274__mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif,
275 struct mt76_wcid *wcid, int len)
276{
277 struct sta_req_hdr hdr = {
278 .bss_idx = mvif->idx,
279 .muar_idx = wcid ? mvif->omac_idx : 0,
280 .is_tlv_append = 1,
281 };
282 struct sk_buff *skb;
283
284 mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo,
285 &hdr.wlan_idx_hi);
286 skb = mt76_mcu_msg_alloc(dev, NULL, len);
287 if (!skb)
288 return ERR_PTR(-ENOMEM);
289
290 skb_put_data(skb, &hdr, sizeof(hdr));
291
292 return skb;
293}
294EXPORT_SYMBOL_GPL(__mt76_connac_mcu_alloc_sta_req);
295
296struct wtbl_req_hdr *
297mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid,
298 int cmd, void *sta_wtbl, struct sk_buff **skb)
299{
300 struct tlv *sta_hdr = sta_wtbl;
301 struct wtbl_req_hdr hdr = {
302 .operation = cmd,
303 };
304 struct sk_buff *nskb = *skb;
305
306 mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo,
307 &hdr.wlan_idx_hi);
308 if (!nskb) {
309 nskb = mt76_mcu_msg_alloc(dev, NULL,
310 MT76_CONNAC_WTBL_UPDATE_MAX_SIZE);
311 if (!nskb)
312 return ERR_PTR(-ENOMEM);
313
314 *skb = nskb;
315 }
316
317 if (sta_hdr)
318 le16_add_cpu(&sta_hdr->len, sizeof(hdr));
319
320 return skb_put_data(nskb, &hdr, sizeof(hdr));
321}
322EXPORT_SYMBOL_GPL(mt76_connac_mcu_alloc_wtbl_req);
323
324void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb,
325 struct ieee80211_vif *vif)
326{
327 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
328 u8 omac_idx = mvif->omac_idx;
329 struct bss_info_omac *omac;
330 struct tlv *tlv;
331 u32 type = 0;
332
333 switch (vif->type) {
334 case NL80211_IFTYPE_MONITOR:
335 case NL80211_IFTYPE_MESH_POINT:
336 case NL80211_IFTYPE_AP:
337 if (vif->p2p)
338 type = CONNECTION_P2P_GO;
339 else
340 type = CONNECTION_INFRA_AP;
341 break;
342 case NL80211_IFTYPE_STATION:
343 if (vif->p2p)
344 type = CONNECTION_P2P_GC;
345 else
346 type = CONNECTION_INFRA_STA;
347 break;
348 case NL80211_IFTYPE_ADHOC:
349 type = CONNECTION_IBSS_ADHOC;
350 break;
351 default:
352 WARN_ON(1);
353 break;
354 }
355
356 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_OMAC, sizeof(*omac));
357
358 omac = (struct bss_info_omac *)tlv;
359 omac->conn_type = cpu_to_le32(type);
360 omac->omac_idx = mvif->omac_idx;
361 omac->band_idx = mvif->band_idx;
362 omac->hw_bss_idx = omac_idx > EXT_BSSID_START ? HW_BSSID_0 : omac_idx;
363}
364EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_omac_tlv);
365
366void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb,
367 struct ieee80211_vif *vif,
368 struct ieee80211_sta *sta,
369 bool enable, bool newly)
370{
371 struct sta_rec_basic *basic;
372 struct tlv *tlv;
373 int conn_type;
374
375 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BASIC, sizeof(*basic));
376
377 basic = (struct sta_rec_basic *)tlv;
378 basic->extra_info = cpu_to_le16(EXTRA_INFO_VER);
379
380 if (enable) {
381 if (newly)
382 basic->extra_info |= cpu_to_le16(EXTRA_INFO_NEW);
383 basic->conn_state = CONN_STATE_PORT_SECURE;
384 } else {
385 basic->conn_state = CONN_STATE_DISCONNECT;
386 }
387
388 if (!sta) {
389 basic->conn_type = cpu_to_le32(CONNECTION_INFRA_BC);
390 eth_broadcast_addr(basic->peer_addr);
391 return;
392 }
393
394 switch (vif->type) {
395 case NL80211_IFTYPE_MESH_POINT:
396 case NL80211_IFTYPE_AP:
397 if (vif->p2p)
398 conn_type = CONNECTION_P2P_GC;
399 else
400 conn_type = CONNECTION_INFRA_STA;
401 basic->conn_type = cpu_to_le32(conn_type);
402 basic->aid = cpu_to_le16(sta->aid);
403 break;
404 case NL80211_IFTYPE_STATION:
405 if (vif->p2p)
406 conn_type = CONNECTION_P2P_GO;
407 else
408 conn_type = CONNECTION_INFRA_AP;
409 basic->conn_type = cpu_to_le32(conn_type);
410 basic->aid = cpu_to_le16(vif->cfg.aid);
411 break;
412 case NL80211_IFTYPE_ADHOC:
413 basic->conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC);
414 basic->aid = cpu_to_le16(sta->aid);
415 break;
416 default:
417 WARN_ON(1);
418 break;
419 }
420
421 memcpy(basic->peer_addr, sta->addr, ETH_ALEN);
422 basic->qos = sta->wme;
423}
424EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_basic_tlv);
425
426void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif,
427 struct ieee80211_sta *sta)
428{
429 struct sta_rec_uapsd *uapsd;
430 struct tlv *tlv;
431
432 if (vif->type != NL80211_IFTYPE_AP || !sta->wme)
433 return;
434
435 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_APPS, sizeof(*uapsd));
436 uapsd = (struct sta_rec_uapsd *)tlv;
437
438 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO) {
439 uapsd->dac_map |= BIT(3);
440 uapsd->tac_map |= BIT(3);
441 }
442 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI) {
443 uapsd->dac_map |= BIT(2);
444 uapsd->tac_map |= BIT(2);
445 }
446 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE) {
447 uapsd->dac_map |= BIT(1);
448 uapsd->tac_map |= BIT(1);
449 }
450 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK) {
451 uapsd->dac_map |= BIT(0);
452 uapsd->tac_map |= BIT(0);
453 }
454 uapsd->max_sp = sta->max_sp;
455}
456EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_uapsd);
457
458void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb,
459 struct ieee80211_vif *vif,
460 struct mt76_wcid *wcid,
461 void *sta_wtbl, void *wtbl_tlv)
462{
463 struct wtbl_hdr_trans *htr;
464 struct tlv *tlv;
465
466 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_HDR_TRANS,
467 sizeof(*htr),
468 wtbl_tlv, sta_wtbl);
469 htr = (struct wtbl_hdr_trans *)tlv;
470 htr->no_rx_trans = true;
471
472 if (vif->type == NL80211_IFTYPE_STATION)
473 htr->to_ds = true;
474 else
475 htr->from_ds = true;
476
477 if (!wcid)
478 return;
479
480 htr->no_rx_trans = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags);
481 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) {
482 htr->to_ds = true;
483 htr->from_ds = true;
484 }
485}
486EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_hdr_trans_tlv);
487
488int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev,
489 struct ieee80211_vif *vif,
490 struct mt76_wcid *wcid, int cmd)
491{
492 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
493 struct wtbl_req_hdr *wtbl_hdr;
494 struct tlv *sta_wtbl;
495 struct sk_buff *skb;
496
497 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
498 if (IS_ERR(skb))
499 return PTR_ERR(skb);
500
501 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
502 sizeof(struct tlv));
503
504 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET,
505 sta_wtbl, &skb);
506 if (IS_ERR(wtbl_hdr))
507 return PTR_ERR(wtbl_hdr);
508
509 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, sta_wtbl, wtbl_hdr);
510
511 return mt76_mcu_skb_send_msg(dev, skb, cmd, true);
512}
513EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_update_hdr_trans);
514
515int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev,
516 struct ieee80211_vif *vif,
517 struct ieee80211_sta *sta)
518{
519 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
520 struct wtbl_req_hdr *wtbl_hdr;
521 struct sk_buff *skb = NULL;
522
523 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET, NULL,
524 &skb);
525 if (IS_ERR(wtbl_hdr))
526 return PTR_ERR(wtbl_hdr);
527
528 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, NULL, wtbl_hdr);
529
530 return mt76_mcu_skb_send_msg(dev, skb, MCU_EXT_CMD(WTBL_UPDATE), true);
531}
532EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_update_hdr_trans);
533
534void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev,
535 struct sk_buff *skb,
536 struct ieee80211_vif *vif,
537 struct ieee80211_sta *sta,
538 void *sta_wtbl, void *wtbl_tlv)
539{
540 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
541 struct wtbl_generic *generic;
542 struct wtbl_rx *rx;
543 struct wtbl_spe *spe;
544 struct tlv *tlv;
545
546 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_GENERIC,
547 sizeof(*generic),
548 wtbl_tlv, sta_wtbl);
549
550 generic = (struct wtbl_generic *)tlv;
551
552 if (sta) {
553 if (vif->type == NL80211_IFTYPE_STATION)
554 generic->partial_aid = cpu_to_le16(vif->cfg.aid);
555 else
556 generic->partial_aid = cpu_to_le16(sta->aid);
557 memcpy(generic->peer_addr, sta->addr, ETH_ALEN);
558 generic->muar_idx = mvif->omac_idx;
559 generic->qos = sta->wme;
560 } else {
561 if (!is_connac_v1(dev) && vif->type == NL80211_IFTYPE_STATION)
562 memcpy(generic->peer_addr, vif->bss_conf.bssid,
563 ETH_ALEN);
564 else
565 eth_broadcast_addr(generic->peer_addr);
566
567 generic->muar_idx = 0xe;
568 }
569
570 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_RX, sizeof(*rx),
571 wtbl_tlv, sta_wtbl);
572
573 rx = (struct wtbl_rx *)tlv;
574 rx->rca1 = sta ? vif->type != NL80211_IFTYPE_AP : 1;
575 rx->rca2 = 1;
576 rx->rv = 1;
577
578 if (!is_connac_v1(dev))
579 return;
580
581 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SPE, sizeof(*spe),
582 wtbl_tlv, sta_wtbl);
583 spe = (struct wtbl_spe *)tlv;
584 spe->spe_idx = 24;
585}
586EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_generic_tlv);
587
588static void
589mt76_connac_mcu_sta_amsdu_tlv(struct sk_buff *skb, struct ieee80211_sta *sta,
590 struct ieee80211_vif *vif)
591{
592 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
593 struct sta_rec_amsdu *amsdu;
594 struct tlv *tlv;
595
596 if (vif->type != NL80211_IFTYPE_AP &&
597 vif->type != NL80211_IFTYPE_STATION)
598 return;
599
600 if (!sta->deflink.agg.max_amsdu_len)
601 return;
602
603 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu));
604 amsdu = (struct sta_rec_amsdu *)tlv;
605 amsdu->max_amsdu_num = 8;
606 amsdu->amsdu_en = true;
607 amsdu->max_mpdu_size = sta->deflink.agg.max_amsdu_len >=
608 IEEE80211_MAX_MPDU_LEN_VHT_7991;
609
610 wcid->amsdu = true;
611}
612
613#define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p)
614#define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m)
615static void
616mt76_connac_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)
617{
618 struct ieee80211_sta_he_cap *he_cap = &sta->deflink.he_cap;
619 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
620 struct sta_rec_he *he;
621 struct tlv *tlv;
622 u32 cap = 0;
623
624 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he));
625
626 he = (struct sta_rec_he *)tlv;
627
628 if (elem->mac_cap_info[0] & IEEE80211_HE_MAC_CAP0_HTC_HE)
629 cap |= STA_REC_HE_CAP_HTC;
630
631 if (elem->mac_cap_info[2] & IEEE80211_HE_MAC_CAP2_BSR)
632 cap |= STA_REC_HE_CAP_BSR;
633
634 if (elem->mac_cap_info[3] & IEEE80211_HE_MAC_CAP3_OMI_CONTROL)
635 cap |= STA_REC_HE_CAP_OM;
636
637 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU)
638 cap |= STA_REC_HE_CAP_AMSDU_IN_AMPDU;
639
640 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_BQR)
641 cap |= STA_REC_HE_CAP_BQR;
642
643 if (elem->phy_cap_info[0] &
644 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G |
645 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G))
646 cap |= STA_REC_HE_CAP_BW20_RU242_SUPPORT;
647
648 if (elem->phy_cap_info[1] &
649 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD)
650 cap |= STA_REC_HE_CAP_LDPC;
651
652 if (elem->phy_cap_info[1] &
653 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US)
654 cap |= STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI;
655
656 if (elem->phy_cap_info[2] &
657 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US)
658 cap |= STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI;
659
660 if (elem->phy_cap_info[2] &
661 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ)
662 cap |= STA_REC_HE_CAP_LE_EQ_80M_TX_STBC;
663
664 if (elem->phy_cap_info[2] &
665 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ)
666 cap |= STA_REC_HE_CAP_LE_EQ_80M_RX_STBC;
667
668 if (elem->phy_cap_info[6] &
669 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE)
670 cap |= STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE;
671
672 if (elem->phy_cap_info[7] &
673 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI)
674 cap |= STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI;
675
676 if (elem->phy_cap_info[7] &
677 IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ)
678 cap |= STA_REC_HE_CAP_GT_80M_TX_STBC;
679
680 if (elem->phy_cap_info[7] &
681 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ)
682 cap |= STA_REC_HE_CAP_GT_80M_RX_STBC;
683
684 if (elem->phy_cap_info[8] &
685 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI)
686 cap |= STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI;
687
688 if (elem->phy_cap_info[8] &
689 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI)
690 cap |= STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI;
691
692 if (elem->phy_cap_info[9] &
693 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK)
694 cap |= STA_REC_HE_CAP_TRIG_CQI_FK;
695
696 if (elem->phy_cap_info[9] &
697 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU)
698 cap |= STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242;
699
700 if (elem->phy_cap_info[9] &
701 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU)
702 cap |= STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242;
703
704 he->he_cap = cpu_to_le32(cap);
705
706 switch (sta->deflink.bandwidth) {
707 case IEEE80211_STA_RX_BW_160:
708 if (elem->phy_cap_info[0] &
709 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
710 he->max_nss_mcs[CMD_HE_MCS_BW8080] =
711 he_cap->he_mcs_nss_supp.rx_mcs_80p80;
712
713 he->max_nss_mcs[CMD_HE_MCS_BW160] =
714 he_cap->he_mcs_nss_supp.rx_mcs_160;
715 fallthrough;
716 default:
717 he->max_nss_mcs[CMD_HE_MCS_BW80] =
718 he_cap->he_mcs_nss_supp.rx_mcs_80;
719 break;
720 }
721
722 he->t_frame_dur =
723 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);
724 he->max_ampdu_exp =
725 HE_MAC(CAP3_MAX_AMPDU_LEN_EXP_MASK, elem->mac_cap_info[3]);
726
727 he->bw_set =
728 HE_PHY(CAP0_CHANNEL_WIDTH_SET_MASK, elem->phy_cap_info[0]);
729 he->device_class =
730 HE_PHY(CAP1_DEVICE_CLASS_A, elem->phy_cap_info[1]);
731 he->punc_pream_rx =
732 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);
733
734 he->dcm_tx_mode =
735 HE_PHY(CAP3_DCM_MAX_CONST_TX_MASK, elem->phy_cap_info[3]);
736 he->dcm_tx_max_nss =
737 HE_PHY(CAP3_DCM_MAX_TX_NSS_2, elem->phy_cap_info[3]);
738 he->dcm_rx_mode =
739 HE_PHY(CAP3_DCM_MAX_CONST_RX_MASK, elem->phy_cap_info[3]);
740 he->dcm_rx_max_nss =
741 HE_PHY(CAP3_DCM_MAX_RX_NSS_2, elem->phy_cap_info[3]);
742 he->dcm_rx_max_nss =
743 HE_PHY(CAP8_DCM_MAX_RU_MASK, elem->phy_cap_info[8]);
744
745 he->pkt_ext = 2;
746}
747
748static void
749mt76_connac_mcu_sta_he_tlv_v2(struct sk_buff *skb, struct ieee80211_sta *sta)
750{
751 struct ieee80211_sta_he_cap *he_cap = &sta->deflink.he_cap;
752 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
753 struct sta_rec_he_v2 *he;
754 struct tlv *tlv;
755
756 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he));
757
758 he = (struct sta_rec_he_v2 *)tlv;
759 memcpy(he->he_phy_cap, elem->phy_cap_info, sizeof(he->he_phy_cap));
760 memcpy(he->he_mac_cap, elem->mac_cap_info, sizeof(he->he_mac_cap));
761
762 switch (sta->deflink.bandwidth) {
763 case IEEE80211_STA_RX_BW_160:
764 if (elem->phy_cap_info[0] &
765 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)
766 he->max_nss_mcs[CMD_HE_MCS_BW8080] =
767 he_cap->he_mcs_nss_supp.rx_mcs_80p80;
768
769 he->max_nss_mcs[CMD_HE_MCS_BW160] =
770 he_cap->he_mcs_nss_supp.rx_mcs_160;
771 fallthrough;
772 default:
773 he->max_nss_mcs[CMD_HE_MCS_BW80] =
774 he_cap->he_mcs_nss_supp.rx_mcs_80;
775 break;
776 }
777
778 he->pkt_ext = IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US;
779}
780
781static u8
782mt76_connac_get_phy_mode_v2(struct mt76_phy *mphy, struct ieee80211_vif *vif,
783 enum nl80211_band band, struct ieee80211_sta *sta)
784{
785 struct ieee80211_sta_ht_cap *ht_cap;
786 struct ieee80211_sta_vht_cap *vht_cap;
787 const struct ieee80211_sta_he_cap *he_cap;
788 u8 mode = 0;
789
790 if (sta) {
791 ht_cap = &sta->deflink.ht_cap;
792 vht_cap = &sta->deflink.vht_cap;
793 he_cap = &sta->deflink.he_cap;
794 } else {
795 struct ieee80211_supported_band *sband;
796
797 sband = mphy->hw->wiphy->bands[band];
798 ht_cap = &sband->ht_cap;
799 vht_cap = &sband->vht_cap;
800 he_cap = ieee80211_get_he_iftype_cap(sband, vif->type);
801 }
802
803 if (band == NL80211_BAND_2GHZ) {
804 mode |= PHY_TYPE_BIT_HR_DSSS | PHY_TYPE_BIT_ERP;
805
806 if (ht_cap->ht_supported)
807 mode |= PHY_TYPE_BIT_HT;
808
809 if (he_cap && he_cap->has_he)
810 mode |= PHY_TYPE_BIT_HE;
811 } else if (band == NL80211_BAND_5GHZ || band == NL80211_BAND_6GHZ) {
812 mode |= PHY_TYPE_BIT_OFDM;
813
814 if (ht_cap->ht_supported)
815 mode |= PHY_TYPE_BIT_HT;
816
817 if (vht_cap->vht_supported)
818 mode |= PHY_TYPE_BIT_VHT;
819
820 if (he_cap && he_cap->has_he)
821 mode |= PHY_TYPE_BIT_HE;
822 }
823
824 return mode;
825}
826
827void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb,
828 struct ieee80211_sta *sta,
829 struct ieee80211_vif *vif,
830 u8 rcpi, u8 sta_state)
831{
832 struct cfg80211_chan_def *chandef = &mphy->chandef;
833 enum nl80211_band band = chandef->chan->band;
834 struct mt76_dev *dev = mphy->dev;
835 struct sta_rec_ra_info *ra_info;
836 struct sta_rec_state *state;
837 struct sta_rec_phy *phy;
838 struct tlv *tlv;
839 u16 supp_rates;
840
841 /* starec ht */
842 if (sta->deflink.ht_cap.ht_supported) {
843 struct sta_rec_ht *ht;
844
845 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht));
846 ht = (struct sta_rec_ht *)tlv;
847 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap);
848 }
849
850 /* starec vht */
851 if (sta->deflink.vht_cap.vht_supported) {
852 struct sta_rec_vht *vht;
853 int len;
854
855 len = is_mt7921(dev) ? sizeof(*vht) : sizeof(*vht) - 4;
856 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, len);
857 vht = (struct sta_rec_vht *)tlv;
858 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap);
859 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map;
860 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map;
861 }
862
863 /* starec uapsd */
864 mt76_connac_mcu_sta_uapsd(skb, vif, sta);
865
866 if (!is_mt7921(dev))
867 return;
868
869 if (sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he)
870 mt76_connac_mcu_sta_amsdu_tlv(skb, sta, vif);
871
872 /* starec he */
873 if (sta->deflink.he_cap.has_he) {
874 mt76_connac_mcu_sta_he_tlv(skb, sta);
875 mt76_connac_mcu_sta_he_tlv_v2(skb, sta);
876 if (band == NL80211_BAND_6GHZ &&
877 sta_state == MT76_STA_INFO_STATE_ASSOC) {
878 struct sta_rec_he_6g_capa *he_6g_capa;
879
880 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G,
881 sizeof(*he_6g_capa));
882 he_6g_capa = (struct sta_rec_he_6g_capa *)tlv;
883 he_6g_capa->capa = sta->deflink.he_6ghz_capa.capa;
884 }
885 }
886
887 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PHY, sizeof(*phy));
888 phy = (struct sta_rec_phy *)tlv;
889 phy->phy_type = mt76_connac_get_phy_mode_v2(mphy, vif, band, sta);
890 phy->basic_rate = cpu_to_le16((u16)vif->bss_conf.basic_rates);
891 phy->rcpi = rcpi;
892 phy->ampdu = FIELD_PREP(IEEE80211_HT_AMPDU_PARM_FACTOR,
893 sta->deflink.ht_cap.ampdu_factor) |
894 FIELD_PREP(IEEE80211_HT_AMPDU_PARM_DENSITY,
895 sta->deflink.ht_cap.ampdu_density);
896
897 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra_info));
898 ra_info = (struct sta_rec_ra_info *)tlv;
899
900 supp_rates = sta->deflink.supp_rates[band];
901 if (band == NL80211_BAND_2GHZ)
902 supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates >> 4) |
903 FIELD_PREP(RA_LEGACY_CCK, supp_rates & 0xf);
904 else
905 supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates);
906
907 ra_info->legacy = cpu_to_le16(supp_rates);
908
909 if (sta->deflink.ht_cap.ht_supported)
910 memcpy(ra_info->rx_mcs_bitmask,
911 sta->deflink.ht_cap.mcs.rx_mask,
912 HT_MCS_MASK_NUM);
913
914 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_STATE, sizeof(*state));
915 state = (struct sta_rec_state *)tlv;
916 state->state = sta_state;
917
918 if (sta->deflink.vht_cap.vht_supported) {
919 state->vht_opmode = sta->deflink.bandwidth;
920 state->vht_opmode |= (sta->deflink.rx_nss - 1) <<
921 IEEE80211_OPMODE_NOTIF_RX_NSS_SHIFT;
922 }
923}
924EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_tlv);
925
926void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb,
927 struct ieee80211_sta *sta,
928 void *sta_wtbl, void *wtbl_tlv)
929{
930 struct wtbl_smps *smps;
931 struct tlv *tlv;
932
933 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SMPS, sizeof(*smps),
934 wtbl_tlv, sta_wtbl);
935 smps = (struct wtbl_smps *)tlv;
936 smps->smps = (sta->deflink.smps_mode == IEEE80211_SMPS_DYNAMIC);
937}
938EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_smps_tlv);
939
940void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb,
941 struct ieee80211_sta *sta, void *sta_wtbl,
942 void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc)
943{
944 struct wtbl_ht *ht = NULL;
945 struct tlv *tlv;
946 u32 flags = 0;
947
948 if (sta->deflink.ht_cap.ht_supported || sta->deflink.he_6ghz_capa.capa) {
949 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_HT, sizeof(*ht),
950 wtbl_tlv, sta_wtbl);
951 ht = (struct wtbl_ht *)tlv;
952 ht->ldpc = ht_ldpc &&
953 !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING);
954
955 if (sta->deflink.ht_cap.ht_supported) {
956 ht->af = sta->deflink.ht_cap.ampdu_factor;
957 ht->mm = sta->deflink.ht_cap.ampdu_density;
958 } else {
959 ht->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
960 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);
961 ht->mm = le16_get_bits(sta->deflink.he_6ghz_capa.capa,
962 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START);
963 }
964
965 ht->ht = true;
966 }
967
968 if (sta->deflink.vht_cap.vht_supported || sta->deflink.he_6ghz_capa.capa) {
969 struct wtbl_vht *vht;
970 u8 af;
971
972 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_VHT,
973 sizeof(*vht), wtbl_tlv,
974 sta_wtbl);
975 vht = (struct wtbl_vht *)tlv;
976 vht->ldpc = vht_ldpc &&
977 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC);
978 vht->vht = true;
979
980 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK,
981 sta->deflink.vht_cap.cap);
982 if (ht)
983 ht->af = max(ht->af, af);
984 }
985
986 mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_tlv);
987
988 if (is_connac_v1(dev) && sta->deflink.ht_cap.ht_supported) {
989 /* sgi */
990 u32 msk = MT_WTBL_W5_SHORT_GI_20 | MT_WTBL_W5_SHORT_GI_40 |
991 MT_WTBL_W5_SHORT_GI_80 | MT_WTBL_W5_SHORT_GI_160;
992 struct wtbl_raw *raw;
993
994 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_RAW_DATA,
995 sizeof(*raw), wtbl_tlv,
996 sta_wtbl);
997
998 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20)
999 flags |= MT_WTBL_W5_SHORT_GI_20;
1000 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
1001 flags |= MT_WTBL_W5_SHORT_GI_40;
1002
1003 if (sta->deflink.vht_cap.vht_supported) {
1004 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
1005 flags |= MT_WTBL_W5_SHORT_GI_80;
1006 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160)
1007 flags |= MT_WTBL_W5_SHORT_GI_160;
1008 }
1009 raw = (struct wtbl_raw *)tlv;
1010 raw->val = cpu_to_le32(flags);
1011 raw->msk = cpu_to_le32(~msk);
1012 raw->wtbl_idx = 1;
1013 raw->dw = 5;
1014 }
1015}
1016EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_ht_tlv);
1017
1018int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy,
1019 struct mt76_sta_cmd_info *info)
1020{
1021 struct mt76_vif *mvif = (struct mt76_vif *)info->vif->drv_priv;
1022 struct mt76_dev *dev = phy->dev;
1023 struct wtbl_req_hdr *wtbl_hdr;
1024 struct tlv *sta_wtbl;
1025 struct sk_buff *skb;
1026
1027 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, info->wcid);
1028 if (IS_ERR(skb))
1029 return PTR_ERR(skb);
1030
1031 if (info->sta || !info->offload_fw)
1032 mt76_connac_mcu_sta_basic_tlv(skb, info->vif, info->sta,
1033 info->enable, info->newly);
1034 if (info->sta && info->enable)
1035 mt76_connac_mcu_sta_tlv(phy, skb, info->sta,
1036 info->vif, info->rcpi,
1037 info->state);
1038
1039 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
1040 sizeof(struct tlv));
1041
1042 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, info->wcid,
1043 WTBL_RESET_AND_SET,
1044 sta_wtbl, &skb);
1045 if (IS_ERR(wtbl_hdr))
1046 return PTR_ERR(wtbl_hdr);
1047
1048 if (info->enable) {
1049 mt76_connac_mcu_wtbl_generic_tlv(dev, skb, info->vif,
1050 info->sta, sta_wtbl,
1051 wtbl_hdr);
1052 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, info->vif, info->wcid,
1053 sta_wtbl, wtbl_hdr);
1054 if (info->sta)
1055 mt76_connac_mcu_wtbl_ht_tlv(dev, skb, info->sta,
1056 sta_wtbl, wtbl_hdr,
1057 true, true);
1058 }
1059
1060 return mt76_mcu_skb_send_msg(dev, skb, info->cmd, true);
1061}
1062EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_cmd);
1063
1064void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb,
1065 struct ieee80211_ampdu_params *params,
1066 bool enable, bool tx, void *sta_wtbl,
1067 void *wtbl_tlv)
1068{
1069 struct wtbl_ba *ba;
1070 struct tlv *tlv;
1071
1072 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_BA, sizeof(*ba),
1073 wtbl_tlv, sta_wtbl);
1074
1075 ba = (struct wtbl_ba *)tlv;
1076 ba->tid = params->tid;
1077
1078 if (tx) {
1079 ba->ba_type = MT_BA_TYPE_ORIGINATOR;
1080 ba->sn = enable ? cpu_to_le16(params->ssn) : 0;
1081 ba->ba_winsize = enable ? cpu_to_le16(params->buf_size) : 0;
1082 ba->ba_en = enable;
1083 } else {
1084 memcpy(ba->peer_addr, params->sta->addr, ETH_ALEN);
1085 ba->ba_type = MT_BA_TYPE_RECIPIENT;
1086 ba->rst_ba_tid = params->tid;
1087 ba->rst_ba_sel = RST_BA_MAC_TID_MATCH;
1088 ba->rst_ba_sb = 1;
1089 }
1090
1091 if (!is_connac_v1(dev)) {
1092 ba->ba_winsize = enable ? cpu_to_le16(params->buf_size) : 0;
1093 return;
1094 }
1095
1096 if (enable && tx) {
1097 static const u8 ba_range[] = { 4, 8, 12, 24, 36, 48, 54, 64 };
1098 int i;
1099
1100 for (i = 7; i > 0; i--) {
1101 if (params->buf_size >= ba_range[i])
1102 break;
1103 }
1104 ba->ba_winsize_idx = i;
1105 }
1106}
1107EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_ba_tlv);
1108
1109int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy,
1110 struct ieee80211_vif *vif,
1111 struct mt76_wcid *wcid,
1112 bool enable)
1113{
1114 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1115 struct mt76_dev *dev = phy->dev;
1116 struct {
1117 struct {
1118 u8 omac_idx;
1119 u8 band_idx;
1120 __le16 pad;
1121 } __packed hdr;
1122 struct req_tlv {
1123 __le16 tag;
1124 __le16 len;
1125 u8 active;
1126 u8 pad;
1127 u8 omac_addr[ETH_ALEN];
1128 } __packed tlv;
1129 } dev_req = {
1130 .hdr = {
1131 .omac_idx = mvif->omac_idx,
1132 .band_idx = mvif->band_idx,
1133 },
1134 .tlv = {
1135 .tag = cpu_to_le16(DEV_INFO_ACTIVE),
1136 .len = cpu_to_le16(sizeof(struct req_tlv)),
1137 .active = enable,
1138 },
1139 };
1140 struct {
1141 struct {
1142 u8 bss_idx;
1143 u8 pad[3];
1144 } __packed hdr;
1145 struct mt76_connac_bss_basic_tlv basic;
1146 } basic_req = {
1147 .hdr = {
1148 .bss_idx = mvif->idx,
1149 },
1150 .basic = {
1151 .tag = cpu_to_le16(UNI_BSS_INFO_BASIC),
1152 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_basic_tlv)),
1153 .omac_idx = mvif->omac_idx,
1154 .band_idx = mvif->band_idx,
1155 .wmm_idx = mvif->wmm_idx,
1156 .active = enable,
1157 .bmc_tx_wlan_idx = cpu_to_le16(wcid->idx),
1158 .sta_idx = cpu_to_le16(wcid->idx),
1159 .conn_state = 1,
1160 },
1161 };
1162 int err, idx, cmd, len;
1163 void *data;
1164
1165 switch (vif->type) {
1166 case NL80211_IFTYPE_MESH_POINT:
1167 case NL80211_IFTYPE_MONITOR:
1168 case NL80211_IFTYPE_AP:
1169 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_AP);
1170 break;
1171 case NL80211_IFTYPE_STATION:
1172 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_STA);
1173 break;
1174 case NL80211_IFTYPE_ADHOC:
1175 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC);
1176 break;
1177 default:
1178 WARN_ON(1);
1179 break;
1180 }
1181
1182 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx;
1183 basic_req.basic.hw_bss_idx = idx;
1184
1185 memcpy(dev_req.tlv.omac_addr, vif->addr, ETH_ALEN);
1186
1187 cmd = enable ? MCU_UNI_CMD(DEV_INFO_UPDATE) : MCU_UNI_CMD(BSS_INFO_UPDATE);
1188 data = enable ? (void *)&dev_req : (void *)&basic_req;
1189 len = enable ? sizeof(dev_req) : sizeof(basic_req);
1190
1191 err = mt76_mcu_send_msg(dev, cmd, data, len, true);
1192 if (err < 0)
1193 return err;
1194
1195 cmd = enable ? MCU_UNI_CMD(BSS_INFO_UPDATE) : MCU_UNI_CMD(DEV_INFO_UPDATE);
1196 data = enable ? (void *)&basic_req : (void *)&dev_req;
1197 len = enable ? sizeof(basic_req) : sizeof(dev_req);
1198
1199 return mt76_mcu_send_msg(dev, cmd, data, len, true);
1200}
1201EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_add_dev);
1202
1203void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb,
1204 struct ieee80211_ampdu_params *params,
1205 bool enable, bool tx)
1206{
1207 struct sta_rec_ba *ba;
1208 struct tlv *tlv;
1209
1210 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba));
1211
1212 ba = (struct sta_rec_ba *)tlv;
1213 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT;
1214 ba->winsize = cpu_to_le16(params->buf_size);
1215 ba->ssn = cpu_to_le16(params->ssn);
1216 ba->ba_en = enable << params->tid;
1217 ba->amsdu = params->amsdu;
1218 ba->tid = params->tid;
1219}
1220EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba_tlv);
1221
1222int mt76_connac_mcu_sta_wed_update(struct mt76_dev *dev, struct sk_buff *skb)
1223{
1224 if (!mtk_wed_device_active(&dev->mmio.wed))
1225 return 0;
1226
1227 return mtk_wed_device_update_msg(&dev->mmio.wed, WED_WO_STA_REC,
1228 skb->data, skb->len);
1229}
1230EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_wed_update);
1231
1232int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif,
1233 struct ieee80211_ampdu_params *params,
1234 int cmd, bool enable, bool tx)
1235{
1236 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv;
1237 struct wtbl_req_hdr *wtbl_hdr;
1238 struct tlv *sta_wtbl;
1239 struct sk_buff *skb;
1240 int ret;
1241
1242 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
1243 if (IS_ERR(skb))
1244 return PTR_ERR(skb);
1245
1246 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,
1247 sizeof(struct tlv));
1248
1249 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET,
1250 sta_wtbl, &skb);
1251 if (IS_ERR(wtbl_hdr))
1252 return PTR_ERR(wtbl_hdr);
1253
1254 mt76_connac_mcu_wtbl_ba_tlv(dev, skb, params, enable, tx, sta_wtbl,
1255 wtbl_hdr);
1256
1257 ret = mt76_connac_mcu_sta_wed_update(dev, skb);
1258 if (ret)
1259 return ret;
1260
1261 ret = mt76_mcu_skb_send_msg(dev, skb, cmd, true);
1262 if (ret)
1263 return ret;
1264
1265 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
1266 if (IS_ERR(skb))
1267 return PTR_ERR(skb);
1268
1269 mt76_connac_mcu_sta_ba_tlv(skb, params, enable, tx);
1270
1271 ret = mt76_connac_mcu_sta_wed_update(dev, skb);
1272 if (ret)
1273 return ret;
1274
1275 return mt76_mcu_skb_send_msg(dev, skb, cmd, true);
1276}
1277EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba);
1278
1279u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif,
1280 enum nl80211_band band, struct ieee80211_sta *sta)
1281{
1282 struct mt76_dev *dev = phy->dev;
1283 const struct ieee80211_sta_he_cap *he_cap;
1284 struct ieee80211_sta_vht_cap *vht_cap;
1285 struct ieee80211_sta_ht_cap *ht_cap;
1286 u8 mode = 0;
1287
1288 if (is_connac_v1(dev))
1289 return 0x38;
1290
1291 if (sta) {
1292 ht_cap = &sta->deflink.ht_cap;
1293 vht_cap = &sta->deflink.vht_cap;
1294 he_cap = &sta->deflink.he_cap;
1295 } else {
1296 struct ieee80211_supported_band *sband;
1297
1298 sband = phy->hw->wiphy->bands[band];
1299 ht_cap = &sband->ht_cap;
1300 vht_cap = &sband->vht_cap;
1301 he_cap = ieee80211_get_he_iftype_cap(sband, vif->type);
1302 }
1303
1304 if (band == NL80211_BAND_2GHZ) {
1305 mode |= PHY_MODE_B | PHY_MODE_G;
1306
1307 if (ht_cap->ht_supported)
1308 mode |= PHY_MODE_GN;
1309
1310 if (he_cap && he_cap->has_he)
1311 mode |= PHY_MODE_AX_24G;
1312 } else if (band == NL80211_BAND_5GHZ) {
1313 mode |= PHY_MODE_A;
1314
1315 if (ht_cap->ht_supported)
1316 mode |= PHY_MODE_AN;
1317
1318 if (vht_cap->vht_supported)
1319 mode |= PHY_MODE_AC;
1320
1321 if (he_cap && he_cap->has_he)
1322 mode |= PHY_MODE_AX_5G;
1323 } else if (band == NL80211_BAND_6GHZ) {
1324 mode |= PHY_MODE_A | PHY_MODE_AN |
1325 PHY_MODE_AC | PHY_MODE_AX_5G;
1326 }
1327
1328 return mode;
1329}
1330EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode);
1331
1332const struct ieee80211_sta_he_cap *
1333mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif)
1334{
1335 enum nl80211_band band = phy->chandef.chan->band;
1336 struct ieee80211_supported_band *sband;
1337
1338 sband = phy->hw->wiphy->bands[band];
1339
1340 return ieee80211_get_he_iftype_cap(sband, vif->type);
1341}
1342EXPORT_SYMBOL_GPL(mt76_connac_get_he_phy_cap);
1343
1344#define DEFAULT_HE_PE_DURATION 4
1345#define DEFAULT_HE_DURATION_RTS_THRES 1023
1346static void
1347mt76_connac_mcu_uni_bss_he_tlv(struct mt76_phy *phy, struct ieee80211_vif *vif,
1348 struct tlv *tlv)
1349{
1350 const struct ieee80211_sta_he_cap *cap;
1351 struct bss_info_uni_he *he;
1352
1353 cap = mt76_connac_get_he_phy_cap(phy, vif);
1354
1355 he = (struct bss_info_uni_he *)tlv;
1356 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext;
1357 if (!he->he_pe_duration)
1358 he->he_pe_duration = DEFAULT_HE_PE_DURATION;
1359
1360 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th);
1361 if (!he->he_rts_thres)
1362 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES);
1363
1364 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80;
1365 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160;
1366 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80;
1367}
1368
1369int mt76_connac_mcu_uni_set_chctx(struct mt76_phy *phy, struct mt76_vif *mvif,
1370 struct ieee80211_chanctx_conf *ctx)
1371{
1372 struct cfg80211_chan_def *chandef = ctx ? &ctx->def : &phy->chandef;
1373 int freq1 = chandef->center_freq1, freq2 = chandef->center_freq2;
1374 enum nl80211_band band = chandef->chan->band;
1375 struct mt76_dev *mdev = phy->dev;
1376 struct {
1377 struct {
1378 u8 bss_idx;
1379 u8 pad[3];
1380 } __packed hdr;
1381 struct rlm_tlv {
1382 __le16 tag;
1383 __le16 len;
1384 u8 control_channel;
1385 u8 center_chan;
1386 u8 center_chan2;
1387 u8 bw;
1388 u8 tx_streams;
1389 u8 rx_streams;
1390 u8 short_st;
1391 u8 ht_op_info;
1392 u8 sco;
1393 u8 band;
1394 u8 pad[2];
1395 } __packed rlm;
1396 } __packed rlm_req = {
1397 .hdr = {
1398 .bss_idx = mvif->idx,
1399 },
1400 .rlm = {
1401 .tag = cpu_to_le16(UNI_BSS_INFO_RLM),
1402 .len = cpu_to_le16(sizeof(struct rlm_tlv)),
1403 .control_channel = chandef->chan->hw_value,
1404 .center_chan = ieee80211_frequency_to_channel(freq1),
1405 .center_chan2 = ieee80211_frequency_to_channel(freq2),
1406 .tx_streams = hweight8(phy->antenna_mask),
1407 .ht_op_info = 4, /* set HT 40M allowed */
1408 .rx_streams = phy->chainmask,
1409 .short_st = true,
1410 .band = band,
1411 },
1412 };
1413
1414 switch (chandef->width) {
1415 case NL80211_CHAN_WIDTH_40:
1416 rlm_req.rlm.bw = CMD_CBW_40MHZ;
1417 break;
1418 case NL80211_CHAN_WIDTH_80:
1419 rlm_req.rlm.bw = CMD_CBW_80MHZ;
1420 break;
1421 case NL80211_CHAN_WIDTH_80P80:
1422 rlm_req.rlm.bw = CMD_CBW_8080MHZ;
1423 break;
1424 case NL80211_CHAN_WIDTH_160:
1425 rlm_req.rlm.bw = CMD_CBW_160MHZ;
1426 break;
1427 case NL80211_CHAN_WIDTH_5:
1428 rlm_req.rlm.bw = CMD_CBW_5MHZ;
1429 break;
1430 case NL80211_CHAN_WIDTH_10:
1431 rlm_req.rlm.bw = CMD_CBW_10MHZ;
1432 break;
1433 case NL80211_CHAN_WIDTH_20_NOHT:
1434 case NL80211_CHAN_WIDTH_20:
1435 default:
1436 rlm_req.rlm.bw = CMD_CBW_20MHZ;
1437 rlm_req.rlm.ht_op_info = 0;
1438 break;
1439 }
1440
1441 if (rlm_req.rlm.control_channel < rlm_req.rlm.center_chan)
1442 rlm_req.rlm.sco = 1; /* SCA */
1443 else if (rlm_req.rlm.control_channel > rlm_req.rlm.center_chan)
1444 rlm_req.rlm.sco = 3; /* SCB */
1445
1446 return mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), &rlm_req,
1447 sizeof(rlm_req), true);
1448}
1449EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_set_chctx);
1450
1451int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy,
1452 struct ieee80211_vif *vif,
1453 struct mt76_wcid *wcid,
1454 bool enable,
1455 struct ieee80211_chanctx_conf *ctx)
1456{
1457 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1458 struct cfg80211_chan_def *chandef = ctx ? &ctx->def : &phy->chandef;
1459 enum nl80211_band band = chandef->chan->band;
1460 struct mt76_dev *mdev = phy->dev;
1461 struct {
1462 struct {
1463 u8 bss_idx;
1464 u8 pad[3];
1465 } __packed hdr;
1466 struct mt76_connac_bss_basic_tlv basic;
1467 struct mt76_connac_bss_qos_tlv qos;
1468 } basic_req = {
1469 .hdr = {
1470 .bss_idx = mvif->idx,
1471 },
1472 .basic = {
1473 .tag = cpu_to_le16(UNI_BSS_INFO_BASIC),
1474 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_basic_tlv)),
1475 .bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int),
1476 .dtim_period = vif->bss_conf.dtim_period,
1477 .omac_idx = mvif->omac_idx,
1478 .band_idx = mvif->band_idx,
1479 .wmm_idx = mvif->wmm_idx,
1480 .active = true, /* keep bss deactivated */
1481 .phymode = mt76_connac_get_phy_mode(phy, vif, band, NULL),
1482 },
1483 .qos = {
1484 .tag = cpu_to_le16(UNI_BSS_INFO_QBSS),
1485 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_qos_tlv)),
1486 .qos = vif->bss_conf.qos,
1487 },
1488 };
1489 int err, conn_type;
1490 u8 idx, basic_phy;
1491
1492 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx;
1493 basic_req.basic.hw_bss_idx = idx;
1494 if (band == NL80211_BAND_6GHZ)
1495 basic_req.basic.phymode_ext = PHY_MODE_AX_6G;
1496
1497 basic_phy = mt76_connac_get_phy_mode_v2(phy, vif, band, NULL);
1498 basic_req.basic.nonht_basic_phy = cpu_to_le16(basic_phy);
1499
1500 switch (vif->type) {
1501 case NL80211_IFTYPE_MESH_POINT:
1502 case NL80211_IFTYPE_AP:
1503 if (vif->p2p)
1504 conn_type = CONNECTION_P2P_GO;
1505 else
1506 conn_type = CONNECTION_INFRA_AP;
1507 basic_req.basic.conn_type = cpu_to_le32(conn_type);
1508 /* Fully active/deactivate BSS network in AP mode only */
1509 basic_req.basic.active = enable;
1510 break;
1511 case NL80211_IFTYPE_STATION:
1512 if (vif->p2p)
1513 conn_type = CONNECTION_P2P_GC;
1514 else
1515 conn_type = CONNECTION_INFRA_STA;
1516 basic_req.basic.conn_type = cpu_to_le32(conn_type);
1517 break;
1518 case NL80211_IFTYPE_ADHOC:
1519 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC);
1520 break;
1521 default:
1522 WARN_ON(1);
1523 break;
1524 }
1525
1526 memcpy(basic_req.basic.bssid, vif->bss_conf.bssid, ETH_ALEN);
1527 basic_req.basic.bmc_tx_wlan_idx = cpu_to_le16(wcid->idx);
1528 basic_req.basic.sta_idx = cpu_to_le16(wcid->idx);
1529 basic_req.basic.conn_state = !enable;
1530
1531 err = mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), &basic_req,
1532 sizeof(basic_req), true);
1533 if (err < 0)
1534 return err;
1535
1536 if (vif->bss_conf.he_support) {
1537 struct {
1538 struct {
1539 u8 bss_idx;
1540 u8 pad[3];
1541 } __packed hdr;
1542 struct bss_info_uni_he he;
1543 struct bss_info_uni_bss_color bss_color;
1544 } he_req = {
1545 .hdr = {
1546 .bss_idx = mvif->idx,
1547 },
1548 .he = {
1549 .tag = cpu_to_le16(UNI_BSS_INFO_HE_BASIC),
1550 .len = cpu_to_le16(sizeof(struct bss_info_uni_he)),
1551 },
1552 .bss_color = {
1553 .tag = cpu_to_le16(UNI_BSS_INFO_BSS_COLOR),
1554 .len = cpu_to_le16(sizeof(struct bss_info_uni_bss_color)),
1555 .enable = 0,
1556 .bss_color = 0,
1557 },
1558 };
1559
1560 if (enable) {
1561 he_req.bss_color.enable =
1562 vif->bss_conf.he_bss_color.enabled;
1563 he_req.bss_color.bss_color =
1564 vif->bss_conf.he_bss_color.color;
1565 }
1566
1567 mt76_connac_mcu_uni_bss_he_tlv(phy, vif,
1568 (struct tlv *)&he_req.he);
1569 err = mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE),
1570 &he_req, sizeof(he_req), true);
1571 if (err < 0)
1572 return err;
1573 }
1574
1575 return mt76_connac_mcu_uni_set_chctx(phy, mvif, ctx);
1576}
1577EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_add_bss);
1578
1579#define MT76_CONNAC_SCAN_CHANNEL_TIME 60
1580int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif,
1581 struct ieee80211_scan_request *scan_req)
1582{
1583 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1584 struct cfg80211_scan_request *sreq = &scan_req->req;
1585 int n_ssids = 0, err, i, duration;
1586 int ext_channels_num = max_t(int, sreq->n_channels - 32, 0);
1587 struct ieee80211_channel **scan_list = sreq->channels;
1588 struct mt76_dev *mdev = phy->dev;
1589 struct mt76_connac_mcu_scan_channel *chan;
1590 struct mt76_connac_hw_scan_req *req;
1591 struct sk_buff *skb;
1592
1593 if (test_bit(MT76_HW_SCANNING, &phy->state))
1594 return -EBUSY;
1595
1596 skb = mt76_mcu_msg_alloc(mdev, NULL, sizeof(*req));
1597 if (!skb)
1598 return -ENOMEM;
1599
1600 set_bit(MT76_HW_SCANNING, &phy->state);
1601 mvif->scan_seq_num = (mvif->scan_seq_num + 1) & 0x7f;
1602
1603 req = (struct mt76_connac_hw_scan_req *)skb_put(skb, sizeof(*req));
1604
1605 req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7;
1606 req->bss_idx = mvif->idx;
1607 req->scan_type = sreq->n_ssids ? 1 : 0;
1608 req->probe_req_num = sreq->n_ssids ? 2 : 0;
1609 req->version = 1;
1610
1611 for (i = 0; i < sreq->n_ssids; i++) {
1612 if (!sreq->ssids[i].ssid_len)
1613 continue;
1614
1615 req->ssids[i].ssid_len = cpu_to_le32(sreq->ssids[i].ssid_len);
1616 memcpy(req->ssids[i].ssid, sreq->ssids[i].ssid,
1617 sreq->ssids[i].ssid_len);
1618 n_ssids++;
1619 }
1620 req->ssid_type = n_ssids ? BIT(2) : BIT(0);
1621 req->ssid_type_ext = n_ssids ? BIT(0) : 0;
1622 req->ssids_num = n_ssids;
1623
1624 duration = is_mt7921(phy->dev) ? 0 : MT76_CONNAC_SCAN_CHANNEL_TIME;
1625 /* increase channel time for passive scan */
1626 if (!sreq->n_ssids)
1627 duration *= 2;
1628 req->timeout_value = cpu_to_le16(sreq->n_channels * duration);
1629 req->channel_min_dwell_time = cpu_to_le16(duration);
1630 req->channel_dwell_time = cpu_to_le16(duration);
1631
1632 req->channels_num = min_t(u8, sreq->n_channels, 32);
1633 req->ext_channels_num = min_t(u8, ext_channels_num, 32);
1634 for (i = 0; i < req->channels_num + req->ext_channels_num; i++) {
1635 if (i >= 32)
1636 chan = &req->ext_channels[i - 32];
1637 else
1638 chan = &req->channels[i];
1639
1640 switch (scan_list[i]->band) {
1641 case NL80211_BAND_2GHZ:
1642 chan->band = 1;
1643 break;
1644 case NL80211_BAND_6GHZ:
1645 chan->band = 3;
1646 break;
1647 default:
1648 chan->band = 2;
1649 break;
1650 }
1651 chan->channel_num = scan_list[i]->hw_value;
1652 }
1653 req->channel_type = sreq->n_channels ? 4 : 0;
1654
1655 if (sreq->ie_len > 0) {
1656 memcpy(req->ies, sreq->ie, sreq->ie_len);
1657 req->ies_len = cpu_to_le16(sreq->ie_len);
1658 }
1659
1660 if (is_mt7921(phy->dev))
1661 req->scan_func |= SCAN_FUNC_SPLIT_SCAN;
1662
1663 memcpy(req->bssid, sreq->bssid, ETH_ALEN);
1664 if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) {
1665 get_random_mask_addr(req->random_mac, sreq->mac_addr,
1666 sreq->mac_addr_mask);
1667 req->scan_func |= SCAN_FUNC_RANDOM_MAC;
1668 }
1669
1670 err = mt76_mcu_skb_send_msg(mdev, skb, MCU_CE_CMD(START_HW_SCAN),
1671 false);
1672 if (err < 0)
1673 clear_bit(MT76_HW_SCANNING, &phy->state);
1674
1675 return err;
1676}
1677EXPORT_SYMBOL_GPL(mt76_connac_mcu_hw_scan);
1678
1679int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy,
1680 struct ieee80211_vif *vif)
1681{
1682 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1683 struct {
1684 u8 seq_num;
1685 u8 is_ext_channel;
1686 u8 rsv[2];
1687 } __packed req = {
1688 .seq_num = mvif->scan_seq_num,
1689 };
1690
1691 if (test_and_clear_bit(MT76_HW_SCANNING, &phy->state)) {
1692 struct cfg80211_scan_info info = {
1693 .aborted = true,
1694 };
1695
1696 ieee80211_scan_completed(phy->hw, &info);
1697 }
1698
1699 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(CANCEL_HW_SCAN),
1700 &req, sizeof(req), false);
1701}
1702EXPORT_SYMBOL_GPL(mt76_connac_mcu_cancel_hw_scan);
1703
1704int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy,
1705 struct ieee80211_vif *vif,
1706 struct cfg80211_sched_scan_request *sreq)
1707{
1708 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
1709 struct ieee80211_channel **scan_list = sreq->channels;
1710 struct mt76_connac_mcu_scan_channel *chan;
1711 struct mt76_connac_sched_scan_req *req;
1712 struct mt76_dev *mdev = phy->dev;
1713 struct cfg80211_match_set *match;
1714 struct cfg80211_ssid *ssid;
1715 struct sk_buff *skb;
1716 int i;
1717
1718 skb = mt76_mcu_msg_alloc(mdev, NULL, sizeof(*req) + sreq->ie_len);
1719 if (!skb)
1720 return -ENOMEM;
1721
1722 mvif->scan_seq_num = (mvif->scan_seq_num + 1) & 0x7f;
1723
1724 req = (struct mt76_connac_sched_scan_req *)skb_put(skb, sizeof(*req));
1725 req->version = 1;
1726 req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7;
1727
1728 if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) {
1729 u8 *addr = is_mt7663(phy->dev) ? req->mt7663.random_mac
1730 : req->mt7921.random_mac;
1731
1732 req->scan_func = 1;
1733 get_random_mask_addr(addr, sreq->mac_addr,
1734 sreq->mac_addr_mask);
1735 }
1736 if (is_mt7921(phy->dev)) {
1737 req->mt7921.bss_idx = mvif->idx;
1738 req->mt7921.delay = cpu_to_le32(sreq->delay);
1739 }
1740
1741 req->ssids_num = sreq->n_ssids;
1742 for (i = 0; i < req->ssids_num; i++) {
1743 ssid = &sreq->ssids[i];
1744 memcpy(req->ssids[i].ssid, ssid->ssid, ssid->ssid_len);
1745 req->ssids[i].ssid_len = cpu_to_le32(ssid->ssid_len);
1746 }
1747
1748 req->match_num = sreq->n_match_sets;
1749 for (i = 0; i < req->match_num; i++) {
1750 match = &sreq->match_sets[i];
1751 memcpy(req->match[i].ssid, match->ssid.ssid,
1752 match->ssid.ssid_len);
1753 req->match[i].rssi_th = cpu_to_le32(match->rssi_thold);
1754 req->match[i].ssid_len = match->ssid.ssid_len;
1755 }
1756
1757 req->channel_type = sreq->n_channels ? 4 : 0;
1758 req->channels_num = min_t(u8, sreq->n_channels, 64);
1759 for (i = 0; i < req->channels_num; i++) {
1760 chan = &req->channels[i];
1761
1762 switch (scan_list[i]->band) {
1763 case NL80211_BAND_2GHZ:
1764 chan->band = 1;
1765 break;
1766 case NL80211_BAND_6GHZ:
1767 chan->band = 3;
1768 break;
1769 default:
1770 chan->band = 2;
1771 break;
1772 }
1773 chan->channel_num = scan_list[i]->hw_value;
1774 }
1775
1776 req->intervals_num = sreq->n_scan_plans;
1777 for (i = 0; i < req->intervals_num; i++)
1778 req->intervals[i] = cpu_to_le16(sreq->scan_plans[i].interval);
1779
1780 if (sreq->ie_len > 0) {
1781 req->ie_len = cpu_to_le16(sreq->ie_len);
1782 memcpy(skb_put(skb, sreq->ie_len), sreq->ie, sreq->ie_len);
1783 }
1784
1785 return mt76_mcu_skb_send_msg(mdev, skb, MCU_CE_CMD(SCHED_SCAN_REQ),
1786 false);
1787}
1788EXPORT_SYMBOL_GPL(mt76_connac_mcu_sched_scan_req);
1789
1790int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy,
1791 struct ieee80211_vif *vif,
1792 bool enable)
1793{
1794 struct {
1795 u8 active; /* 0: enabled 1: disabled */
1796 u8 rsv[3];
1797 } __packed req = {
1798 .active = !enable,
1799 };
1800
1801 if (enable)
1802 set_bit(MT76_HW_SCHED_SCANNING, &phy->state);
1803 else
1804 clear_bit(MT76_HW_SCHED_SCANNING, &phy->state);
1805
1806 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(SCHED_SCAN_ENABLE),
1807 &req, sizeof(req), false);
1808}
1809EXPORT_SYMBOL_GPL(mt76_connac_mcu_sched_scan_enable);
1810
1811int mt76_connac_mcu_chip_config(struct mt76_dev *dev)
1812{
1813 struct mt76_connac_config req = {
1814 .resp_type = 0,
1815 };
1816
1817 memcpy(req.data, "assert", 7);
1818
1819 return mt76_mcu_send_msg(dev, MCU_CE_CMD(CHIP_CONFIG),
1820 &req, sizeof(req), false);
1821}
1822EXPORT_SYMBOL_GPL(mt76_connac_mcu_chip_config);
1823
1824int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable)
1825{
1826 struct mt76_connac_config req = {
1827 .resp_type = 0,
1828 };
1829
1830 snprintf(req.data, sizeof(req.data), "KeepFullPwr %d", !enable);
1831
1832 return mt76_mcu_send_msg(dev, MCU_CE_CMD(CHIP_CONFIG),
1833 &req, sizeof(req), false);
1834}
1835EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_deep_sleep);
1836
1837int mt76_connac_sta_state_dp(struct mt76_dev *dev,
1838 enum ieee80211_sta_state old_state,
1839 enum ieee80211_sta_state new_state)
1840{
1841 if ((old_state == IEEE80211_STA_ASSOC &&
1842 new_state == IEEE80211_STA_AUTHORIZED) ||
1843 (old_state == IEEE80211_STA_NONE &&
1844 new_state == IEEE80211_STA_NOTEXIST))
1845 mt76_connac_mcu_set_deep_sleep(dev, true);
1846
1847 if ((old_state == IEEE80211_STA_NOTEXIST &&
1848 new_state == IEEE80211_STA_NONE) ||
1849 (old_state == IEEE80211_STA_AUTHORIZED &&
1850 new_state == IEEE80211_STA_ASSOC))
1851 mt76_connac_mcu_set_deep_sleep(dev, false);
1852
1853 return 0;
1854}
1855EXPORT_SYMBOL_GPL(mt76_connac_sta_state_dp);
1856
1857void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb,
1858 struct mt76_connac_coredump *coredump)
1859{
1860 spin_lock_bh(&dev->lock);
1861 __skb_queue_tail(&coredump->msg_list, skb);
1862 spin_unlock_bh(&dev->lock);
1863
1864 coredump->last_activity = jiffies;
1865
1866 queue_delayed_work(dev->wq, &coredump->work,
1867 MT76_CONNAC_COREDUMP_TIMEOUT);
1868}
1869EXPORT_SYMBOL_GPL(mt76_connac_mcu_coredump_event);
1870
1871static void mt76_connac_mcu_parse_tx_resource(struct mt76_dev *dev,
1872 struct sk_buff *skb)
1873{
1874 struct mt76_sdio *sdio = &dev->sdio;
1875 struct mt76_connac_tx_resource {
1876 __le32 version;
1877 __le32 pse_data_quota;
1878 __le32 pse_mcu_quota;
1879 __le32 ple_data_quota;
1880 __le32 ple_mcu_quota;
1881 __le16 pse_page_size;
1882 __le16 ple_page_size;
1883 u8 pp_padding;
1884 u8 pad[3];
1885 } __packed * tx_res;
1886
1887 tx_res = (struct mt76_connac_tx_resource *)skb->data;
1888 sdio->sched.pse_data_quota = le32_to_cpu(tx_res->pse_data_quota);
1889 sdio->sched.pse_mcu_quota = le32_to_cpu(tx_res->pse_mcu_quota);
1890 sdio->sched.ple_data_quota = le32_to_cpu(tx_res->ple_data_quota);
1891 sdio->sched.pse_page_size = le16_to_cpu(tx_res->pse_page_size);
1892 sdio->sched.deficit = tx_res->pp_padding;
1893}
1894
1895static void mt76_connac_mcu_parse_phy_cap(struct mt76_dev *dev,
1896 struct sk_buff *skb)
1897{
1898 struct mt76_connac_phy_cap {
1899 u8 ht;
1900 u8 vht;
1901 u8 _5g;
1902 u8 max_bw;
1903 u8 nss;
1904 u8 dbdc;
1905 u8 tx_ldpc;
1906 u8 rx_ldpc;
1907 u8 tx_stbc;
1908 u8 rx_stbc;
1909 u8 hw_path;
1910 u8 he;
1911 } __packed * cap;
1912
1913 enum {
1914 WF0_24G,
1915 WF0_5G
1916 };
1917
1918 cap = (struct mt76_connac_phy_cap *)skb->data;
1919
1920 dev->phy.antenna_mask = BIT(cap->nss) - 1;
1921 dev->phy.chainmask = dev->phy.antenna_mask;
1922 dev->phy.cap.has_2ghz = cap->hw_path & BIT(WF0_24G);
1923 dev->phy.cap.has_5ghz = cap->hw_path & BIT(WF0_5G);
1924}
1925
1926int mt76_connac_mcu_get_nic_capability(struct mt76_phy *phy)
1927{
1928 struct mt76_connac_cap_hdr {
1929 __le16 n_element;
1930 u8 rsv[2];
1931 } __packed * hdr;
1932 struct sk_buff *skb;
1933 int ret, i;
1934
1935 ret = mt76_mcu_send_and_get_msg(phy->dev, MCU_CE_CMD(GET_NIC_CAPAB),
1936 NULL, 0, true, &skb);
1937 if (ret)
1938 return ret;
1939
1940 hdr = (struct mt76_connac_cap_hdr *)skb->data;
1941 if (skb->len < sizeof(*hdr)) {
1942 ret = -EINVAL;
1943 goto out;
1944 }
1945
1946 skb_pull(skb, sizeof(*hdr));
1947
1948 for (i = 0; i < le16_to_cpu(hdr->n_element); i++) {
1949 struct tlv_hdr {
1950 __le32 type;
1951 __le32 len;
1952 } __packed * tlv = (struct tlv_hdr *)skb->data;
1953 int len;
1954
1955 if (skb->len < sizeof(*tlv))
1956 break;
1957
1958 skb_pull(skb, sizeof(*tlv));
1959
1960 len = le32_to_cpu(tlv->len);
1961 if (skb->len < len)
1962 break;
1963
1964 switch (le32_to_cpu(tlv->type)) {
1965 case MT_NIC_CAP_6G:
1966 phy->cap.has_6ghz = skb->data[0];
1967 break;
1968 case MT_NIC_CAP_MAC_ADDR:
1969 memcpy(phy->macaddr, (void *)skb->data, ETH_ALEN);
1970 break;
1971 case MT_NIC_CAP_PHY:
1972 mt76_connac_mcu_parse_phy_cap(phy->dev, skb);
1973 break;
1974 case MT_NIC_CAP_TX_RESOURCE:
1975 if (mt76_is_sdio(phy->dev))
1976 mt76_connac_mcu_parse_tx_resource(phy->dev,
1977 skb);
1978 break;
1979 default:
1980 break;
1981 }
1982 skb_pull(skb, len);
1983 }
1984out:
1985 dev_kfree_skb(skb);
1986
1987 return ret;
1988}
1989EXPORT_SYMBOL_GPL(mt76_connac_mcu_get_nic_capability);
1990
1991static void
1992mt76_connac_mcu_build_sku(struct mt76_dev *dev, s8 *sku,
1993 struct mt76_power_limits *limits,
1994 enum nl80211_band band)
1995{
1996 int max_power = is_mt7921(dev) ? 127 : 63;
1997 int i, offset = sizeof(limits->cck);
1998
1999 memset(sku, max_power, MT_SKU_POWER_LIMIT);
2000
2001 if (band == NL80211_BAND_2GHZ) {
2002 /* cck */
2003 memcpy(sku, limits->cck, sizeof(limits->cck));
2004 }
2005
2006 /* ofdm */
2007 memcpy(&sku[offset], limits->ofdm, sizeof(limits->ofdm));
2008 offset += sizeof(limits->ofdm);
2009
2010 /* ht */
2011 for (i = 0; i < 2; i++) {
2012 memcpy(&sku[offset], limits->mcs[i], 8);
2013 offset += 8;
2014 }
2015 sku[offset++] = limits->mcs[0][0];
2016
2017 /* vht */
2018 for (i = 0; i < ARRAY_SIZE(limits->mcs); i++) {
2019 memcpy(&sku[offset], limits->mcs[i],
2020 ARRAY_SIZE(limits->mcs[i]));
2021 offset += 12;
2022 }
2023
2024 if (!is_mt7921(dev))
2025 return;
2026
2027 /* he */
2028 for (i = 0; i < ARRAY_SIZE(limits->ru); i++) {
2029 memcpy(&sku[offset], limits->ru[i], ARRAY_SIZE(limits->ru[i]));
2030 offset += ARRAY_SIZE(limits->ru[i]);
2031 }
2032}
2033
2034static s8 mt76_connac_get_ch_power(struct mt76_phy *phy,
2035 struct ieee80211_channel *chan,
2036 s8 target_power)
2037{
2038 struct mt76_dev *dev = phy->dev;
2039 struct ieee80211_supported_band *sband;
2040 int i;
2041
2042 switch (chan->band) {
2043 case NL80211_BAND_2GHZ:
2044 sband = &phy->sband_2g.sband;
2045 break;
2046 case NL80211_BAND_5GHZ:
2047 sband = &phy->sband_5g.sband;
2048 break;
2049 case NL80211_BAND_6GHZ:
2050 sband = &phy->sband_6g.sband;
2051 break;
2052 default:
2053 return target_power;
2054 }
2055
2056 for (i = 0; i < sband->n_channels; i++) {
2057 struct ieee80211_channel *ch = &sband->channels[i];
2058
2059 if (ch->hw_value == chan->hw_value) {
2060 if (!(ch->flags & IEEE80211_CHAN_DISABLED)) {
2061 int power = 2 * ch->max_reg_power;
2062
2063 if (is_mt7663(dev) && (power > 63 || power < -64))
2064 power = 63;
2065 target_power = min_t(s8, power, target_power);
2066 }
2067 break;
2068 }
2069 }
2070
2071 return target_power;
2072}
2073
2074static int
2075mt76_connac_mcu_rate_txpower_band(struct mt76_phy *phy,
2076 enum nl80211_band band)
2077{
2078 struct mt76_dev *dev = phy->dev;
2079 int sku_len, batch_len = is_mt7921(dev) ? 8 : 16;
2080 static const u8 chan_list_2ghz[] = {
2081 1, 2, 3, 4, 5, 6, 7,
2082 8, 9, 10, 11, 12, 13, 14
2083 };
2084 static const u8 chan_list_5ghz[] = {
2085 36, 38, 40, 42, 44, 46, 48,
2086 50, 52, 54, 56, 58, 60, 62,
2087 64, 100, 102, 104, 106, 108, 110,
2088 112, 114, 116, 118, 120, 122, 124,
2089 126, 128, 132, 134, 136, 138, 140,
2090 142, 144, 149, 151, 153, 155, 157,
2091 159, 161, 165
2092 };
2093 static const u8 chan_list_6ghz[] = {
2094 1, 3, 5, 7, 9, 11, 13,
2095 15, 17, 19, 21, 23, 25, 27,
2096 29, 33, 35, 37, 39, 41, 43,
2097 45, 47, 49, 51, 53, 55, 57,
2098 59, 61, 65, 67, 69, 71, 73,
2099 75, 77, 79, 81, 83, 85, 87,
2100 89, 91, 93, 97, 99, 101, 103,
2101 105, 107, 109, 111, 113, 115, 117,
2102 119, 121, 123, 125, 129, 131, 133,
2103 135, 137, 139, 141, 143, 145, 147,
2104 149, 151, 153, 155, 157, 161, 163,
2105 165, 167, 169, 171, 173, 175, 177,
2106 179, 181, 183, 185, 187, 189, 193,
2107 195, 197, 199, 201, 203, 205, 207,
2108 209, 211, 213, 215, 217, 219, 221,
2109 225, 227, 229, 233
2110 };
2111 int i, n_chan, batch_size, idx = 0, tx_power, last_ch;
2112 struct mt76_connac_sku_tlv sku_tlbv;
2113 struct mt76_power_limits limits;
2114 const u8 *ch_list;
2115
2116 sku_len = is_mt7921(dev) ? sizeof(sku_tlbv) : sizeof(sku_tlbv) - 92;
2117 tx_power = 2 * phy->hw->conf.power_level;
2118 if (!tx_power)
2119 tx_power = 127;
2120
2121 if (band == NL80211_BAND_2GHZ) {
2122 n_chan = ARRAY_SIZE(chan_list_2ghz);
2123 ch_list = chan_list_2ghz;
2124 } else if (band == NL80211_BAND_6GHZ) {
2125 n_chan = ARRAY_SIZE(chan_list_6ghz);
2126 ch_list = chan_list_6ghz;
2127 } else {
2128 n_chan = ARRAY_SIZE(chan_list_5ghz);
2129 ch_list = chan_list_5ghz;
2130 }
2131 batch_size = DIV_ROUND_UP(n_chan, batch_len);
2132
2133 if (phy->cap.has_6ghz)
2134 last_ch = chan_list_6ghz[ARRAY_SIZE(chan_list_6ghz) - 1];
2135 else if (phy->cap.has_5ghz)
2136 last_ch = chan_list_5ghz[ARRAY_SIZE(chan_list_5ghz) - 1];
2137 else
2138 last_ch = chan_list_2ghz[ARRAY_SIZE(chan_list_2ghz) - 1];
2139
2140 for (i = 0; i < batch_size; i++) {
2141 struct mt76_connac_tx_power_limit_tlv tx_power_tlv = {};
2142 int j, err, msg_len, num_ch;
2143 struct sk_buff *skb;
2144
2145 num_ch = i == batch_size - 1 ? n_chan % batch_len : batch_len;
2146 msg_len = sizeof(tx_power_tlv) + num_ch * sizeof(sku_tlbv);
2147 skb = mt76_mcu_msg_alloc(dev, NULL, msg_len);
2148 if (!skb)
2149 return -ENOMEM;
2150
2151 skb_reserve(skb, sizeof(tx_power_tlv));
2152
2153 BUILD_BUG_ON(sizeof(dev->alpha2) > sizeof(tx_power_tlv.alpha2));
2154 memcpy(tx_power_tlv.alpha2, dev->alpha2, sizeof(dev->alpha2));
2155 tx_power_tlv.n_chan = num_ch;
2156
2157 switch (band) {
2158 case NL80211_BAND_2GHZ:
2159 tx_power_tlv.band = 1;
2160 break;
2161 case NL80211_BAND_6GHZ:
2162 tx_power_tlv.band = 3;
2163 break;
2164 default:
2165 tx_power_tlv.band = 2;
2166 break;
2167 }
2168
2169 for (j = 0; j < num_ch; j++, idx++) {
2170 struct ieee80211_channel chan = {
2171 .hw_value = ch_list[idx],
2172 .band = band,
2173 };
2174 s8 reg_power, sar_power;
2175
2176 reg_power = mt76_connac_get_ch_power(phy, &chan,
2177 tx_power);
2178 sar_power = mt76_get_sar_power(phy, &chan, reg_power);
2179
2180 mt76_get_rate_power_limits(phy, &chan, &limits,
2181 sar_power);
2182
2183 tx_power_tlv.last_msg = ch_list[idx] == last_ch;
2184 sku_tlbv.channel = ch_list[idx];
2185
2186 mt76_connac_mcu_build_sku(dev, sku_tlbv.pwr_limit,
2187 &limits, band);
2188 skb_put_data(skb, &sku_tlbv, sku_len);
2189 }
2190 __skb_push(skb, sizeof(tx_power_tlv));
2191 memcpy(skb->data, &tx_power_tlv, sizeof(tx_power_tlv));
2192
2193 err = mt76_mcu_skb_send_msg(dev, skb,
2194 MCU_CE_CMD(SET_RATE_TX_POWER),
2195 false);
2196 if (err < 0)
2197 return err;
2198 }
2199
2200 return 0;
2201}
2202
2203int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy)
2204{
2205 int err;
2206
2207 if (phy->cap.has_2ghz) {
2208 err = mt76_connac_mcu_rate_txpower_band(phy,
2209 NL80211_BAND_2GHZ);
2210 if (err < 0)
2211 return err;
2212 }
2213 if (phy->cap.has_5ghz) {
2214 err = mt76_connac_mcu_rate_txpower_band(phy,
2215 NL80211_BAND_5GHZ);
2216 if (err < 0)
2217 return err;
2218 }
2219 if (phy->cap.has_6ghz) {
2220 err = mt76_connac_mcu_rate_txpower_band(phy,
2221 NL80211_BAND_6GHZ);
2222 if (err < 0)
2223 return err;
2224 }
2225
2226 return 0;
2227}
2228EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_rate_txpower);
2229
2230int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev,
2231 struct mt76_vif *vif,
2232 struct ieee80211_bss_conf *info)
2233{
2234 struct ieee80211_vif *mvif = container_of(info, struct ieee80211_vif,
2235 bss_conf);
2236 struct sk_buff *skb;
2237 int i, len = min_t(int, mvif->cfg.arp_addr_cnt,
2238 IEEE80211_BSS_ARP_ADDR_LIST_LEN);
2239 struct {
2240 struct {
2241 u8 bss_idx;
2242 u8 pad[3];
2243 } __packed hdr;
2244 struct mt76_connac_arpns_tlv arp;
2245 } req_hdr = {
2246 .hdr = {
2247 .bss_idx = vif->idx,
2248 },
2249 .arp = {
2250 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_ARP),
2251 .len = cpu_to_le16(sizeof(struct mt76_connac_arpns_tlv)),
2252 .ips_num = len,
2253 .mode = 2, /* update */
2254 .option = 1,
2255 },
2256 };
2257
2258 skb = mt76_mcu_msg_alloc(dev, NULL,
2259 sizeof(req_hdr) + len * sizeof(__be32));
2260 if (!skb)
2261 return -ENOMEM;
2262
2263 skb_put_data(skb, &req_hdr, sizeof(req_hdr));
2264 for (i = 0; i < len; i++)
2265 skb_put_data(skb, &mvif->cfg.arp_addr_list[i], sizeof(__be32));
2266
2267 return mt76_mcu_skb_send_msg(dev, skb, MCU_UNI_CMD(OFFLOAD), true);
2268}
2269EXPORT_SYMBOL_GPL(mt76_connac_mcu_update_arp_filter);
2270
2271int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw,
2272 struct ieee80211_vif *vif)
2273{
2274 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2275 int ct_window = vif->bss_conf.p2p_noa_attr.oppps_ctwindow;
2276 struct mt76_phy *phy = hw->priv;
2277 struct {
2278 __le32 ct_win;
2279 u8 bss_idx;
2280 u8 rsv[3];
2281 } __packed req = {
2282 .ct_win = cpu_to_le32(ct_window),
2283 .bss_idx = mvif->idx,
2284 };
2285
2286 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(SET_P2P_OPPPS),
2287 &req, sizeof(req), false);
2288}
2289EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_p2p_oppps);
2290
2291#ifdef CONFIG_PM
2292
2293const struct wiphy_wowlan_support mt76_connac_wowlan_support = {
2294 .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT |
2295 WIPHY_WOWLAN_SUPPORTS_GTK_REKEY | WIPHY_WOWLAN_NET_DETECT,
2296 .n_patterns = 1,
2297 .pattern_min_len = 1,
2298 .pattern_max_len = MT76_CONNAC_WOW_PATTEN_MAX_LEN,
2299 .max_nd_match_sets = 10,
2300};
2301EXPORT_SYMBOL_GPL(mt76_connac_wowlan_support);
2302
2303static void
2304mt76_connac_mcu_key_iter(struct ieee80211_hw *hw,
2305 struct ieee80211_vif *vif,
2306 struct ieee80211_sta *sta,
2307 struct ieee80211_key_conf *key,
2308 void *data)
2309{
2310 struct mt76_connac_gtk_rekey_tlv *gtk_tlv = data;
2311 u32 cipher;
2312
2313 if (key->cipher != WLAN_CIPHER_SUITE_AES_CMAC &&
2314 key->cipher != WLAN_CIPHER_SUITE_CCMP &&
2315 key->cipher != WLAN_CIPHER_SUITE_TKIP)
2316 return;
2317
2318 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
2319 cipher = BIT(3);
2320 else
2321 cipher = BIT(4);
2322
2323 /* we are assuming here to have a single pairwise key */
2324 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) {
2325 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
2326 gtk_tlv->proto = cpu_to_le32(NL80211_WPA_VERSION_1);
2327 else
2328 gtk_tlv->proto = cpu_to_le32(NL80211_WPA_VERSION_2);
2329
2330 gtk_tlv->pairwise_cipher = cpu_to_le32(cipher);
2331 gtk_tlv->keyid = key->keyidx;
2332 } else {
2333 gtk_tlv->group_cipher = cpu_to_le32(cipher);
2334 }
2335}
2336
2337int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw,
2338 struct ieee80211_vif *vif,
2339 struct cfg80211_gtk_rekey_data *key)
2340{
2341 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2342 struct mt76_connac_gtk_rekey_tlv *gtk_tlv;
2343 struct mt76_phy *phy = hw->priv;
2344 struct sk_buff *skb;
2345 struct {
2346 u8 bss_idx;
2347 u8 pad[3];
2348 } __packed hdr = {
2349 .bss_idx = mvif->idx,
2350 };
2351
2352 skb = mt76_mcu_msg_alloc(phy->dev, NULL,
2353 sizeof(hdr) + sizeof(*gtk_tlv));
2354 if (!skb)
2355 return -ENOMEM;
2356
2357 skb_put_data(skb, &hdr, sizeof(hdr));
2358 gtk_tlv = (struct mt76_connac_gtk_rekey_tlv *)skb_put(skb,
2359 sizeof(*gtk_tlv));
2360 gtk_tlv->tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_GTK_REKEY);
2361 gtk_tlv->len = cpu_to_le16(sizeof(*gtk_tlv));
2362 gtk_tlv->rekey_mode = 2;
2363 gtk_tlv->option = 1;
2364
2365 rcu_read_lock();
2366 ieee80211_iter_keys_rcu(hw, vif, mt76_connac_mcu_key_iter, gtk_tlv);
2367 rcu_read_unlock();
2368
2369 memcpy(gtk_tlv->kek, key->kek, NL80211_KEK_LEN);
2370 memcpy(gtk_tlv->kck, key->kck, NL80211_KCK_LEN);
2371 memcpy(gtk_tlv->replay_ctr, key->replay_ctr, NL80211_REPLAY_CTR_LEN);
2372
2373 return mt76_mcu_skb_send_msg(phy->dev, skb,
2374 MCU_UNI_CMD(OFFLOAD), true);
2375}
2376EXPORT_SYMBOL_GPL(mt76_connac_mcu_update_gtk_rekey);
2377
2378static int
2379mt76_connac_mcu_set_arp_filter(struct mt76_dev *dev, struct ieee80211_vif *vif,
2380 bool suspend)
2381{
2382 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2383 struct {
2384 struct {
2385 u8 bss_idx;
2386 u8 pad[3];
2387 } __packed hdr;
2388 struct mt76_connac_arpns_tlv arpns;
2389 } req = {
2390 .hdr = {
2391 .bss_idx = mvif->idx,
2392 },
2393 .arpns = {
2394 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_ARP),
2395 .len = cpu_to_le16(sizeof(struct mt76_connac_arpns_tlv)),
2396 .mode = suspend,
2397 },
2398 };
2399
2400 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(OFFLOAD), &req,
2401 sizeof(req), true);
2402}
2403
2404static int
2405mt76_connac_mcu_set_gtk_rekey(struct mt76_dev *dev, struct ieee80211_vif *vif,
2406 bool suspend)
2407{
2408 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2409 struct {
2410 struct {
2411 u8 bss_idx;
2412 u8 pad[3];
2413 } __packed hdr;
2414 struct mt76_connac_gtk_rekey_tlv gtk_tlv;
2415 } __packed req = {
2416 .hdr = {
2417 .bss_idx = mvif->idx,
2418 },
2419 .gtk_tlv = {
2420 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_GTK_REKEY),
2421 .len = cpu_to_le16(sizeof(struct mt76_connac_gtk_rekey_tlv)),
2422 .rekey_mode = !suspend,
2423 },
2424 };
2425
2426 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(OFFLOAD), &req,
2427 sizeof(req), true);
2428}
2429
2430static int
2431mt76_connac_mcu_set_suspend_mode(struct mt76_dev *dev,
2432 struct ieee80211_vif *vif,
2433 bool enable, u8 mdtim,
2434 bool wow_suspend)
2435{
2436 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2437 struct {
2438 struct {
2439 u8 bss_idx;
2440 u8 pad[3];
2441 } __packed hdr;
2442 struct mt76_connac_suspend_tlv suspend_tlv;
2443 } req = {
2444 .hdr = {
2445 .bss_idx = mvif->idx,
2446 },
2447 .suspend_tlv = {
2448 .tag = cpu_to_le16(UNI_SUSPEND_MODE_SETTING),
2449 .len = cpu_to_le16(sizeof(struct mt76_connac_suspend_tlv)),
2450 .enable = enable,
2451 .mdtim = mdtim,
2452 .wow_suspend = wow_suspend,
2453 },
2454 };
2455
2456 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(SUSPEND), &req,
2457 sizeof(req), true);
2458}
2459
2460static int
2461mt76_connac_mcu_set_wow_pattern(struct mt76_dev *dev,
2462 struct ieee80211_vif *vif,
2463 u8 index, bool enable,
2464 struct cfg80211_pkt_pattern *pattern)
2465{
2466 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2467 struct mt76_connac_wow_pattern_tlv *ptlv;
2468 struct sk_buff *skb;
2469 struct req_hdr {
2470 u8 bss_idx;
2471 u8 pad[3];
2472 } __packed hdr = {
2473 .bss_idx = mvif->idx,
2474 };
2475
2476 skb = mt76_mcu_msg_alloc(dev, NULL, sizeof(hdr) + sizeof(*ptlv));
2477 if (!skb)
2478 return -ENOMEM;
2479
2480 skb_put_data(skb, &hdr, sizeof(hdr));
2481 ptlv = (struct mt76_connac_wow_pattern_tlv *)skb_put(skb, sizeof(*ptlv));
2482 ptlv->tag = cpu_to_le16(UNI_SUSPEND_WOW_PATTERN);
2483 ptlv->len = cpu_to_le16(sizeof(*ptlv));
2484 ptlv->data_len = pattern->pattern_len;
2485 ptlv->enable = enable;
2486 ptlv->index = index;
2487
2488 memcpy(ptlv->pattern, pattern->pattern, pattern->pattern_len);
2489 memcpy(ptlv->mask, pattern->mask, DIV_ROUND_UP(pattern->pattern_len, 8));
2490
2491 return mt76_mcu_skb_send_msg(dev, skb, MCU_UNI_CMD(SUSPEND), true);
2492}
2493
2494static int
2495mt76_connac_mcu_set_wow_ctrl(struct mt76_phy *phy, struct ieee80211_vif *vif,
2496 bool suspend, struct cfg80211_wowlan *wowlan)
2497{
2498 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2499 struct mt76_dev *dev = phy->dev;
2500 struct {
2501 struct {
2502 u8 bss_idx;
2503 u8 pad[3];
2504 } __packed hdr;
2505 struct mt76_connac_wow_ctrl_tlv wow_ctrl_tlv;
2506 struct mt76_connac_wow_gpio_param_tlv gpio_tlv;
2507 } req = {
2508 .hdr = {
2509 .bss_idx = mvif->idx,
2510 },
2511 .wow_ctrl_tlv = {
2512 .tag = cpu_to_le16(UNI_SUSPEND_WOW_CTRL),
2513 .len = cpu_to_le16(sizeof(struct mt76_connac_wow_ctrl_tlv)),
2514 .cmd = suspend ? 1 : 2,
2515 },
2516 .gpio_tlv = {
2517 .tag = cpu_to_le16(UNI_SUSPEND_WOW_GPIO_PARAM),
2518 .len = cpu_to_le16(sizeof(struct mt76_connac_wow_gpio_param_tlv)),
2519 .gpio_pin = 0xff, /* follow fw about GPIO pin */
2520 },
2521 };
2522
2523 if (wowlan->magic_pkt)
2524 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_MAGIC;
2525 if (wowlan->disconnect)
2526 req.wow_ctrl_tlv.trigger |= (UNI_WOW_DETECT_TYPE_DISCONNECT |
2527 UNI_WOW_DETECT_TYPE_BCN_LOST);
2528 if (wowlan->nd_config) {
2529 mt76_connac_mcu_sched_scan_req(phy, vif, wowlan->nd_config);
2530 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT;
2531 mt76_connac_mcu_sched_scan_enable(phy, vif, suspend);
2532 }
2533 if (wowlan->n_patterns)
2534 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_BITMAP;
2535
2536 if (mt76_is_mmio(dev))
2537 req.wow_ctrl_tlv.wakeup_hif = WOW_PCIE;
2538 else if (mt76_is_usb(dev))
2539 req.wow_ctrl_tlv.wakeup_hif = WOW_USB;
2540 else if (mt76_is_sdio(dev))
2541 req.wow_ctrl_tlv.wakeup_hif = WOW_GPIO;
2542
2543 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(SUSPEND), &req,
2544 sizeof(req), true);
2545}
2546
2547int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend)
2548{
2549 struct {
2550 struct {
2551 u8 hif_type; /* 0x0: HIF_SDIO
2552 * 0x1: HIF_USB
2553 * 0x2: HIF_PCIE
2554 */
2555 u8 pad[3];
2556 } __packed hdr;
2557 struct hif_suspend_tlv {
2558 __le16 tag;
2559 __le16 len;
2560 u8 suspend;
2561 } __packed hif_suspend;
2562 } req = {
2563 .hif_suspend = {
2564 .tag = cpu_to_le16(0), /* 0: UNI_HIF_CTRL_BASIC */
2565 .len = cpu_to_le16(sizeof(struct hif_suspend_tlv)),
2566 .suspend = suspend,
2567 },
2568 };
2569
2570 if (mt76_is_mmio(dev))
2571 req.hdr.hif_type = 2;
2572 else if (mt76_is_usb(dev))
2573 req.hdr.hif_type = 1;
2574 else if (mt76_is_sdio(dev))
2575 req.hdr.hif_type = 0;
2576
2577 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(HIF_CTRL), &req,
2578 sizeof(req), true);
2579}
2580EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_hif_suspend);
2581
2582void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac,
2583 struct ieee80211_vif *vif)
2584{
2585 struct mt76_phy *phy = priv;
2586 bool suspend = !test_bit(MT76_STATE_RUNNING, &phy->state);
2587 struct ieee80211_hw *hw = phy->hw;
2588 struct cfg80211_wowlan *wowlan = hw->wiphy->wowlan_config;
2589 int i;
2590
2591 mt76_connac_mcu_set_gtk_rekey(phy->dev, vif, suspend);
2592 mt76_connac_mcu_set_arp_filter(phy->dev, vif, suspend);
2593
2594 mt76_connac_mcu_set_suspend_mode(phy->dev, vif, suspend, 1, true);
2595
2596 for (i = 0; i < wowlan->n_patterns; i++)
2597 mt76_connac_mcu_set_wow_pattern(phy->dev, vif, i, suspend,
2598 &wowlan->patterns[i]);
2599 mt76_connac_mcu_set_wow_ctrl(phy, vif, suspend, wowlan);
2600}
2601EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_suspend_iter);
2602#endif /* CONFIG_PM */
2603
2604u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset)
2605{
2606 struct {
2607 __le32 addr;
2608 __le32 val;
2609 } __packed req = {
2610 .addr = cpu_to_le32(offset),
2611 };
2612
2613 return mt76_mcu_send_msg(dev, MCU_CE_QUERY(REG_READ), &req,
2614 sizeof(req), true);
2615}
2616EXPORT_SYMBOL_GPL(mt76_connac_mcu_reg_rr);
2617
2618void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val)
2619{
2620 struct {
2621 __le32 addr;
2622 __le32 val;
2623 } __packed req = {
2624 .addr = cpu_to_le32(offset),
2625 .val = cpu_to_le32(val),
2626 };
2627
2628 mt76_mcu_send_msg(dev, MCU_CE_CMD(REG_WRITE), &req,
2629 sizeof(req), false);
2630}
2631EXPORT_SYMBOL_GPL(mt76_connac_mcu_reg_wr);
2632
2633static int
2634mt76_connac_mcu_sta_key_tlv(struct mt76_connac_sta_key_conf *sta_key_conf,
2635 struct sk_buff *skb,
2636 struct ieee80211_key_conf *key,
2637 enum set_key_cmd cmd)
2638{
2639 struct sta_rec_sec *sec;
2640 u32 len = sizeof(*sec);
2641 struct tlv *tlv;
2642
2643 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec));
2644 sec = (struct sta_rec_sec *)tlv;
2645 sec->add = cmd;
2646
2647 if (cmd == SET_KEY) {
2648 struct sec_key *sec_key;
2649 u8 cipher;
2650
2651 cipher = mt76_connac_mcu_get_cipher(key->cipher);
2652 if (cipher == MCU_CIPHER_NONE)
2653 return -EOPNOTSUPP;
2654
2655 sec_key = &sec->key[0];
2656 sec_key->cipher_len = sizeof(*sec_key);
2657
2658 if (cipher == MCU_CIPHER_BIP_CMAC_128) {
2659 sec_key->cipher_id = MCU_CIPHER_AES_CCMP;
2660 sec_key->key_id = sta_key_conf->keyidx;
2661 sec_key->key_len = 16;
2662 memcpy(sec_key->key, sta_key_conf->key, 16);
2663
2664 sec_key = &sec->key[1];
2665 sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128;
2666 sec_key->cipher_len = sizeof(*sec_key);
2667 sec_key->key_len = 16;
2668 memcpy(sec_key->key, key->key, 16);
2669 sec->n_cipher = 2;
2670 } else {
2671 sec_key->cipher_id = cipher;
2672 sec_key->key_id = key->keyidx;
2673 sec_key->key_len = key->keylen;
2674 memcpy(sec_key->key, key->key, key->keylen);
2675
2676 if (cipher == MCU_CIPHER_TKIP) {
2677 /* Rx/Tx MIC keys are swapped */
2678 memcpy(sec_key->key + 16, key->key + 24, 8);
2679 memcpy(sec_key->key + 24, key->key + 16, 8);
2680 }
2681
2682 /* store key_conf for BIP batch update */
2683 if (cipher == MCU_CIPHER_AES_CCMP) {
2684 memcpy(sta_key_conf->key, key->key, key->keylen);
2685 sta_key_conf->keyidx = key->keyidx;
2686 }
2687
2688 len -= sizeof(*sec_key);
2689 sec->n_cipher = 1;
2690 }
2691 } else {
2692 len -= sizeof(sec->key);
2693 sec->n_cipher = 0;
2694 }
2695 sec->len = cpu_to_le16(len);
2696
2697 return 0;
2698}
2699
2700int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif,
2701 struct mt76_connac_sta_key_conf *sta_key_conf,
2702 struct ieee80211_key_conf *key, int mcu_cmd,
2703 struct mt76_wcid *wcid, enum set_key_cmd cmd)
2704{
2705 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2706 struct sk_buff *skb;
2707 int ret;
2708
2709 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid);
2710 if (IS_ERR(skb))
2711 return PTR_ERR(skb);
2712
2713 ret = mt76_connac_mcu_sta_key_tlv(sta_key_conf, skb, key, cmd);
2714 if (ret)
2715 return ret;
2716
2717 ret = mt76_connac_mcu_sta_wed_update(dev, skb);
2718 if (ret)
2719 return ret;
2720
2721 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true);
2722}
2723EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_key);
2724
2725/* SIFS 20us + 512 byte beacon transmitted by 1Mbps (3906us) */
2726#define BCN_TX_ESTIMATE_TIME (4096 + 20)
2727void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif)
2728{
2729 struct bss_info_ext_bss *ext;
2730 int ext_bss_idx, tsf_offset;
2731 struct tlv *tlv;
2732
2733 ext_bss_idx = mvif->omac_idx - EXT_BSSID_START;
2734 if (ext_bss_idx < 0)
2735 return;
2736
2737 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_EXT_BSS, sizeof(*ext));
2738
2739 ext = (struct bss_info_ext_bss *)tlv;
2740 tsf_offset = ext_bss_idx * BCN_TX_ESTIMATE_TIME;
2741 ext->mbss_tsf_offset = cpu_to_le32(tsf_offset);
2742}
2743EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_ext_tlv);
2744
2745int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb,
2746 struct ieee80211_vif *vif,
2747 struct ieee80211_sta *sta,
2748 struct mt76_phy *phy, u16 wlan_idx,
2749 bool enable)
2750{
2751 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
2752 u32 type = vif->p2p ? NETWORK_P2P : NETWORK_INFRA;
2753 struct bss_info_basic *bss;
2754 struct tlv *tlv;
2755
2756 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BASIC, sizeof(*bss));
2757 bss = (struct bss_info_basic *)tlv;
2758
2759 switch (vif->type) {
2760 case NL80211_IFTYPE_MESH_POINT:
2761 case NL80211_IFTYPE_MONITOR:
2762 break;
2763 case NL80211_IFTYPE_AP:
2764 if (ieee80211_hw_check(phy->hw, SUPPORTS_MULTI_BSSID)) {
2765 u8 bssid_id = vif->bss_conf.bssid_indicator;
2766 struct wiphy *wiphy = phy->hw->wiphy;
2767
2768 if (bssid_id > ilog2(wiphy->mbssid_max_interfaces))
2769 return -EINVAL;
2770
2771 bss->non_tx_bssid = vif->bss_conf.bssid_index;
2772 bss->max_bssid = bssid_id;
2773 }
2774 break;
2775 case NL80211_IFTYPE_STATION:
2776 if (enable) {
2777 rcu_read_lock();
2778 if (!sta)
2779 sta = ieee80211_find_sta(vif,
2780 vif->bss_conf.bssid);
2781 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */
2782 if (sta) {
2783 struct mt76_wcid *wcid;
2784
2785 wcid = (struct mt76_wcid *)sta->drv_priv;
2786 wlan_idx = wcid->idx;
2787 }
2788 rcu_read_unlock();
2789 }
2790 break;
2791 case NL80211_IFTYPE_ADHOC:
2792 type = NETWORK_IBSS;
2793 break;
2794 default:
2795 WARN_ON(1);
2796 break;
2797 }
2798
2799 bss->network_type = cpu_to_le32(type);
2800 bss->bmc_wcid_lo = to_wcid_lo(wlan_idx);
2801 bss->bmc_wcid_hi = to_wcid_hi(wlan_idx);
2802 bss->wmm_idx = mvif->wmm_idx;
2803 bss->active = enable;
2804 bss->cipher = mvif->cipher;
2805
2806 if (vif->type != NL80211_IFTYPE_MONITOR) {
2807 struct cfg80211_chan_def *chandef = &phy->chandef;
2808
2809 memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN);
2810 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int);
2811 bss->dtim_period = vif->bss_conf.dtim_period;
2812 bss->phy_mode = mt76_connac_get_phy_mode(phy, vif,
2813 chandef->chan->band, NULL);
2814 } else {
2815 memcpy(bss->bssid, phy->macaddr, ETH_ALEN);
2816 }
2817
2818 return 0;
2819}
2820EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_basic_tlv);
2821
2822#define ENTER_PM_STATE 1
2823#define EXIT_PM_STATE 2
2824int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter)
2825{
2826 struct {
2827 u8 pm_number;
2828 u8 pm_state;
2829 u8 bssid[ETH_ALEN];
2830 u8 dtim_period;
2831 u8 wlan_idx_lo;
2832 __le16 bcn_interval;
2833 __le32 aid;
2834 __le32 rx_filter;
2835 u8 band_idx;
2836 u8 wlan_idx_hi;
2837 u8 rsv[2];
2838 __le32 feature;
2839 u8 omac_idx;
2840 u8 wmm_idx;
2841 u8 bcn_loss_cnt;
2842 u8 bcn_sp_duration;
2843 } __packed req = {
2844 .pm_number = 5,
2845 .pm_state = enter ? ENTER_PM_STATE : EXIT_PM_STATE,
2846 .band_idx = band,
2847 };
2848
2849 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(PM_STATE_CTRL), &req,
2850 sizeof(req), true);
2851}
2852EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_pm);
2853
2854int mt76_connac_mcu_restart(struct mt76_dev *dev)
2855{
2856 struct {
2857 u8 power_mode;
2858 u8 rsv[3];
2859 } req = {
2860 .power_mode = 1,
2861 };
2862
2863 return mt76_mcu_send_msg(dev, MCU_CMD(NIC_POWER_CTRL), &req,
2864 sizeof(req), false);
2865}
2866EXPORT_SYMBOL_GPL(mt76_connac_mcu_restart);
2867
2868int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index,
2869 u8 rx_sel, u8 val)
2870{
2871 struct {
2872 u8 ctrl;
2873 u8 rdd_idx;
2874 u8 rdd_rx_sel;
2875 u8 val;
2876 u8 rsv[4];
2877 } __packed req = {
2878 .ctrl = cmd,
2879 .rdd_idx = index,
2880 .rdd_rx_sel = rx_sel,
2881 .val = val,
2882 };
2883
2884 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(SET_RDD_CTRL), &req,
2885 sizeof(req), true);
2886}
2887EXPORT_SYMBOL_GPL(mt76_connac_mcu_rdd_cmd);
2888
2889static int
2890mt76_connac_mcu_send_ram_firmware(struct mt76_dev *dev,
2891 const struct mt76_connac2_fw_trailer *hdr,
2892 const u8 *data, bool is_wa)
2893{
2894 int i, offset = 0, max_len = mt76_is_sdio(dev) ? 2048 : 4096;
2895 u32 override = 0, option = 0;
2896
2897 for (i = 0; i < hdr->n_region; i++) {
2898 const struct mt76_connac2_fw_region *region;
2899 u32 len, addr, mode;
2900 int err;
2901
2902 region = (const void *)((const u8 *)hdr -
2903 (hdr->n_region - i) * sizeof(*region));
2904 mode = mt76_connac_mcu_gen_dl_mode(dev, region->feature_set,
2905 is_wa);
2906 len = le32_to_cpu(region->len);
2907 addr = le32_to_cpu(region->addr);
2908
2909 if (region->feature_set & FW_FEATURE_NON_DL)
2910 goto next;
2911
2912 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR)
2913 override = addr;
2914
2915 err = mt76_connac_mcu_init_download(dev, addr, len, mode);
2916 if (err) {
2917 dev_err(dev->dev, "Download request failed\n");
2918 return err;
2919 }
2920
2921 err = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER),
2922 data + offset, len, max_len);
2923 if (err) {
2924 dev_err(dev->dev, "Failed to send firmware.\n");
2925 return err;
2926 }
2927
2928next:
2929 offset += len;
2930 }
2931
2932 if (override)
2933 option |= FW_START_OVERRIDE;
2934 if (is_wa)
2935 option |= FW_START_WORKING_PDA_CR4;
2936
2937 return mt76_connac_mcu_start_firmware(dev, override, option);
2938}
2939
2940int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm,
2941 const char *fw_wa)
2942{
2943 const struct mt76_connac2_fw_trailer *hdr;
2944 const struct firmware *fw;
2945 int ret;
2946
2947 ret = request_firmware(&fw, fw_wm, dev->dev);
2948 if (ret)
2949 return ret;
2950
2951 if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2952 dev_err(dev->dev, "Invalid firmware\n");
2953 ret = -EINVAL;
2954 goto out;
2955 }
2956
2957 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
2958 dev_info(dev->dev, "WM Firmware Version: %.10s, Build Time: %.15s\n",
2959 hdr->fw_ver, hdr->build_date);
2960
2961 ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, false);
2962 if (ret) {
2963 dev_err(dev->dev, "Failed to start WM firmware\n");
2964 goto out;
2965 }
2966
2967 snprintf(dev->hw->wiphy->fw_version,
2968 sizeof(dev->hw->wiphy->fw_version),
2969 "%.10s-%.15s", hdr->fw_ver, hdr->build_date);
2970
2971 release_firmware(fw);
2972
2973 if (!fw_wa)
2974 return 0;
2975
2976 ret = request_firmware(&fw, fw_wa, dev->dev);
2977 if (ret)
2978 return ret;
2979
2980 if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
2981 dev_err(dev->dev, "Invalid firmware\n");
2982 ret = -EINVAL;
2983 goto out;
2984 }
2985
2986 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
2987 dev_info(dev->dev, "WA Firmware Version: %.10s, Build Time: %.15s\n",
2988 hdr->fw_ver, hdr->build_date);
2989
2990 ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, true);
2991 if (ret) {
2992 dev_err(dev->dev, "Failed to start WA firmware\n");
2993 goto out;
2994 }
2995
2996 snprintf(dev->hw->wiphy->fw_version,
2997 sizeof(dev->hw->wiphy->fw_version),
2998 "%.10s-%.15s", hdr->fw_ver, hdr->build_date);
2999
3000out:
3001 release_firmware(fw);
3002
3003 return ret;
3004}
3005EXPORT_SYMBOL_GPL(mt76_connac2_load_ram);
3006
3007static u32 mt76_connac2_get_data_mode(struct mt76_dev *dev, u32 info)
3008{
3009 u32 mode = DL_MODE_NEED_RSP;
3010
3011 if (!is_mt7921(dev) || info == PATCH_SEC_NOT_SUPPORT)
3012 return mode;
3013
3014 switch (FIELD_GET(PATCH_SEC_ENC_TYPE_MASK, info)) {
3015 case PATCH_SEC_ENC_TYPE_PLAIN:
3016 break;
3017 case PATCH_SEC_ENC_TYPE_AES:
3018 mode |= DL_MODE_ENCRYPT;
3019 mode |= FIELD_PREP(DL_MODE_KEY_IDX,
3020 (info & PATCH_SEC_ENC_AES_KEY_MASK)) & DL_MODE_KEY_IDX;
3021 mode |= DL_MODE_RESET_SEC_IV;
3022 break;
3023 case PATCH_SEC_ENC_TYPE_SCRAMBLE:
3024 mode |= DL_MODE_ENCRYPT;
3025 mode |= DL_CONFIG_ENCRY_MODE_SEL;
3026 mode |= DL_MODE_RESET_SEC_IV;
3027 break;
3028 default:
3029 dev_err(dev->dev, "Encryption type not support!\n");
3030 }
3031
3032 return mode;
3033}
3034
3035int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name)
3036{
3037 int i, ret, sem, max_len = mt76_is_sdio(dev) ? 2048 : 4096;
3038 const struct mt76_connac2_patch_hdr *hdr;
3039 const struct firmware *fw = NULL;
3040
3041 sem = mt76_connac_mcu_patch_sem_ctrl(dev, true);
3042 switch (sem) {
3043 case PATCH_IS_DL:
3044 return 0;
3045 case PATCH_NOT_DL_SEM_SUCCESS:
3046 break;
3047 default:
3048 dev_err(dev->dev, "Failed to get patch semaphore\n");
3049 return -EAGAIN;
3050 }
3051
3052 ret = request_firmware(&fw, fw_name, dev->dev);
3053 if (ret)
3054 goto out;
3055
3056 if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
3057 dev_err(dev->dev, "Invalid firmware\n");
3058 ret = -EINVAL;
3059 goto out;
3060 }
3061
3062 hdr = (const void *)fw->data;
3063 dev_info(dev->dev, "HW/SW Version: 0x%x, Build Time: %.16s\n",
3064 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date);
3065
3066 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) {
3067 struct mt76_connac2_patch_sec *sec;
3068 u32 len, addr, mode;
3069 const u8 *dl;
3070 u32 sec_info;
3071
3072 sec = (void *)(fw->data + sizeof(*hdr) + i * sizeof(*sec));
3073 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) !=
3074 PATCH_SEC_TYPE_INFO) {
3075 ret = -EINVAL;
3076 goto out;
3077 }
3078
3079 addr = be32_to_cpu(sec->info.addr);
3080 len = be32_to_cpu(sec->info.len);
3081 dl = fw->data + be32_to_cpu(sec->offs);
3082 sec_info = be32_to_cpu(sec->info.sec_key_idx);
3083 mode = mt76_connac2_get_data_mode(dev, sec_info);
3084
3085 ret = mt76_connac_mcu_init_download(dev, addr, len, mode);
3086 if (ret) {
3087 dev_err(dev->dev, "Download request failed\n");
3088 goto out;
3089 }
3090
3091 ret = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER),
3092 dl, len, max_len);
3093 if (ret) {
3094 dev_err(dev->dev, "Failed to send patch\n");
3095 goto out;
3096 }
3097 }
3098
3099 ret = mt76_connac_mcu_start_patch(dev);
3100 if (ret)
3101 dev_err(dev->dev, "Failed to start patch\n");
3102
3103out:
3104 sem = mt76_connac_mcu_patch_sem_ctrl(dev, false);
3105 switch (sem) {
3106 case PATCH_REL_SEM_SUCCESS:
3107 break;
3108 default:
3109 ret = -EAGAIN;
3110 dev_err(dev->dev, "Failed to release patch semaphore\n");
3111 break;
3112 }
3113
3114 release_firmware(fw);
3115
3116 return ret;
3117}
3118EXPORT_SYMBOL_GPL(mt76_connac2_load_patch);
3119
3120int mt76_connac2_mcu_fill_message(struct mt76_dev *dev, struct sk_buff *skb,
3121 int cmd, int *wait_seq)
3122{
3123 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd);
3124 struct mt76_connac2_mcu_uni_txd *uni_txd;
3125 struct mt76_connac2_mcu_txd *mcu_txd;
3126 __le32 *txd;
3127 u32 val;
3128 u8 seq;
3129
3130 /* TODO: make dynamic based on msg type */
3131 dev->mcu.timeout = 20 * HZ;
3132
3133 seq = ++dev->mcu.msg_seq & 0xf;
3134 if (!seq)
3135 seq = ++dev->mcu.msg_seq & 0xf;
3136
3137 if (cmd == MCU_CMD(FW_SCATTER))
3138 goto exit;
3139
3140 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd);
3141 txd = (__le32 *)skb_push(skb, txd_len);
3142
3143 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) |
3144 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) |
3145 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0);
3146 txd[0] = cpu_to_le32(val);
3147
3148 val = MT_TXD1_LONG_FORMAT |
3149 FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD);
3150 txd[1] = cpu_to_le32(val);
3151
3152 if (cmd & __MCU_CMD_FIELD_UNI) {
3153 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd;
3154 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd));
3155 uni_txd->option = MCU_CMD_UNI_EXT_ACK;
3156 uni_txd->cid = cpu_to_le16(mcu_cmd);
3157 uni_txd->s2d_index = MCU_S2D_H2N;
3158 uni_txd->pkt_type = MCU_PKT_ID;
3159 uni_txd->seq = seq;
3160
3161 goto exit;
3162 }
3163
3164 mcu_txd = (struct mt76_connac2_mcu_txd *)txd;
3165 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd));
3166 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU,
3167 MT_TX_MCU_PORT_RX_Q0));
3168 mcu_txd->pkt_type = MCU_PKT_ID;
3169 mcu_txd->seq = seq;
3170 mcu_txd->cid = mcu_cmd;
3171 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd);
3172
3173 if (mcu_txd->ext_cid || (cmd & __MCU_CMD_FIELD_CE)) {
3174 if (cmd & __MCU_CMD_FIELD_QUERY)
3175 mcu_txd->set_query = MCU_Q_QUERY;
3176 else
3177 mcu_txd->set_query = MCU_Q_SET;
3178 mcu_txd->ext_cid_ack = !!mcu_txd->ext_cid;
3179 } else {
3180 mcu_txd->set_query = MCU_Q_NA;
3181 }
3182
3183 if (cmd & __MCU_CMD_FIELD_WA)
3184 mcu_txd->s2d_index = MCU_S2D_H2C;
3185 else
3186 mcu_txd->s2d_index = MCU_S2D_H2N;
3187
3188exit:
3189 if (wait_seq)
3190 *wait_seq = seq;
3191
3192 return 0;
3193}
3194EXPORT_SYMBOL_GPL(mt76_connac2_mcu_fill_message);
3195
3196MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
3197MODULE_LICENSE("Dual BSD/GPL");