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1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2/*
3 * Copyright (C) 2015-2017 Intel Deutschland GmbH
4 * Copyright (C) 2018-2023 Intel Corporation
5 */
6#include <linux/module.h>
7#include <linux/stringify.h>
8#include "iwl-config.h"
9#include "iwl-prph.h"
10#include "fw/api/txq.h"
11
12/* Highest firmware API version supported */
13#define IWL_AX210_UCODE_API_MAX 86
14
15/* Lowest firmware API version supported */
16#define IWL_AX210_UCODE_API_MIN 59
17
18/* NVM versions */
19#define IWL_AX210_NVM_VERSION 0x0a1d
20
21/* Memory offsets and lengths */
22#define IWL_AX210_DCCM_OFFSET 0x800000 /* LMAC1 */
23#define IWL_AX210_DCCM_LEN 0x10000 /* LMAC1 */
24#define IWL_AX210_DCCM2_OFFSET 0x880000
25#define IWL_AX210_DCCM2_LEN 0x8000
26#define IWL_AX210_SMEM_OFFSET 0x400000
27#define IWL_AX210_SMEM_LEN 0xD0000
28
29#define IWL_SO_A_JF_B_FW_PRE "iwlwifi-so-a0-jf-b0"
30#define IWL_SO_A_HR_B_FW_PRE "iwlwifi-so-a0-hr-b0"
31#define IWL_SO_A_GF_A_FW_PRE "iwlwifi-so-a0-gf-a0"
32#define IWL_TY_A_GF_A_FW_PRE "iwlwifi-ty-a0-gf-a0"
33#define IWL_SO_A_GF4_A_FW_PRE "iwlwifi-so-a0-gf4-a0"
34#define IWL_SO_A_MR_A_FW_PRE "iwlwifi-so-a0-mr-a0"
35#define IWL_MA_A_HR_B_FW_PRE "iwlwifi-ma-a0-hr-b0"
36#define IWL_MA_A_GF_A_FW_PRE "iwlwifi-ma-a0-gf-a0"
37#define IWL_MA_A_GF4_A_FW_PRE "iwlwifi-ma-a0-gf4-a0"
38#define IWL_MA_A_MR_A_FW_PRE "iwlwifi-ma-a0-mr-a0"
39#define IWL_MA_B_HR_B_FW_PRE "iwlwifi-ma-b0-hr-b0"
40#define IWL_MA_B_GF_A_FW_PRE "iwlwifi-ma-b0-gf-a0"
41#define IWL_MA_B_GF4_A_FW_PRE "iwlwifi-ma-b0-gf4-a0"
42#define IWL_MA_B_MR_A_FW_PRE "iwlwifi-ma-b0-mr-a0"
43
44#define IWL_SO_A_JF_B_MODULE_FIRMWARE(api) \
45 IWL_SO_A_JF_B_FW_PRE "-" __stringify(api) ".ucode"
46#define IWL_SO_A_HR_B_MODULE_FIRMWARE(api) \
47 IWL_SO_A_HR_B_FW_PRE "-" __stringify(api) ".ucode"
48#define IWL_SO_A_GF_A_MODULE_FIRMWARE(api) \
49 IWL_SO_A_GF_A_FW_PRE "-" __stringify(api) ".ucode"
50#define IWL_TY_A_GF_A_MODULE_FIRMWARE(api) \
51 IWL_TY_A_GF_A_FW_PRE "-" __stringify(api) ".ucode"
52#define IWL_MA_A_HR_B_FW_MODULE_FIRMWARE(api) \
53 IWL_MA_A_HR_B_FW_PRE "-" __stringify(api) ".ucode"
54#define IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(api) \
55 IWL_MA_A_GF_A_FW_PRE "-" __stringify(api) ".ucode"
56#define IWL_MA_A_GF4_A_FW_MODULE_FIRMWARE(api) \
57 IWL_MA_A_GF4_A_FW_PRE "-" __stringify(api) ".ucode"
58#define IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(api) \
59 IWL_MA_A_MR_A_FW_PRE "-" __stringify(api) ".ucode"
60#define IWL_MA_B_HR_B_FW_MODULE_FIRMWARE(api) \
61 IWL_MA_B_HR_B_FW_PRE "-" __stringify(api) ".ucode"
62#define IWL_MA_B_GF_A_FW_MODULE_FIRMWARE(api) \
63 IWL_MA_B_GF_A_FW_PRE "-" __stringify(api) ".ucode"
64#define IWL_MA_B_GF4_A_FW_MODULE_FIRMWARE(api) \
65 IWL_MA_B_GF4_A_FW_PRE "-" __stringify(api) ".ucode"
66#define IWL_MA_B_MR_A_FW_MODULE_FIRMWARE(api) \
67 IWL_MA_B_MR_A_FW_PRE "-" __stringify(api) ".ucode"
68
69static const struct iwl_base_params iwl_ax210_base_params = {
70 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K,
71 .num_of_queues = 512,
72 .max_tfd_queue_size = 65536,
73 .shadow_ram_support = true,
74 .led_compensation = 57,
75 .wd_timeout = IWL_LONG_WD_TIMEOUT,
76 .max_event_log_size = 512,
77 .shadow_reg_enable = true,
78 .pcie_l1_allowed = true,
79};
80
81#define IWL_DEVICE_AX210_COMMON \
82 .ucode_api_min = IWL_AX210_UCODE_API_MIN, \
83 .led_mode = IWL_LED_RF_STATE, \
84 .nvm_hw_section_num = 10, \
85 .non_shared_ant = ANT_B, \
86 .dccm_offset = IWL_AX210_DCCM_OFFSET, \
87 .dccm_len = IWL_AX210_DCCM_LEN, \
88 .dccm2_offset = IWL_AX210_DCCM2_OFFSET, \
89 .dccm2_len = IWL_AX210_DCCM2_LEN, \
90 .smem_offset = IWL_AX210_SMEM_OFFSET, \
91 .smem_len = IWL_AX210_SMEM_LEN, \
92 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \
93 .apmg_not_supported = true, \
94 .trans.mq_rx_supported = true, \
95 .vht_mu_mimo_supported = true, \
96 .mac_addr_from_csr = 0x380, \
97 .ht_params = &iwl_22000_ht_params, \
98 .nvm_ver = IWL_AX210_NVM_VERSION, \
99 .trans.rf_id = true, \
100 .trans.gen2 = true, \
101 .nvm_type = IWL_NVM_EXT, \
102 .dbgc_supported = true, \
103 .min_umac_error_event_table = 0x400000, \
104 .d3_debug_data_base_addr = 0x401000, \
105 .d3_debug_data_length = 60 * 1024, \
106 .mon_smem_regs = { \
107 .write_ptr = { \
108 .addr = LDBG_M2S_BUF_WPTR, \
109 .mask = LDBG_M2S_BUF_WPTR_VAL_MSK, \
110 }, \
111 .cycle_cnt = { \
112 .addr = LDBG_M2S_BUF_WRAP_CNT, \
113 .mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK, \
114 }, \
115 }
116
117#define IWL_DEVICE_AX210 \
118 IWL_DEVICE_AX210_COMMON, \
119 .ucode_api_max = IWL_AX210_UCODE_API_MAX, \
120 .trans.umac_prph_offset = 0x300000, \
121 .trans.device_family = IWL_DEVICE_FAMILY_AX210, \
122 .trans.base_params = &iwl_ax210_base_params, \
123 .min_txq_size = 128, \
124 .gp2_reg_addr = 0xd02c68, \
125 .min_ba_txq_size = IWL_DEFAULT_QUEUE_SIZE_HE, \
126 .mon_dram_regs = { \
127 .write_ptr = { \
128 .addr = DBGC_CUR_DBGBUF_STATUS, \
129 .mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK, \
130 }, \
131 .cycle_cnt = { \
132 .addr = DBGC_DBGBUF_WRAP_AROUND, \
133 .mask = 0xffffffff, \
134 }, \
135 .cur_frag = { \
136 .addr = DBGC_CUR_DBGBUF_STATUS, \
137 .mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK, \
138 }, \
139 }
140
141const struct iwl_cfg_trans_params iwl_so_trans_cfg = {
142 .mq_rx_supported = true,
143 .rf_id = true,
144 .gen2 = true,
145 .device_family = IWL_DEVICE_FAMILY_AX210,
146 .base_params = &iwl_ax210_base_params,
147 .umac_prph_offset = 0x300000,
148 .integrated = true,
149 /* TODO: the following values need to be checked */
150 .xtal_latency = 500,
151 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US,
152};
153
154const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg = {
155 .mq_rx_supported = true,
156 .rf_id = true,
157 .gen2 = true,
158 .device_family = IWL_DEVICE_FAMILY_AX210,
159 .base_params = &iwl_ax210_base_params,
160 .umac_prph_offset = 0x300000,
161 .integrated = true,
162 .low_latency_xtal = true,
163 .xtal_latency = 12000,
164 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US,
165};
166
167const struct iwl_cfg_trans_params iwl_so_long_latency_imr_trans_cfg = {
168 .mq_rx_supported = true,
169 .rf_id = true,
170 .gen2 = true,
171 .device_family = IWL_DEVICE_FAMILY_AX210,
172 .base_params = &iwl_ax210_base_params,
173 .umac_prph_offset = 0x300000,
174 .integrated = true,
175 .low_latency_xtal = true,
176 .xtal_latency = 12000,
177 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US,
178 .imr_enabled = true,
179};
180
181/*
182 * If the device doesn't support HE, no need to have that many buffers.
183 * AX210 devices can split multiple frames into a single RB, so fewer are
184 * needed; AX210 cannot (but use smaller RBs by default) - these sizes
185 * were picked according to 8 MSDUs inside 256 A-MSDUs in an A-MPDU, with
186 * additional overhead to account for processing time.
187 */
188#define IWL_NUM_RBDS_NON_HE 512
189#define IWL_NUM_RBDS_AX210_HE 4096
190
191const struct iwl_cfg_trans_params iwl_ma_trans_cfg = {
192 .device_family = IWL_DEVICE_FAMILY_AX210,
193 .base_params = &iwl_ax210_base_params,
194 .mq_rx_supported = true,
195 .rf_id = true,
196 .gen2 = true,
197 .integrated = true,
198 .umac_prph_offset = 0x300000
199};
200
201const char iwl_ax211_name[] = "Intel(R) Wi-Fi 6E AX211 160MHz";
202const char iwl_ax221_name[] = "Intel(R) Wi-Fi 6E AX221 160MHz";
203const char iwl_ax231_name[] = "Intel(R) Wi-Fi 6E AX231 160MHz";
204const char iwl_ax411_name[] = "Intel(R) Wi-Fi 6E AX411 160MHz";
205
206const char iwl_ax210_killer_1675w_name[] =
207 "Killer(R) Wi-Fi 6E AX1675w 160MHz Wireless Network Adapter (210D2W)";
208const char iwl_ax210_killer_1675x_name[] =
209 "Killer(R) Wi-Fi 6E AX1675x 160MHz Wireless Network Adapter (210NGW)";
210const char iwl_ax211_killer_1675s_name[] =
211 "Killer(R) Wi-Fi 6E AX1675s 160MHz Wireless Network Adapter (211NGW)";
212const char iwl_ax211_killer_1675i_name[] =
213 "Killer(R) Wi-Fi 6E AX1675i 160MHz Wireless Network Adapter (211NGW)";
214const char iwl_ax411_killer_1690s_name[] =
215 "Killer(R) Wi-Fi 6E AX1690s 160MHz Wireless Network Adapter (411D2W)";
216const char iwl_ax411_killer_1690i_name[] =
217 "Killer(R) Wi-Fi 6E AX1690i 160MHz Wireless Network Adapter (411NGW)";
218
219const struct iwl_cfg iwlax210_2ax_cfg_so_jf_b0 = {
220 .name = "Intel(R) Wireless-AC 9560 160MHz",
221 .fw_name_pre = IWL_SO_A_JF_B_FW_PRE,
222 IWL_DEVICE_AX210,
223 .num_rbds = IWL_NUM_RBDS_NON_HE,
224};
225
226const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0 = {
227 .name = iwl_ax211_name,
228 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE,
229 .uhb_supported = true,
230 IWL_DEVICE_AX210,
231 .num_rbds = IWL_NUM_RBDS_AX210_HE,
232};
233
234const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0_long = {
235 .name = iwl_ax211_name,
236 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE,
237 .uhb_supported = true,
238 IWL_DEVICE_AX210,
239 .num_rbds = IWL_NUM_RBDS_AX210_HE,
240 .trans.xtal_latency = 12000,
241 .trans.low_latency_xtal = true,
242};
243
244const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0 = {
245 .name = "Intel(R) Wi-Fi 6 AX210 160MHz",
246 .fw_name_pre = IWL_TY_A_GF_A_FW_PRE,
247 .uhb_supported = true,
248 IWL_DEVICE_AX210,
249 .num_rbds = IWL_NUM_RBDS_AX210_HE,
250};
251
252const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0 = {
253 .name = iwl_ax411_name,
254 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE,
255 .uhb_supported = true,
256 IWL_DEVICE_AX210,
257 .num_rbds = IWL_NUM_RBDS_AX210_HE,
258};
259
260const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long = {
261 .name = iwl_ax411_name,
262 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE,
263 .uhb_supported = true,
264 IWL_DEVICE_AX210,
265 .num_rbds = IWL_NUM_RBDS_AX210_HE,
266 .trans.xtal_latency = 12000,
267 .trans.low_latency_xtal = true,
268};
269
270const struct iwl_cfg iwl_cfg_so_a0_ms_a0 = {
271 .fw_name_pre = IWL_SO_A_MR_A_FW_PRE,
272 .uhb_supported = false,
273 IWL_DEVICE_AX210,
274 .num_rbds = IWL_NUM_RBDS_AX210_HE,
275};
276
277const struct iwl_cfg iwl_cfg_ma = {
278 .fw_name_mac = "ma",
279 .uhb_supported = true,
280 IWL_DEVICE_AX210,
281 .num_rbds = IWL_NUM_RBDS_AX210_HE,
282};
283
284const struct iwl_cfg iwl_cfg_so_a0_hr_a0 = {
285 .fw_name_pre = IWL_SO_A_HR_B_FW_PRE,
286 IWL_DEVICE_AX210,
287 .num_rbds = IWL_NUM_RBDS_AX210_HE,
288};
289
290MODULE_FIRMWARE(IWL_SO_A_JF_B_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
291MODULE_FIRMWARE(IWL_SO_A_HR_B_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
292MODULE_FIRMWARE(IWL_SO_A_GF_A_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
293MODULE_FIRMWARE(IWL_TY_A_GF_A_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
294MODULE_FIRMWARE(IWL_MA_A_HR_B_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
295MODULE_FIRMWARE(IWL_MA_A_GF_A_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
296MODULE_FIRMWARE(IWL_MA_A_GF4_A_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
297MODULE_FIRMWARE(IWL_MA_A_MR_A_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
298MODULE_FIRMWARE(IWL_MA_B_HR_B_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
299MODULE_FIRMWARE(IWL_MA_B_GF_A_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
300MODULE_FIRMWARE(IWL_MA_B_GF4_A_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));
301MODULE_FIRMWARE(IWL_MA_B_MR_A_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX));