1/* SPDX-License-Identifier: GPL-2.0 */
 2/* Copyright(c) 2013 - 2018 Intel Corporation. */
 3
 4#ifndef _IAVF_OSDEP_H_
 5#define _IAVF_OSDEP_H_
 6
 7#include <linux/types.h>
 8#include <linux/if_ether.h>
 9#include <linux/if_vlan.h>
10#include <linux/tcp.h>
11#include <linux/pci.h>
12
13/* get readq/writeq support for 32 bit kernels, use the low-first version */
14#include <linux/io-64-nonatomic-lo-hi.h>
15
 
 
 
 
 
 
16#define wr32(a, reg, value)	writel((value), ((a)->hw_addr + (reg)))
17#define rd32(a, reg)		readl((a)->hw_addr + (reg))
18
19#define wr64(a, reg, value)	writeq((value), ((a)->hw_addr + (reg)))
20#define rd64(a, reg)		readq((a)->hw_addr + (reg))
21#define iavf_flush(a)		readl((a)->hw_addr + IAVF_VFGEN_RSTAT)
22
23/* memory allocation tracking */
24struct iavf_dma_mem {
25	void *va;
26	dma_addr_t pa;
27	u32 size;
28};
29
30#define iavf_allocate_dma_mem(h, m, unused, s, a) \
31	iavf_allocate_dma_mem_d(h, m, s, a)
 
32
33struct iavf_virt_mem {
34	void *va;
35	u32 size;
36};
 
 
37
38#define iavf_debug(h, m, s, ...)				\
39do {								\
40	if (((m) & (h)->debug_mask))				\
41		pr_info("iavf %02x:%02x.%x " s,			\
42			(h)->bus.bus_id, (h)->bus.device,	\
43			(h)->bus.func, ##__VA_ARGS__);		\
44} while (0)
45
46#endif /* _IAVF_OSDEP_H_ */

 1/* SPDX-License-Identifier: GPL-2.0 */
 2/* Copyright(c) 2013 - 2018 Intel Corporation. */
 3
 4#ifndef _IAVF_OSDEP_H_
 5#define _IAVF_OSDEP_H_
 6
 7#include <linux/types.h>
 8#include <linux/if_ether.h>
 9#include <linux/if_vlan.h>
10#include <linux/tcp.h>
11#include <linux/pci.h>
12
13/* get readq/writeq support for 32 bit kernels, use the low-first version */
14#include <linux/io-64-nonatomic-lo-hi.h>
15
16/* File to be the magic between shared code and
17 * actual OS primitives
18 */
19
20#define hw_dbg(hw, S, A...)	do {} while (0)
21
22#define wr32(a, reg, value)	writel((value), ((a)->hw_addr + (reg)))
23#define rd32(a, reg)		readl((a)->hw_addr + (reg))
24
25#define wr64(a, reg, value)	writeq((value), ((a)->hw_addr + (reg)))
26#define rd64(a, reg)		readq((a)->hw_addr + (reg))
27#define iavf_flush(a)		readl((a)->hw_addr + IAVF_VFGEN_RSTAT)
28
29/* memory allocation tracking */
30struct iavf_dma_mem {
31	void *va;
32	dma_addr_t pa;
33	u32 size;
34};
35
36#define iavf_allocate_dma_mem(h, m, unused, s, a) \
37	iavf_allocate_dma_mem_d(h, m, s, a)
38#define iavf_free_dma_mem(h, m) iavf_free_dma_mem_d(h, m)
39
40struct iavf_virt_mem {
41	void *va;
42	u32 size;
43};
44#define iavf_allocate_virt_mem(h, m, s) iavf_allocate_virt_mem_d(h, m, s)
45#define iavf_free_virt_mem(h, m) iavf_free_virt_mem_d(h, m)
46
47#define iavf_debug(h, m, s, ...)				\
48do {								\
49	if (((m) & (h)->debug_mask))				\
50		pr_info("iavf %02x:%02x.%x " s,			\
51			(h)->bus.bus_id, (h)->bus.device,	\
52			(h)->bus.func, ##__VA_ARGS__);		\
53} while (0)
54
55#endif /* _IAVF_OSDEP_H_ */