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1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef __BCM47XXSFLASH_H
3#define __BCM47XXSFLASH_H
4
5#include <linux/mtd/mtd.h>
6
7#define BCM47XXSFLASH_WINDOW_SZ SZ_16M
8
9/* Used for ST flashes only. */
10#define OPCODE_ST_WREN 0x0006 /* Write Enable */
11#define OPCODE_ST_WRDIS 0x0004 /* Write Disable */
12#define OPCODE_ST_RDSR 0x0105 /* Read Status Register */
13#define OPCODE_ST_WRSR 0x0101 /* Write Status Register */
14#define OPCODE_ST_READ 0x0303 /* Read Data Bytes */
15#define OPCODE_ST_PP 0x0302 /* Page Program */
16#define OPCODE_ST_SE 0x02d8 /* Sector Erase */
17#define OPCODE_ST_BE 0x00c7 /* Bulk Erase */
18#define OPCODE_ST_DP 0x00b9 /* Deep Power-down */
19#define OPCODE_ST_RES 0x03ab /* Read Electronic Signature */
20#define OPCODE_ST_CSA 0x1000 /* Keep chip select asserted */
21#define OPCODE_ST_SSE 0x0220 /* Sub-sector Erase */
22#define OPCODE_ST_READ4B 0x6313 /* Read Data Bytes in 4Byte addressing mode */
23
24/* Used for Atmel flashes only. */
25#define OPCODE_AT_READ 0x07e8
26#define OPCODE_AT_PAGE_READ 0x07d2
27#define OPCODE_AT_STATUS 0x01d7
28#define OPCODE_AT_BUF1_WRITE 0x0384
29#define OPCODE_AT_BUF2_WRITE 0x0387
30#define OPCODE_AT_BUF1_ERASE_PROGRAM 0x0283
31#define OPCODE_AT_BUF2_ERASE_PROGRAM 0x0286
32#define OPCODE_AT_BUF1_PROGRAM 0x0288
33#define OPCODE_AT_BUF2_PROGRAM 0x0289
34#define OPCODE_AT_PAGE_ERASE 0x0281
35#define OPCODE_AT_BLOCK_ERASE 0x0250
36#define OPCODE_AT_BUF1_WRITE_ERASE_PROGRAM 0x0382
37#define OPCODE_AT_BUF2_WRITE_ERASE_PROGRAM 0x0385
38#define OPCODE_AT_BUF1_LOAD 0x0253
39#define OPCODE_AT_BUF2_LOAD 0x0255
40#define OPCODE_AT_BUF1_COMPARE 0x0260
41#define OPCODE_AT_BUF2_COMPARE 0x0261
42#define OPCODE_AT_BUF1_REPROGRAM 0x0258
43#define OPCODE_AT_BUF2_REPROGRAM 0x0259
44
45/* Status register bits for ST flashes */
46#define SR_ST_WIP 0x01 /* Write In Progress */
47#define SR_ST_WEL 0x02 /* Write Enable Latch */
48#define SR_ST_BP_MASK 0x1c /* Block Protect */
49#define SR_ST_BP_SHIFT 2
50#define SR_ST_SRWD 0x80 /* Status Register Write Disable */
51
52/* Status register bits for Atmel flashes */
53#define SR_AT_READY 0x80
54#define SR_AT_MISMATCH 0x40
55#define SR_AT_ID_MASK 0x38
56#define SR_AT_ID_SHIFT 3
57
58struct bcma_drv_cc;
59
60enum bcm47xxsflash_type {
61 BCM47XXSFLASH_TYPE_ATMEL,
62 BCM47XXSFLASH_TYPE_ST,
63};
64
65struct bcm47xxsflash {
66 struct bcma_drv_cc *bcma_cc;
67 int (*cc_read)(struct bcm47xxsflash *b47s, u16 offset);
68 void (*cc_write)(struct bcm47xxsflash *b47s, u16 offset, u32 value);
69
70 enum bcm47xxsflash_type type;
71
72 void __iomem *window;
73
74 u32 blocksize;
75 u16 numblocks;
76 u32 size;
77
78 struct mtd_info mtd;
79};
80
81#endif /* BCM47XXSFLASH */
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef __BCM47XXSFLASH_H
3#define __BCM47XXSFLASH_H
4
5#include <linux/mtd/mtd.h>
6
7#define BCM47XXSFLASH_WINDOW_SZ SZ_16M
8
9/* Used for ST flashes only. */
10#define OPCODE_ST_WREN 0x0006 /* Write Enable */
11#define OPCODE_ST_WRDIS 0x0004 /* Write Disable */
12#define OPCODE_ST_RDSR 0x0105 /* Read Status Register */
13#define OPCODE_ST_WRSR 0x0101 /* Write Status Register */
14#define OPCODE_ST_READ 0x0303 /* Read Data Bytes */
15#define OPCODE_ST_PP 0x0302 /* Page Program */
16#define OPCODE_ST_SE 0x02d8 /* Sector Erase */
17#define OPCODE_ST_BE 0x00c7 /* Bulk Erase */
18#define OPCODE_ST_DP 0x00b9 /* Deep Power-down */
19#define OPCODE_ST_RES 0x03ab /* Read Electronic Signature */
20#define OPCODE_ST_CSA 0x1000 /* Keep chip select asserted */
21#define OPCODE_ST_SSE 0x0220 /* Sub-sector Erase */
22#define OPCODE_ST_READ4B 0x6313 /* Read Data Bytes in 4Byte addressing mode */
23
24/* Used for Atmel flashes only. */
25#define OPCODE_AT_READ 0x07e8
26#define OPCODE_AT_PAGE_READ 0x07d2
27#define OPCODE_AT_STATUS 0x01d7
28#define OPCODE_AT_BUF1_WRITE 0x0384
29#define OPCODE_AT_BUF2_WRITE 0x0387
30#define OPCODE_AT_BUF1_ERASE_PROGRAM 0x0283
31#define OPCODE_AT_BUF2_ERASE_PROGRAM 0x0286
32#define OPCODE_AT_BUF1_PROGRAM 0x0288
33#define OPCODE_AT_BUF2_PROGRAM 0x0289
34#define OPCODE_AT_PAGE_ERASE 0x0281
35#define OPCODE_AT_BLOCK_ERASE 0x0250
36#define OPCODE_AT_BUF1_WRITE_ERASE_PROGRAM 0x0382
37#define OPCODE_AT_BUF2_WRITE_ERASE_PROGRAM 0x0385
38#define OPCODE_AT_BUF1_LOAD 0x0253
39#define OPCODE_AT_BUF2_LOAD 0x0255
40#define OPCODE_AT_BUF1_COMPARE 0x0260
41#define OPCODE_AT_BUF2_COMPARE 0x0261
42#define OPCODE_AT_BUF1_REPROGRAM 0x0258
43#define OPCODE_AT_BUF2_REPROGRAM 0x0259
44
45/* Status register bits for ST flashes */
46#define SR_ST_WIP 0x01 /* Write In Progress */
47#define SR_ST_WEL 0x02 /* Write Enable Latch */
48#define SR_ST_BP_MASK 0x1c /* Block Protect */
49#define SR_ST_BP_SHIFT 2
50#define SR_ST_SRWD 0x80 /* Status Register Write Disable */
51
52/* Status register bits for Atmel flashes */
53#define SR_AT_READY 0x80
54#define SR_AT_MISMATCH 0x40
55#define SR_AT_ID_MASK 0x38
56#define SR_AT_ID_SHIFT 3
57
58struct bcma_drv_cc;
59
60enum bcm47xxsflash_type {
61 BCM47XXSFLASH_TYPE_ATMEL,
62 BCM47XXSFLASH_TYPE_ST,
63};
64
65struct bcm47xxsflash {
66 struct bcma_drv_cc *bcma_cc;
67 int (*cc_read)(struct bcm47xxsflash *b47s, u16 offset);
68 void (*cc_write)(struct bcm47xxsflash *b47s, u16 offset, u32 value);
69
70 enum bcm47xxsflash_type type;
71
72 void __iomem *window;
73
74 u32 blocksize;
75 u16 numblocks;
76 u32 size;
77
78 struct mtd_info mtd;
79};
80
81#endif /* BCM47XXSFLASH */