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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at24.c - handle most I2C EEPROMs
4 *
5 * Copyright (C) 2005-2007 David Brownell
6 * Copyright (C) 2008 Wolfram Sang, Pengutronix
7 */
8
9#include <linux/acpi.h>
10#include <linux/bitops.h>
11#include <linux/capability.h>
12#include <linux/delay.h>
13#include <linux/i2c.h>
14#include <linux/init.h>
15#include <linux/jiffies.h>
16#include <linux/kernel.h>
17#include <linux/mod_devicetable.h>
18#include <linux/module.h>
19#include <linux/mutex.h>
20#include <linux/nvmem-provider.h>
21#include <linux/of.h>
22#include <linux/of_device.h>
23#include <linux/pm_runtime.h>
24#include <linux/property.h>
25#include <linux/regmap.h>
26#include <linux/regulator/consumer.h>
27#include <linux/slab.h>
28
29/* Address pointer is 16 bit. */
30#define AT24_FLAG_ADDR16 BIT(7)
31/* sysfs-entry will be read-only. */
32#define AT24_FLAG_READONLY BIT(6)
33/* sysfs-entry will be world-readable. */
34#define AT24_FLAG_IRUGO BIT(5)
35/* Take always 8 addresses (24c00). */
36#define AT24_FLAG_TAKE8ADDR BIT(4)
37/* Factory-programmed serial number. */
38#define AT24_FLAG_SERIAL BIT(3)
39/* Factory-programmed mac address. */
40#define AT24_FLAG_MAC BIT(2)
41/* Does not auto-rollover reads to the next slave address. */
42#define AT24_FLAG_NO_RDROL BIT(1)
43
44/*
45 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
46 * Differences between different vendor product lines (like Atmel AT24C or
47 * MicroChip 24LC, etc) won't much matter for typical read/write access.
48 * There are also I2C RAM chips, likewise interchangeable. One example
49 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
50 *
51 * However, misconfiguration can lose data. "Set 16-bit memory address"
52 * to a part with 8-bit addressing will overwrite data. Writing with too
53 * big a page size also loses data. And it's not safe to assume that the
54 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
55 * uses 0x51, for just one example.
56 *
57 * Accordingly, explicit board-specific configuration data should be used
58 * in almost all cases. (One partial exception is an SMBus used to access
59 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
60 *
61 * So this driver uses "new style" I2C driver binding, expecting to be
62 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
63 * similar kernel-resident tables; or, configuration data coming from
64 * a bootloader.
65 *
66 * Other than binding model, current differences from "eeprom" driver are
67 * that this one handles write access and isn't restricted to 24c02 devices.
68 * It also handles larger devices (32 kbit and up) with two-byte addresses,
69 * which won't work on pure SMBus systems.
70 */
71
72struct at24_data {
73 /*
74 * Lock protects against activities from other Linux tasks,
75 * but not from changes by other I2C masters.
76 */
77 struct mutex lock;
78
79 unsigned int write_max;
80 unsigned int num_addresses;
81 unsigned int offset_adj;
82
83 u32 byte_len;
84 u16 page_size;
85 u8 flags;
86
87 struct nvmem_device *nvmem;
88 struct regulator *vcc_reg;
89 void (*read_post)(unsigned int off, char *buf, size_t count);
90
91 /*
92 * Some chips tie up multiple I2C addresses; dummy devices reserve
93 * them for us.
94 */
95 u8 bank_addr_shift;
96 struct regmap *client_regmaps[] __counted_by(num_addresses);
97};
98
99/*
100 * This parameter is to help this driver avoid blocking other drivers out
101 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
102 * clock, one 256 byte read takes about 1/43 second which is excessive;
103 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
104 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
105 *
106 * This value is forced to be a power of two so that writes align on pages.
107 */
108static unsigned int at24_io_limit = 128;
109module_param_named(io_limit, at24_io_limit, uint, 0);
110MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
111
112/*
113 * Specs often allow 5 msec for a page write, sometimes 20 msec;
114 * it's important to recover from write timeouts.
115 */
116static unsigned int at24_write_timeout = 25;
117module_param_named(write_timeout, at24_write_timeout, uint, 0);
118MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
119
120struct at24_chip_data {
121 u32 byte_len;
122 u8 flags;
123 u8 bank_addr_shift;
124 void (*read_post)(unsigned int off, char *buf, size_t count);
125};
126
127#define AT24_CHIP_DATA(_name, _len, _flags) \
128 static const struct at24_chip_data _name = { \
129 .byte_len = _len, .flags = _flags, \
130 }
131
132#define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \
133 static const struct at24_chip_data _name = { \
134 .byte_len = _len, .flags = _flags, \
135 .read_post = _read_post, \
136 }
137
138#define AT24_CHIP_DATA_BS(_name, _len, _flags, _bank_addr_shift) \
139 static const struct at24_chip_data _name = { \
140 .byte_len = _len, .flags = _flags, \
141 .bank_addr_shift = _bank_addr_shift \
142 }
143
144static void at24_read_post_vaio(unsigned int off, char *buf, size_t count)
145{
146 int i;
147
148 if (capable(CAP_SYS_ADMIN))
149 return;
150
151 /*
152 * Hide VAIO private settings to regular users:
153 * - BIOS passwords: bytes 0x00 to 0x0f
154 * - UUID: bytes 0x10 to 0x1f
155 * - Serial number: 0xc0 to 0xdf
156 */
157 for (i = 0; i < count; i++) {
158 if ((off + i <= 0x1f) ||
159 (off + i >= 0xc0 && off + i <= 0xdf))
160 buf[i] = 0;
161 }
162}
163
164/* needs 8 addresses as A0-A2 are ignored */
165AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
166/* old variants can't be handled with this generic entry! */
167AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
168AT24_CHIP_DATA(at24_data_24cs01, 16,
169 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
170AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
171AT24_CHIP_DATA(at24_data_24cs02, 16,
172 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
173AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
174 AT24_FLAG_MAC | AT24_FLAG_READONLY);
175AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
176 AT24_FLAG_MAC | AT24_FLAG_READONLY);
177/* spd is a 24c02 in memory DIMMs */
178AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
179 AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
180/* 24c02_vaio is a 24c02 on some Sony laptops */
181AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8,
182 AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
183 at24_read_post_vaio);
184AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
185AT24_CHIP_DATA(at24_data_24cs04, 16,
186 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
187/* 24rf08 quirk is handled at i2c-core */
188AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
189AT24_CHIP_DATA(at24_data_24cs08, 16,
190 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
191AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
192AT24_CHIP_DATA(at24_data_24cs16, 16,
193 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
194AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
195/* M24C32-D Additional Write lockable page (M24C32-D order codes) */
196AT24_CHIP_DATA(at24_data_24c32d_wlp, 32, AT24_FLAG_ADDR16);
197AT24_CHIP_DATA(at24_data_24cs32, 16,
198 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
199AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
200/* M24C64-D Additional Write lockable page (M24C64-D order codes) */
201AT24_CHIP_DATA(at24_data_24c64d_wlp, 32, AT24_FLAG_ADDR16);
202AT24_CHIP_DATA(at24_data_24cs64, 16,
203 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
204AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
205AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
206AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
207AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
208AT24_CHIP_DATA_BS(at24_data_24c1025, 1048576 / 8, AT24_FLAG_ADDR16, 2);
209AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
210/* identical to 24c08 ? */
211AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
212
213static const struct i2c_device_id at24_ids[] = {
214 { "24c00", (kernel_ulong_t)&at24_data_24c00 },
215 { "24c01", (kernel_ulong_t)&at24_data_24c01 },
216 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 },
217 { "24c02", (kernel_ulong_t)&at24_data_24c02 },
218 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
219 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 },
220 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 },
221 { "spd", (kernel_ulong_t)&at24_data_spd },
222 { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio },
223 { "24c04", (kernel_ulong_t)&at24_data_24c04 },
224 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 },
225 { "24c08", (kernel_ulong_t)&at24_data_24c08 },
226 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 },
227 { "24c16", (kernel_ulong_t)&at24_data_24c16 },
228 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 },
229 { "24c32", (kernel_ulong_t)&at24_data_24c32 },
230 { "24c32d-wl", (kernel_ulong_t)&at24_data_24c32d_wlp },
231 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 },
232 { "24c64", (kernel_ulong_t)&at24_data_24c64 },
233 { "24c64-wl", (kernel_ulong_t)&at24_data_24c64d_wlp },
234 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 },
235 { "24c128", (kernel_ulong_t)&at24_data_24c128 },
236 { "24c256", (kernel_ulong_t)&at24_data_24c256 },
237 { "24c512", (kernel_ulong_t)&at24_data_24c512 },
238 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 },
239 { "24c1025", (kernel_ulong_t)&at24_data_24c1025 },
240 { "24c2048", (kernel_ulong_t)&at24_data_24c2048 },
241 { "at24", 0 },
242 { /* END OF LIST */ }
243};
244MODULE_DEVICE_TABLE(i2c, at24_ids);
245
246static const struct of_device_id __maybe_unused at24_of_match[] = {
247 { .compatible = "atmel,24c00", .data = &at24_data_24c00 },
248 { .compatible = "atmel,24c01", .data = &at24_data_24c01 },
249 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 },
250 { .compatible = "atmel,24c02", .data = &at24_data_24c02 },
251 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 },
252 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 },
253 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 },
254 { .compatible = "atmel,spd", .data = &at24_data_spd },
255 { .compatible = "atmel,24c04", .data = &at24_data_24c04 },
256 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 },
257 { .compatible = "atmel,24c08", .data = &at24_data_24c08 },
258 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 },
259 { .compatible = "atmel,24c16", .data = &at24_data_24c16 },
260 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 },
261 { .compatible = "atmel,24c32", .data = &at24_data_24c32 },
262 { .compatible = "atmel,24c32d-wl", .data = &at24_data_24c32d_wlp },
263 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 },
264 { .compatible = "atmel,24c64", .data = &at24_data_24c64 },
265 { .compatible = "atmel,24c64d-wl", .data = &at24_data_24c64d_wlp },
266 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 },
267 { .compatible = "atmel,24c128", .data = &at24_data_24c128 },
268 { .compatible = "atmel,24c256", .data = &at24_data_24c256 },
269 { .compatible = "atmel,24c512", .data = &at24_data_24c512 },
270 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 },
271 { .compatible = "atmel,24c1025", .data = &at24_data_24c1025 },
272 { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 },
273 { /* END OF LIST */ },
274};
275MODULE_DEVICE_TABLE(of, at24_of_match);
276
277static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = {
278 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 },
279 { "TPF0001", (kernel_ulong_t)&at24_data_24c1024 },
280 { /* END OF LIST */ }
281};
282MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
283
284/*
285 * This routine supports chips which consume multiple I2C addresses. It
286 * computes the addressing information to be used for a given r/w request.
287 * Assumes that sanity checks for offset happened at sysfs-layer.
288 *
289 * Slave address and byte offset derive from the offset. Always
290 * set the byte address; on a multi-master board, another master
291 * may have changed the chip's "current" address pointer.
292 */
293static struct regmap *at24_translate_offset(struct at24_data *at24,
294 unsigned int *offset)
295{
296 unsigned int i;
297
298 if (at24->flags & AT24_FLAG_ADDR16) {
299 i = *offset >> 16;
300 *offset &= 0xffff;
301 } else {
302 i = *offset >> 8;
303 *offset &= 0xff;
304 }
305
306 return at24->client_regmaps[i];
307}
308
309static struct device *at24_base_client_dev(struct at24_data *at24)
310{
311 return regmap_get_device(at24->client_regmaps[0]);
312}
313
314static size_t at24_adjust_read_count(struct at24_data *at24,
315 unsigned int offset, size_t count)
316{
317 unsigned int bits;
318 size_t remainder;
319
320 /*
321 * In case of multi-address chips that don't rollover reads to
322 * the next slave address: truncate the count to the slave boundary,
323 * so that the read never straddles slaves.
324 */
325 if (at24->flags & AT24_FLAG_NO_RDROL) {
326 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
327 remainder = BIT(bits) - offset;
328 if (count > remainder)
329 count = remainder;
330 }
331
332 if (count > at24_io_limit)
333 count = at24_io_limit;
334
335 return count;
336}
337
338static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
339 unsigned int offset, size_t count)
340{
341 unsigned long timeout, read_time;
342 struct regmap *regmap;
343 int ret;
344
345 regmap = at24_translate_offset(at24, &offset);
346 count = at24_adjust_read_count(at24, offset, count);
347
348 /* adjust offset for mac and serial read ops */
349 offset += at24->offset_adj;
350
351 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
352 do {
353 /*
354 * The timestamp shall be taken before the actual operation
355 * to avoid a premature timeout in case of high CPU load.
356 */
357 read_time = jiffies;
358
359 ret = regmap_bulk_read(regmap, offset, buf, count);
360 dev_dbg(regmap_get_device(regmap), "read %zu@%d --> %d (%ld)\n",
361 count, offset, ret, jiffies);
362 if (!ret)
363 return count;
364
365 usleep_range(1000, 1500);
366 } while (time_before(read_time, timeout));
367
368 return -ETIMEDOUT;
369}
370
371/*
372 * Note that if the hardware write-protect pin is pulled high, the whole
373 * chip is normally write protected. But there are plenty of product
374 * variants here, including OTP fuses and partial chip protect.
375 *
376 * We only use page mode writes; the alternative is sloooow. These routines
377 * write at most one page.
378 */
379
380static size_t at24_adjust_write_count(struct at24_data *at24,
381 unsigned int offset, size_t count)
382{
383 unsigned int next_page;
384
385 /* write_max is at most a page */
386 if (count > at24->write_max)
387 count = at24->write_max;
388
389 /* Never roll over backwards, to the start of this page */
390 next_page = roundup(offset + 1, at24->page_size);
391 if (offset + count > next_page)
392 count = next_page - offset;
393
394 return count;
395}
396
397static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
398 unsigned int offset, size_t count)
399{
400 unsigned long timeout, write_time;
401 struct regmap *regmap;
402 int ret;
403
404 regmap = at24_translate_offset(at24, &offset);
405 count = at24_adjust_write_count(at24, offset, count);
406 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
407
408 do {
409 /*
410 * The timestamp shall be taken before the actual operation
411 * to avoid a premature timeout in case of high CPU load.
412 */
413 write_time = jiffies;
414
415 ret = regmap_bulk_write(regmap, offset, buf, count);
416 dev_dbg(regmap_get_device(regmap), "write %zu@%d --> %d (%ld)\n",
417 count, offset, ret, jiffies);
418 if (!ret)
419 return count;
420
421 usleep_range(1000, 1500);
422 } while (time_before(write_time, timeout));
423
424 return -ETIMEDOUT;
425}
426
427static int at24_read(void *priv, unsigned int off, void *val, size_t count)
428{
429 struct at24_data *at24;
430 struct device *dev;
431 char *buf = val;
432 int i, ret;
433
434 at24 = priv;
435 dev = at24_base_client_dev(at24);
436
437 if (unlikely(!count))
438 return count;
439
440 if (off + count > at24->byte_len)
441 return -EINVAL;
442
443 ret = pm_runtime_resume_and_get(dev);
444 if (ret)
445 return ret;
446 /*
447 * Read data from chip, protecting against concurrent updates
448 * from this host, but not from other I2C masters.
449 */
450 mutex_lock(&at24->lock);
451
452 for (i = 0; count; i += ret, count -= ret) {
453 ret = at24_regmap_read(at24, buf + i, off + i, count);
454 if (ret < 0) {
455 mutex_unlock(&at24->lock);
456 pm_runtime_put(dev);
457 return ret;
458 }
459 }
460
461 mutex_unlock(&at24->lock);
462
463 pm_runtime_put(dev);
464
465 if (unlikely(at24->read_post))
466 at24->read_post(off, buf, i);
467
468 return 0;
469}
470
471static int at24_write(void *priv, unsigned int off, void *val, size_t count)
472{
473 struct at24_data *at24;
474 struct device *dev;
475 char *buf = val;
476 int ret;
477
478 at24 = priv;
479 dev = at24_base_client_dev(at24);
480
481 if (unlikely(!count))
482 return -EINVAL;
483
484 if (off + count > at24->byte_len)
485 return -EINVAL;
486
487 ret = pm_runtime_resume_and_get(dev);
488 if (ret)
489 return ret;
490 /*
491 * Write data to chip, protecting against concurrent updates
492 * from this host, but not from other I2C masters.
493 */
494 mutex_lock(&at24->lock);
495
496 while (count) {
497 ret = at24_regmap_write(at24, buf, off, count);
498 if (ret < 0) {
499 mutex_unlock(&at24->lock);
500 pm_runtime_put(dev);
501 return ret;
502 }
503 buf += ret;
504 off += ret;
505 count -= ret;
506 }
507
508 mutex_unlock(&at24->lock);
509
510 pm_runtime_put(dev);
511
512 return 0;
513}
514
515static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
516 struct i2c_client *base_client,
517 struct regmap_config *regmap_config)
518{
519 struct i2c_client *dummy_client;
520 struct regmap *regmap;
521
522 dummy_client = devm_i2c_new_dummy_device(&base_client->dev,
523 base_client->adapter,
524 base_client->addr +
525 (index << at24->bank_addr_shift));
526 if (IS_ERR(dummy_client))
527 return PTR_ERR(dummy_client);
528
529 regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
530 if (IS_ERR(regmap))
531 return PTR_ERR(regmap);
532
533 at24->client_regmaps[index] = regmap;
534
535 return 0;
536}
537
538static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
539{
540 if (flags & AT24_FLAG_MAC) {
541 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
542 return 0xa0 - byte_len;
543 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
544 /*
545 * For 16 bit address pointers, the word address must contain
546 * a '10' sequence in bits 11 and 10 regardless of the
547 * intended position of the address pointer.
548 */
549 return 0x0800;
550 } else if (flags & AT24_FLAG_SERIAL) {
551 /*
552 * Otherwise the word address must begin with a '10' sequence,
553 * regardless of the intended address.
554 */
555 return 0x0080;
556 } else {
557 return 0;
558 }
559}
560
561static void at24_probe_temp_sensor(struct i2c_client *client)
562{
563 struct at24_data *at24 = i2c_get_clientdata(client);
564 struct i2c_board_info info = { .type = "jc42" };
565 int ret;
566 u8 val;
567
568 /*
569 * Byte 2 has value 11 for DDR3, earlier versions don't
570 * support the thermal sensor present flag
571 */
572 ret = at24_read(at24, 2, &val, 1);
573 if (ret || val != 11)
574 return;
575
576 /* Byte 32, bit 7 is set if temp sensor is present */
577 ret = at24_read(at24, 32, &val, 1);
578 if (ret || !(val & BIT(7)))
579 return;
580
581 info.addr = 0x18 | (client->addr & 7);
582
583 i2c_new_client_device(client->adapter, &info);
584}
585
586static int at24_probe(struct i2c_client *client)
587{
588 struct regmap_config regmap_config = { };
589 struct nvmem_config nvmem_config = { };
590 u32 byte_len, page_size, flags, addrw;
591 const struct at24_chip_data *cdata;
592 struct device *dev = &client->dev;
593 bool i2c_fn_i2c, i2c_fn_block;
594 unsigned int i, num_addresses;
595 struct at24_data *at24;
596 bool full_power;
597 struct regmap *regmap;
598 bool writable;
599 u8 test_byte;
600 int err;
601
602 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
603 i2c_fn_block = i2c_check_functionality(client->adapter,
604 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
605
606 cdata = i2c_get_match_data(client);
607 if (!cdata)
608 return -ENODEV;
609
610 err = device_property_read_u32(dev, "pagesize", &page_size);
611 if (err)
612 /*
613 * This is slow, but we can't know all eeproms, so we better
614 * play safe. Specifying custom eeprom-types via device tree
615 * or properties is recommended anyhow.
616 */
617 page_size = 1;
618
619 flags = cdata->flags;
620 if (device_property_present(dev, "read-only"))
621 flags |= AT24_FLAG_READONLY;
622 if (device_property_present(dev, "no-read-rollover"))
623 flags |= AT24_FLAG_NO_RDROL;
624
625 err = device_property_read_u32(dev, "address-width", &addrw);
626 if (!err) {
627 switch (addrw) {
628 case 8:
629 if (flags & AT24_FLAG_ADDR16)
630 dev_warn(dev,
631 "Override address width to be 8, while default is 16\n");
632 flags &= ~AT24_FLAG_ADDR16;
633 break;
634 case 16:
635 flags |= AT24_FLAG_ADDR16;
636 break;
637 default:
638 dev_warn(dev, "Bad \"address-width\" property: %u\n",
639 addrw);
640 }
641 }
642
643 err = device_property_read_u32(dev, "size", &byte_len);
644 if (err)
645 byte_len = cdata->byte_len;
646
647 if (!i2c_fn_i2c && !i2c_fn_block)
648 page_size = 1;
649
650 if (!page_size) {
651 dev_err(dev, "page_size must not be 0!\n");
652 return -EINVAL;
653 }
654
655 if (!is_power_of_2(page_size))
656 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
657
658 err = device_property_read_u32(dev, "num-addresses", &num_addresses);
659 if (err) {
660 if (flags & AT24_FLAG_TAKE8ADDR)
661 num_addresses = 8;
662 else
663 num_addresses = DIV_ROUND_UP(byte_len,
664 (flags & AT24_FLAG_ADDR16) ? 65536 : 256);
665 }
666
667 if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) {
668 dev_err(dev,
669 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
670 return -EINVAL;
671 }
672
673 regmap_config.val_bits = 8;
674 regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;
675 regmap_config.disable_locking = true;
676
677 regmap = devm_regmap_init_i2c(client, ®map_config);
678 if (IS_ERR(regmap))
679 return PTR_ERR(regmap);
680
681 at24 = devm_kzalloc(dev, struct_size(at24, client_regmaps, num_addresses),
682 GFP_KERNEL);
683 if (!at24)
684 return -ENOMEM;
685
686 mutex_init(&at24->lock);
687 at24->byte_len = byte_len;
688 at24->page_size = page_size;
689 at24->flags = flags;
690 at24->read_post = cdata->read_post;
691 at24->bank_addr_shift = cdata->bank_addr_shift;
692 at24->num_addresses = num_addresses;
693 at24->offset_adj = at24_get_offset_adj(flags, byte_len);
694 at24->client_regmaps[0] = regmap;
695
696 at24->vcc_reg = devm_regulator_get(dev, "vcc");
697 if (IS_ERR(at24->vcc_reg))
698 return PTR_ERR(at24->vcc_reg);
699
700 writable = !(flags & AT24_FLAG_READONLY);
701 if (writable) {
702 at24->write_max = min_t(unsigned int,
703 page_size, at24_io_limit);
704 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
705 at24->write_max = I2C_SMBUS_BLOCK_MAX;
706 }
707
708 /* use dummy devices for multiple-address chips */
709 for (i = 1; i < num_addresses; i++) {
710 err = at24_make_dummy_client(at24, i, client, ®map_config);
711 if (err)
712 return err;
713 }
714
715 /*
716 * We initialize nvmem_config.id to NVMEM_DEVID_AUTO even if the
717 * label property is set as some platform can have multiple eeproms
718 * with same label and we can not register each of those with same
719 * label. Failing to register those eeproms trigger cascade failure
720 * on such platform.
721 */
722 nvmem_config.id = NVMEM_DEVID_AUTO;
723
724 if (device_property_present(dev, "label")) {
725 err = device_property_read_string(dev, "label",
726 &nvmem_config.name);
727 if (err)
728 return err;
729 } else {
730 nvmem_config.name = dev_name(dev);
731 }
732
733 nvmem_config.type = NVMEM_TYPE_EEPROM;
734 nvmem_config.dev = dev;
735 nvmem_config.read_only = !writable;
736 nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
737 nvmem_config.owner = THIS_MODULE;
738 nvmem_config.compat = true;
739 nvmem_config.base_dev = dev;
740 nvmem_config.reg_read = at24_read;
741 nvmem_config.reg_write = at24_write;
742 nvmem_config.priv = at24;
743 nvmem_config.stride = 1;
744 nvmem_config.word_size = 1;
745 nvmem_config.size = byte_len;
746
747 i2c_set_clientdata(client, at24);
748
749 full_power = acpi_dev_state_d0(&client->dev);
750 if (full_power) {
751 err = regulator_enable(at24->vcc_reg);
752 if (err) {
753 dev_err(dev, "Failed to enable vcc regulator\n");
754 return err;
755 }
756
757 pm_runtime_set_active(dev);
758 }
759 pm_runtime_enable(dev);
760
761 at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
762 if (IS_ERR(at24->nvmem)) {
763 pm_runtime_disable(dev);
764 if (!pm_runtime_status_suspended(dev))
765 regulator_disable(at24->vcc_reg);
766 return dev_err_probe(dev, PTR_ERR(at24->nvmem),
767 "failed to register nvmem\n");
768 }
769
770 /*
771 * Perform a one-byte test read to verify that the chip is functional,
772 * unless powering on the device is to be avoided during probe (i.e.
773 * it's powered off right now).
774 */
775 if (full_power) {
776 err = at24_read(at24, 0, &test_byte, 1);
777 if (err) {
778 pm_runtime_disable(dev);
779 if (!pm_runtime_status_suspended(dev))
780 regulator_disable(at24->vcc_reg);
781 return -ENODEV;
782 }
783 }
784
785 /* If this a SPD EEPROM, probe for DDR3 thermal sensor */
786 if (cdata == &at24_data_spd)
787 at24_probe_temp_sensor(client);
788
789 pm_runtime_idle(dev);
790
791 if (writable)
792 dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n",
793 byte_len, client->name, at24->write_max);
794 else
795 dev_info(dev, "%u byte %s EEPROM, read-only\n",
796 byte_len, client->name);
797
798 return 0;
799}
800
801static void at24_remove(struct i2c_client *client)
802{
803 struct at24_data *at24 = i2c_get_clientdata(client);
804
805 pm_runtime_disable(&client->dev);
806 if (acpi_dev_state_d0(&client->dev)) {
807 if (!pm_runtime_status_suspended(&client->dev))
808 regulator_disable(at24->vcc_reg);
809 pm_runtime_set_suspended(&client->dev);
810 }
811}
812
813static int __maybe_unused at24_suspend(struct device *dev)
814{
815 struct i2c_client *client = to_i2c_client(dev);
816 struct at24_data *at24 = i2c_get_clientdata(client);
817
818 return regulator_disable(at24->vcc_reg);
819}
820
821static int __maybe_unused at24_resume(struct device *dev)
822{
823 struct i2c_client *client = to_i2c_client(dev);
824 struct at24_data *at24 = i2c_get_clientdata(client);
825
826 return regulator_enable(at24->vcc_reg);
827}
828
829static const struct dev_pm_ops at24_pm_ops = {
830 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
831 pm_runtime_force_resume)
832 SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL)
833};
834
835static struct i2c_driver at24_driver = {
836 .driver = {
837 .name = "at24",
838 .pm = &at24_pm_ops,
839 .of_match_table = of_match_ptr(at24_of_match),
840 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
841 },
842 .probe = at24_probe,
843 .remove = at24_remove,
844 .id_table = at24_ids,
845 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
846};
847
848static int __init at24_init(void)
849{
850 if (!at24_io_limit) {
851 pr_err("at24: at24_io_limit must not be 0!\n");
852 return -EINVAL;
853 }
854
855 at24_io_limit = rounddown_pow_of_two(at24_io_limit);
856 return i2c_add_driver(&at24_driver);
857}
858module_init(at24_init);
859
860static void __exit at24_exit(void)
861{
862 i2c_del_driver(&at24_driver);
863}
864module_exit(at24_exit);
865
866MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
867MODULE_AUTHOR("David Brownell and Wolfram Sang");
868MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at24.c - handle most I2C EEPROMs
4 *
5 * Copyright (C) 2005-2007 David Brownell
6 * Copyright (C) 2008 Wolfram Sang, Pengutronix
7 */
8
9#include <linux/acpi.h>
10#include <linux/bitops.h>
11#include <linux/capability.h>
12#include <linux/delay.h>
13#include <linux/i2c.h>
14#include <linux/init.h>
15#include <linux/jiffies.h>
16#include <linux/kernel.h>
17#include <linux/mod_devicetable.h>
18#include <linux/module.h>
19#include <linux/mutex.h>
20#include <linux/nvmem-provider.h>
21#include <linux/of_device.h>
22#include <linux/pm_runtime.h>
23#include <linux/property.h>
24#include <linux/regmap.h>
25#include <linux/regulator/consumer.h>
26#include <linux/slab.h>
27
28/* Address pointer is 16 bit. */
29#define AT24_FLAG_ADDR16 BIT(7)
30/* sysfs-entry will be read-only. */
31#define AT24_FLAG_READONLY BIT(6)
32/* sysfs-entry will be world-readable. */
33#define AT24_FLAG_IRUGO BIT(5)
34/* Take always 8 addresses (24c00). */
35#define AT24_FLAG_TAKE8ADDR BIT(4)
36/* Factory-programmed serial number. */
37#define AT24_FLAG_SERIAL BIT(3)
38/* Factory-programmed mac address. */
39#define AT24_FLAG_MAC BIT(2)
40/* Does not auto-rollover reads to the next slave address. */
41#define AT24_FLAG_NO_RDROL BIT(1)
42
43/*
44 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
45 * Differences between different vendor product lines (like Atmel AT24C or
46 * MicroChip 24LC, etc) won't much matter for typical read/write access.
47 * There are also I2C RAM chips, likewise interchangeable. One example
48 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
49 *
50 * However, misconfiguration can lose data. "Set 16-bit memory address"
51 * to a part with 8-bit addressing will overwrite data. Writing with too
52 * big a page size also loses data. And it's not safe to assume that the
53 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
54 * uses 0x51, for just one example.
55 *
56 * Accordingly, explicit board-specific configuration data should be used
57 * in almost all cases. (One partial exception is an SMBus used to access
58 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
59 *
60 * So this driver uses "new style" I2C driver binding, expecting to be
61 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
62 * similar kernel-resident tables; or, configuration data coming from
63 * a bootloader.
64 *
65 * Other than binding model, current differences from "eeprom" driver are
66 * that this one handles write access and isn't restricted to 24c02 devices.
67 * It also handles larger devices (32 kbit and up) with two-byte addresses,
68 * which won't work on pure SMBus systems.
69 */
70
71struct at24_data {
72 /*
73 * Lock protects against activities from other Linux tasks,
74 * but not from changes by other I2C masters.
75 */
76 struct mutex lock;
77
78 unsigned int write_max;
79 unsigned int num_addresses;
80 unsigned int offset_adj;
81
82 u32 byte_len;
83 u16 page_size;
84 u8 flags;
85
86 struct nvmem_device *nvmem;
87 struct regulator *vcc_reg;
88 void (*read_post)(unsigned int off, char *buf, size_t count);
89
90 /*
91 * Some chips tie up multiple I2C addresses; dummy devices reserve
92 * them for us.
93 */
94 u8 bank_addr_shift;
95 struct regmap *client_regmaps[];
96};
97
98/*
99 * This parameter is to help this driver avoid blocking other drivers out
100 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
101 * clock, one 256 byte read takes about 1/43 second which is excessive;
102 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
103 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
104 *
105 * This value is forced to be a power of two so that writes align on pages.
106 */
107static unsigned int at24_io_limit = 128;
108module_param_named(io_limit, at24_io_limit, uint, 0);
109MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
110
111/*
112 * Specs often allow 5 msec for a page write, sometimes 20 msec;
113 * it's important to recover from write timeouts.
114 */
115static unsigned int at24_write_timeout = 25;
116module_param_named(write_timeout, at24_write_timeout, uint, 0);
117MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
118
119struct at24_chip_data {
120 u32 byte_len;
121 u8 flags;
122 u8 bank_addr_shift;
123 void (*read_post)(unsigned int off, char *buf, size_t count);
124};
125
126#define AT24_CHIP_DATA(_name, _len, _flags) \
127 static const struct at24_chip_data _name = { \
128 .byte_len = _len, .flags = _flags, \
129 }
130
131#define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \
132 static const struct at24_chip_data _name = { \
133 .byte_len = _len, .flags = _flags, \
134 .read_post = _read_post, \
135 }
136
137#define AT24_CHIP_DATA_BS(_name, _len, _flags, _bank_addr_shift) \
138 static const struct at24_chip_data _name = { \
139 .byte_len = _len, .flags = _flags, \
140 .bank_addr_shift = _bank_addr_shift \
141 }
142
143static void at24_read_post_vaio(unsigned int off, char *buf, size_t count)
144{
145 int i;
146
147 if (capable(CAP_SYS_ADMIN))
148 return;
149
150 /*
151 * Hide VAIO private settings to regular users:
152 * - BIOS passwords: bytes 0x00 to 0x0f
153 * - UUID: bytes 0x10 to 0x1f
154 * - Serial number: 0xc0 to 0xdf
155 */
156 for (i = 0; i < count; i++) {
157 if ((off + i <= 0x1f) ||
158 (off + i >= 0xc0 && off + i <= 0xdf))
159 buf[i] = 0;
160 }
161}
162
163/* needs 8 addresses as A0-A2 are ignored */
164AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
165/* old variants can't be handled with this generic entry! */
166AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
167AT24_CHIP_DATA(at24_data_24cs01, 16,
168 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
169AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
170AT24_CHIP_DATA(at24_data_24cs02, 16,
171 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
172AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
173 AT24_FLAG_MAC | AT24_FLAG_READONLY);
174AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
175 AT24_FLAG_MAC | AT24_FLAG_READONLY);
176/* spd is a 24c02 in memory DIMMs */
177AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
178 AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
179/* 24c02_vaio is a 24c02 on some Sony laptops */
180AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8,
181 AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
182 at24_read_post_vaio);
183AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
184AT24_CHIP_DATA(at24_data_24cs04, 16,
185 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
186/* 24rf08 quirk is handled at i2c-core */
187AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
188AT24_CHIP_DATA(at24_data_24cs08, 16,
189 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
190AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
191AT24_CHIP_DATA(at24_data_24cs16, 16,
192 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
193AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
194AT24_CHIP_DATA(at24_data_24cs32, 16,
195 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
196AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
197AT24_CHIP_DATA(at24_data_24cs64, 16,
198 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
199AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
200AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
201AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
202AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
203AT24_CHIP_DATA_BS(at24_data_24c1025, 1048576 / 8, AT24_FLAG_ADDR16, 2);
204AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
205/* identical to 24c08 ? */
206AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
207
208static const struct i2c_device_id at24_ids[] = {
209 { "24c00", (kernel_ulong_t)&at24_data_24c00 },
210 { "24c01", (kernel_ulong_t)&at24_data_24c01 },
211 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 },
212 { "24c02", (kernel_ulong_t)&at24_data_24c02 },
213 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
214 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 },
215 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 },
216 { "spd", (kernel_ulong_t)&at24_data_spd },
217 { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio },
218 { "24c04", (kernel_ulong_t)&at24_data_24c04 },
219 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 },
220 { "24c08", (kernel_ulong_t)&at24_data_24c08 },
221 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 },
222 { "24c16", (kernel_ulong_t)&at24_data_24c16 },
223 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 },
224 { "24c32", (kernel_ulong_t)&at24_data_24c32 },
225 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 },
226 { "24c64", (kernel_ulong_t)&at24_data_24c64 },
227 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 },
228 { "24c128", (kernel_ulong_t)&at24_data_24c128 },
229 { "24c256", (kernel_ulong_t)&at24_data_24c256 },
230 { "24c512", (kernel_ulong_t)&at24_data_24c512 },
231 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 },
232 { "24c1025", (kernel_ulong_t)&at24_data_24c1025 },
233 { "24c2048", (kernel_ulong_t)&at24_data_24c2048 },
234 { "at24", 0 },
235 { /* END OF LIST */ }
236};
237MODULE_DEVICE_TABLE(i2c, at24_ids);
238
239static const struct of_device_id at24_of_match[] = {
240 { .compatible = "atmel,24c00", .data = &at24_data_24c00 },
241 { .compatible = "atmel,24c01", .data = &at24_data_24c01 },
242 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 },
243 { .compatible = "atmel,24c02", .data = &at24_data_24c02 },
244 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 },
245 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 },
246 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 },
247 { .compatible = "atmel,spd", .data = &at24_data_spd },
248 { .compatible = "atmel,24c04", .data = &at24_data_24c04 },
249 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 },
250 { .compatible = "atmel,24c08", .data = &at24_data_24c08 },
251 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 },
252 { .compatible = "atmel,24c16", .data = &at24_data_24c16 },
253 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 },
254 { .compatible = "atmel,24c32", .data = &at24_data_24c32 },
255 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 },
256 { .compatible = "atmel,24c64", .data = &at24_data_24c64 },
257 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 },
258 { .compatible = "atmel,24c128", .data = &at24_data_24c128 },
259 { .compatible = "atmel,24c256", .data = &at24_data_24c256 },
260 { .compatible = "atmel,24c512", .data = &at24_data_24c512 },
261 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 },
262 { .compatible = "atmel,24c1025", .data = &at24_data_24c1025 },
263 { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 },
264 { /* END OF LIST */ },
265};
266MODULE_DEVICE_TABLE(of, at24_of_match);
267
268static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = {
269 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 },
270 { "TPF0001", (kernel_ulong_t)&at24_data_24c1024 },
271 { /* END OF LIST */ }
272};
273MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
274
275/*
276 * This routine supports chips which consume multiple I2C addresses. It
277 * computes the addressing information to be used for a given r/w request.
278 * Assumes that sanity checks for offset happened at sysfs-layer.
279 *
280 * Slave address and byte offset derive from the offset. Always
281 * set the byte address; on a multi-master board, another master
282 * may have changed the chip's "current" address pointer.
283 */
284static struct regmap *at24_translate_offset(struct at24_data *at24,
285 unsigned int *offset)
286{
287 unsigned int i;
288
289 if (at24->flags & AT24_FLAG_ADDR16) {
290 i = *offset >> 16;
291 *offset &= 0xffff;
292 } else {
293 i = *offset >> 8;
294 *offset &= 0xff;
295 }
296
297 return at24->client_regmaps[i];
298}
299
300static struct device *at24_base_client_dev(struct at24_data *at24)
301{
302 return regmap_get_device(at24->client_regmaps[0]);
303}
304
305static size_t at24_adjust_read_count(struct at24_data *at24,
306 unsigned int offset, size_t count)
307{
308 unsigned int bits;
309 size_t remainder;
310
311 /*
312 * In case of multi-address chips that don't rollover reads to
313 * the next slave address: truncate the count to the slave boundary,
314 * so that the read never straddles slaves.
315 */
316 if (at24->flags & AT24_FLAG_NO_RDROL) {
317 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
318 remainder = BIT(bits) - offset;
319 if (count > remainder)
320 count = remainder;
321 }
322
323 if (count > at24_io_limit)
324 count = at24_io_limit;
325
326 return count;
327}
328
329static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
330 unsigned int offset, size_t count)
331{
332 unsigned long timeout, read_time;
333 struct regmap *regmap;
334 int ret;
335
336 regmap = at24_translate_offset(at24, &offset);
337 count = at24_adjust_read_count(at24, offset, count);
338
339 /* adjust offset for mac and serial read ops */
340 offset += at24->offset_adj;
341
342 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
343 do {
344 /*
345 * The timestamp shall be taken before the actual operation
346 * to avoid a premature timeout in case of high CPU load.
347 */
348 read_time = jiffies;
349
350 ret = regmap_bulk_read(regmap, offset, buf, count);
351 dev_dbg(regmap_get_device(regmap), "read %zu@%d --> %d (%ld)\n",
352 count, offset, ret, jiffies);
353 if (!ret)
354 return count;
355
356 usleep_range(1000, 1500);
357 } while (time_before(read_time, timeout));
358
359 return -ETIMEDOUT;
360}
361
362/*
363 * Note that if the hardware write-protect pin is pulled high, the whole
364 * chip is normally write protected. But there are plenty of product
365 * variants here, including OTP fuses and partial chip protect.
366 *
367 * We only use page mode writes; the alternative is sloooow. These routines
368 * write at most one page.
369 */
370
371static size_t at24_adjust_write_count(struct at24_data *at24,
372 unsigned int offset, size_t count)
373{
374 unsigned int next_page;
375
376 /* write_max is at most a page */
377 if (count > at24->write_max)
378 count = at24->write_max;
379
380 /* Never roll over backwards, to the start of this page */
381 next_page = roundup(offset + 1, at24->page_size);
382 if (offset + count > next_page)
383 count = next_page - offset;
384
385 return count;
386}
387
388static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
389 unsigned int offset, size_t count)
390{
391 unsigned long timeout, write_time;
392 struct regmap *regmap;
393 int ret;
394
395 regmap = at24_translate_offset(at24, &offset);
396 count = at24_adjust_write_count(at24, offset, count);
397 timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
398
399 do {
400 /*
401 * The timestamp shall be taken before the actual operation
402 * to avoid a premature timeout in case of high CPU load.
403 */
404 write_time = jiffies;
405
406 ret = regmap_bulk_write(regmap, offset, buf, count);
407 dev_dbg(regmap_get_device(regmap), "write %zu@%d --> %d (%ld)\n",
408 count, offset, ret, jiffies);
409 if (!ret)
410 return count;
411
412 usleep_range(1000, 1500);
413 } while (time_before(write_time, timeout));
414
415 return -ETIMEDOUT;
416}
417
418static int at24_read(void *priv, unsigned int off, void *val, size_t count)
419{
420 struct at24_data *at24;
421 struct device *dev;
422 char *buf = val;
423 int i, ret;
424
425 at24 = priv;
426 dev = at24_base_client_dev(at24);
427
428 if (unlikely(!count))
429 return count;
430
431 if (off + count > at24->byte_len)
432 return -EINVAL;
433
434 ret = pm_runtime_get_sync(dev);
435 if (ret < 0) {
436 pm_runtime_put_noidle(dev);
437 return ret;
438 }
439
440 /*
441 * Read data from chip, protecting against concurrent updates
442 * from this host, but not from other I2C masters.
443 */
444 mutex_lock(&at24->lock);
445
446 for (i = 0; count; i += ret, count -= ret) {
447 ret = at24_regmap_read(at24, buf + i, off + i, count);
448 if (ret < 0) {
449 mutex_unlock(&at24->lock);
450 pm_runtime_put(dev);
451 return ret;
452 }
453 }
454
455 mutex_unlock(&at24->lock);
456
457 pm_runtime_put(dev);
458
459 if (unlikely(at24->read_post))
460 at24->read_post(off, buf, i);
461
462 return 0;
463}
464
465static int at24_write(void *priv, unsigned int off, void *val, size_t count)
466{
467 struct at24_data *at24;
468 struct device *dev;
469 char *buf = val;
470 int ret;
471
472 at24 = priv;
473 dev = at24_base_client_dev(at24);
474
475 if (unlikely(!count))
476 return -EINVAL;
477
478 if (off + count > at24->byte_len)
479 return -EINVAL;
480
481 ret = pm_runtime_get_sync(dev);
482 if (ret < 0) {
483 pm_runtime_put_noidle(dev);
484 return ret;
485 }
486
487 /*
488 * Write data to chip, protecting against concurrent updates
489 * from this host, but not from other I2C masters.
490 */
491 mutex_lock(&at24->lock);
492
493 while (count) {
494 ret = at24_regmap_write(at24, buf, off, count);
495 if (ret < 0) {
496 mutex_unlock(&at24->lock);
497 pm_runtime_put(dev);
498 return ret;
499 }
500 buf += ret;
501 off += ret;
502 count -= ret;
503 }
504
505 mutex_unlock(&at24->lock);
506
507 pm_runtime_put(dev);
508
509 return 0;
510}
511
512static const struct at24_chip_data *at24_get_chip_data(struct device *dev)
513{
514 struct device_node *of_node = dev->of_node;
515 const struct at24_chip_data *cdata;
516 const struct i2c_device_id *id;
517
518 id = i2c_match_id(at24_ids, to_i2c_client(dev));
519
520 /*
521 * The I2C core allows OF nodes compatibles to match against the
522 * I2C device ID table as a fallback, so check not only if an OF
523 * node is present but also if it matches an OF device ID entry.
524 */
525 if (of_node && of_match_device(at24_of_match, dev))
526 cdata = of_device_get_match_data(dev);
527 else if (id)
528 cdata = (void *)id->driver_data;
529 else
530 cdata = acpi_device_get_match_data(dev);
531
532 if (!cdata)
533 return ERR_PTR(-ENODEV);
534
535 return cdata;
536}
537
538static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
539 struct i2c_client *base_client,
540 struct regmap_config *regmap_config)
541{
542 struct i2c_client *dummy_client;
543 struct regmap *regmap;
544
545 dummy_client = devm_i2c_new_dummy_device(&base_client->dev,
546 base_client->adapter,
547 base_client->addr +
548 (index << at24->bank_addr_shift));
549 if (IS_ERR(dummy_client))
550 return PTR_ERR(dummy_client);
551
552 regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
553 if (IS_ERR(regmap))
554 return PTR_ERR(regmap);
555
556 at24->client_regmaps[index] = regmap;
557
558 return 0;
559}
560
561static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
562{
563 if (flags & AT24_FLAG_MAC) {
564 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
565 return 0xa0 - byte_len;
566 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
567 /*
568 * For 16 bit address pointers, the word address must contain
569 * a '10' sequence in bits 11 and 10 regardless of the
570 * intended position of the address pointer.
571 */
572 return 0x0800;
573 } else if (flags & AT24_FLAG_SERIAL) {
574 /*
575 * Otherwise the word address must begin with a '10' sequence,
576 * regardless of the intended address.
577 */
578 return 0x0080;
579 } else {
580 return 0;
581 }
582}
583
584static int at24_probe(struct i2c_client *client)
585{
586 struct regmap_config regmap_config = { };
587 struct nvmem_config nvmem_config = { };
588 u32 byte_len, page_size, flags, addrw;
589 const struct at24_chip_data *cdata;
590 struct device *dev = &client->dev;
591 bool i2c_fn_i2c, i2c_fn_block;
592 unsigned int i, num_addresses;
593 struct at24_data *at24;
594 bool full_power;
595 struct regmap *regmap;
596 bool writable;
597 u8 test_byte;
598 int err;
599
600 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
601 i2c_fn_block = i2c_check_functionality(client->adapter,
602 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
603
604 cdata = at24_get_chip_data(dev);
605 if (IS_ERR(cdata))
606 return PTR_ERR(cdata);
607
608 err = device_property_read_u32(dev, "pagesize", &page_size);
609 if (err)
610 /*
611 * This is slow, but we can't know all eeproms, so we better
612 * play safe. Specifying custom eeprom-types via device tree
613 * or properties is recommended anyhow.
614 */
615 page_size = 1;
616
617 flags = cdata->flags;
618 if (device_property_present(dev, "read-only"))
619 flags |= AT24_FLAG_READONLY;
620 if (device_property_present(dev, "no-read-rollover"))
621 flags |= AT24_FLAG_NO_RDROL;
622
623 err = device_property_read_u32(dev, "address-width", &addrw);
624 if (!err) {
625 switch (addrw) {
626 case 8:
627 if (flags & AT24_FLAG_ADDR16)
628 dev_warn(dev,
629 "Override address width to be 8, while default is 16\n");
630 flags &= ~AT24_FLAG_ADDR16;
631 break;
632 case 16:
633 flags |= AT24_FLAG_ADDR16;
634 break;
635 default:
636 dev_warn(dev, "Bad \"address-width\" property: %u\n",
637 addrw);
638 }
639 }
640
641 err = device_property_read_u32(dev, "size", &byte_len);
642 if (err)
643 byte_len = cdata->byte_len;
644
645 if (!i2c_fn_i2c && !i2c_fn_block)
646 page_size = 1;
647
648 if (!page_size) {
649 dev_err(dev, "page_size must not be 0!\n");
650 return -EINVAL;
651 }
652
653 if (!is_power_of_2(page_size))
654 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
655
656 err = device_property_read_u32(dev, "num-addresses", &num_addresses);
657 if (err) {
658 if (flags & AT24_FLAG_TAKE8ADDR)
659 num_addresses = 8;
660 else
661 num_addresses = DIV_ROUND_UP(byte_len,
662 (flags & AT24_FLAG_ADDR16) ? 65536 : 256);
663 }
664
665 if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) {
666 dev_err(dev,
667 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
668 return -EINVAL;
669 }
670
671 regmap_config.val_bits = 8;
672 regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;
673 regmap_config.disable_locking = true;
674
675 regmap = devm_regmap_init_i2c(client, ®map_config);
676 if (IS_ERR(regmap))
677 return PTR_ERR(regmap);
678
679 at24 = devm_kzalloc(dev, struct_size(at24, client_regmaps, num_addresses),
680 GFP_KERNEL);
681 if (!at24)
682 return -ENOMEM;
683
684 mutex_init(&at24->lock);
685 at24->byte_len = byte_len;
686 at24->page_size = page_size;
687 at24->flags = flags;
688 at24->read_post = cdata->read_post;
689 at24->bank_addr_shift = cdata->bank_addr_shift;
690 at24->num_addresses = num_addresses;
691 at24->offset_adj = at24_get_offset_adj(flags, byte_len);
692 at24->client_regmaps[0] = regmap;
693
694 at24->vcc_reg = devm_regulator_get(dev, "vcc");
695 if (IS_ERR(at24->vcc_reg))
696 return PTR_ERR(at24->vcc_reg);
697
698 writable = !(flags & AT24_FLAG_READONLY);
699 if (writable) {
700 at24->write_max = min_t(unsigned int,
701 page_size, at24_io_limit);
702 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
703 at24->write_max = I2C_SMBUS_BLOCK_MAX;
704 }
705
706 /* use dummy devices for multiple-address chips */
707 for (i = 1; i < num_addresses; i++) {
708 err = at24_make_dummy_client(at24, i, client, ®map_config);
709 if (err)
710 return err;
711 }
712
713 /*
714 * We initialize nvmem_config.id to NVMEM_DEVID_AUTO even if the
715 * label property is set as some platform can have multiple eeproms
716 * with same label and we can not register each of those with same
717 * label. Failing to register those eeproms trigger cascade failure
718 * on such platform.
719 */
720 nvmem_config.id = NVMEM_DEVID_AUTO;
721
722 if (device_property_present(dev, "label")) {
723 err = device_property_read_string(dev, "label",
724 &nvmem_config.name);
725 if (err)
726 return err;
727 } else {
728 nvmem_config.name = dev_name(dev);
729 }
730
731 nvmem_config.type = NVMEM_TYPE_EEPROM;
732 nvmem_config.dev = dev;
733 nvmem_config.read_only = !writable;
734 nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
735 nvmem_config.owner = THIS_MODULE;
736 nvmem_config.compat = true;
737 nvmem_config.base_dev = dev;
738 nvmem_config.reg_read = at24_read;
739 nvmem_config.reg_write = at24_write;
740 nvmem_config.priv = at24;
741 nvmem_config.stride = 1;
742 nvmem_config.word_size = 1;
743 nvmem_config.size = byte_len;
744
745 i2c_set_clientdata(client, at24);
746
747 full_power = acpi_dev_state_d0(&client->dev);
748 if (full_power) {
749 err = regulator_enable(at24->vcc_reg);
750 if (err) {
751 dev_err(dev, "Failed to enable vcc regulator\n");
752 return err;
753 }
754
755 pm_runtime_set_active(dev);
756 }
757 pm_runtime_enable(dev);
758
759 at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
760 if (IS_ERR(at24->nvmem)) {
761 pm_runtime_disable(dev);
762 if (!pm_runtime_status_suspended(dev))
763 regulator_disable(at24->vcc_reg);
764 return PTR_ERR(at24->nvmem);
765 }
766
767 /*
768 * Perform a one-byte test read to verify that the chip is functional,
769 * unless powering on the device is to be avoided during probe (i.e.
770 * it's powered off right now).
771 */
772 if (full_power) {
773 err = at24_read(at24, 0, &test_byte, 1);
774 if (err) {
775 pm_runtime_disable(dev);
776 if (!pm_runtime_status_suspended(dev))
777 regulator_disable(at24->vcc_reg);
778 return -ENODEV;
779 }
780 }
781
782 pm_runtime_idle(dev);
783
784 if (writable)
785 dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n",
786 byte_len, client->name, at24->write_max);
787 else
788 dev_info(dev, "%u byte %s EEPROM, read-only\n",
789 byte_len, client->name);
790
791 return 0;
792}
793
794static void at24_remove(struct i2c_client *client)
795{
796 struct at24_data *at24 = i2c_get_clientdata(client);
797
798 pm_runtime_disable(&client->dev);
799 if (acpi_dev_state_d0(&client->dev)) {
800 if (!pm_runtime_status_suspended(&client->dev))
801 regulator_disable(at24->vcc_reg);
802 pm_runtime_set_suspended(&client->dev);
803 }
804}
805
806static int __maybe_unused at24_suspend(struct device *dev)
807{
808 struct i2c_client *client = to_i2c_client(dev);
809 struct at24_data *at24 = i2c_get_clientdata(client);
810
811 return regulator_disable(at24->vcc_reg);
812}
813
814static int __maybe_unused at24_resume(struct device *dev)
815{
816 struct i2c_client *client = to_i2c_client(dev);
817 struct at24_data *at24 = i2c_get_clientdata(client);
818
819 return regulator_enable(at24->vcc_reg);
820}
821
822static const struct dev_pm_ops at24_pm_ops = {
823 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
824 pm_runtime_force_resume)
825 SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL)
826};
827
828static struct i2c_driver at24_driver = {
829 .driver = {
830 .name = "at24",
831 .pm = &at24_pm_ops,
832 .of_match_table = at24_of_match,
833 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
834 },
835 .probe_new = at24_probe,
836 .remove = at24_remove,
837 .id_table = at24_ids,
838 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
839};
840
841static int __init at24_init(void)
842{
843 if (!at24_io_limit) {
844 pr_err("at24: at24_io_limit must not be 0!\n");
845 return -EINVAL;
846 }
847
848 at24_io_limit = rounddown_pow_of_two(at24_io_limit);
849 return i2c_add_driver(&at24_driver);
850}
851module_init(at24_init);
852
853static void __exit at24_exit(void)
854{
855 i2c_del_driver(&at24_driver);
856}
857module_exit(at24_exit);
858
859MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
860MODULE_AUTHOR("David Brownell and Wolfram Sang");
861MODULE_LICENSE("GPL");