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1# SPDX-License-Identifier: GPL-2.0-only
2
3menuconfig CRYPTO_HW
4 bool "Hardware crypto devices"
5 default y
6 help
7 Say Y here to get to see options for hardware crypto devices and
8 processors. This option alone does not add any kernel code.
9
10 If you say N, all options in this submenu will be skipped and disabled.
11
12if CRYPTO_HW
13
14source "drivers/crypto/allwinner/Kconfig"
15
16config CRYPTO_DEV_PADLOCK
17 tristate "Support for VIA PadLock ACE"
18 depends on X86 && !UML
19 help
20 Some VIA processors come with an integrated crypto engine
21 (so called VIA PadLock ACE, Advanced Cryptography Engine)
22 that provides instructions for very fast cryptographic
23 operations with supported algorithms.
24
25 The instructions are used only when the CPU supports them.
26 Otherwise software encryption is used.
27
28config CRYPTO_DEV_PADLOCK_AES
29 tristate "PadLock driver for AES algorithm"
30 depends on CRYPTO_DEV_PADLOCK
31 select CRYPTO_SKCIPHER
32 select CRYPTO_LIB_AES
33 help
34 Use VIA PadLock for AES algorithm.
35
36 Available in VIA C3 and newer CPUs.
37
38 If unsure say M. The compiled module will be
39 called padlock-aes.
40
41config CRYPTO_DEV_PADLOCK_SHA
42 tristate "PadLock driver for SHA1 and SHA256 algorithms"
43 depends on CRYPTO_DEV_PADLOCK
44 select CRYPTO_HASH
45 select CRYPTO_SHA1
46 select CRYPTO_SHA256
47 help
48 Use VIA PadLock for SHA1/SHA256 algorithms.
49
50 Available in VIA C7 and newer processors.
51
52 If unsure say M. The compiled module will be
53 called padlock-sha.
54
55config CRYPTO_DEV_GEODE
56 tristate "Support for the Geode LX AES engine"
57 depends on X86_32 && PCI
58 select CRYPTO_ALGAPI
59 select CRYPTO_SKCIPHER
60 help
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
62 engine for the CryptoAPI AES algorithm.
63
64 To compile this driver as a module, choose M here: the module
65 will be called geode-aes.
66
67config ZCRYPT
68 tristate "Support for s390 cryptographic adapters"
69 depends on S390
70 select HW_RANDOM
71 help
72 Select this option if you want to enable support for
73 s390 cryptographic adapters like Crypto Express 4 up
74 to 8 in Coprocessor (CEXxC), EP11 Coprocessor (CEXxP)
75 or Accelerator (CEXxA) mode.
76
77config ZCRYPT_DEBUG
78 bool "Enable debug features for s390 cryptographic adapters"
79 default n
80 depends on DEBUG_KERNEL
81 depends on ZCRYPT
82 help
83 Say 'Y' here to enable some additional debug features on the
84 s390 cryptographic adapters driver.
85
86 There will be some more sysfs attributes displayed for ap cards
87 and queues and some flags on crypto requests are interpreted as
88 debugging messages to force error injection.
89
90 Do not enable on production level kernel build.
91
92 If unsure, say N.
93
94config PKEY
95 tristate "Kernel API for protected key handling"
96 depends on S390
97 depends on ZCRYPT
98 help
99 With this option enabled the pkey kernel module provides an API
100 for creation and handling of protected keys. Other parts of the
101 kernel or userspace applications may use these functions.
102
103 Select this option if you want to enable the kernel and userspace
104 API for proteced key handling.
105
106 Please note that creation of protected keys from secure keys
107 requires to have at least one CEX card in coprocessor mode
108 available at runtime.
109
110config CRYPTO_PAES_S390
111 tristate "PAES cipher algorithms"
112 depends on S390
113 depends on ZCRYPT
114 depends on PKEY
115 select CRYPTO_ALGAPI
116 select CRYPTO_SKCIPHER
117 help
118 This is the s390 hardware accelerated implementation of the
119 AES cipher algorithms for use with protected key.
120
121 Select this option if you want to use the paes cipher
122 for example to use protected key encrypted devices.
123
124config S390_PRNG
125 tristate "Pseudo random number generator device driver"
126 depends on S390
127 default "m"
128 help
129 Select this option if you want to use the s390 pseudo random number
130 generator. The PRNG is part of the cryptographic processor functions
131 and uses triple-DES to generate secure random numbers like the
132 ANSI X9.17 standard. User-space programs access the
133 pseudo-random-number device through the char device /dev/prandom.
134
135 It is available as of z9.
136
137config CRYPTO_DEV_NIAGARA2
138 tristate "Niagara2 Stream Processing Unit driver"
139 select CRYPTO_LIB_DES
140 select CRYPTO_SKCIPHER
141 select CRYPTO_HASH
142 select CRYPTO_MD5
143 select CRYPTO_SHA1
144 select CRYPTO_SHA256
145 depends on SPARC64
146 help
147 Each core of a Niagara2 processor contains a Stream
148 Processing Unit, which itself contains several cryptographic
149 sub-units. One set provides the Modular Arithmetic Unit,
150 used for SSL offload. The other set provides the Cipher
151 Group, which can perform encryption, decryption, hashing,
152 checksumming, and raw copies.
153
154config CRYPTO_DEV_SL3516
155 tristate "Storlink SL3516 crypto offloader"
156 depends on ARCH_GEMINI || COMPILE_TEST
157 depends on HAS_IOMEM && PM
158 select CRYPTO_SKCIPHER
159 select CRYPTO_ENGINE
160 select CRYPTO_ECB
161 select CRYPTO_AES
162 select HW_RANDOM
163 help
164 This option allows you to have support for SL3516 crypto offloader.
165
166config CRYPTO_DEV_SL3516_DEBUG
167 bool "Enable SL3516 stats"
168 depends on CRYPTO_DEV_SL3516
169 depends on DEBUG_FS
170 help
171 Say y to enable SL3516 debug stats.
172 This will create /sys/kernel/debug/sl3516/stats for displaying
173 the number of requests per algorithm and other internal stats.
174
175config CRYPTO_DEV_HIFN_795X
176 tristate "Driver HIFN 795x crypto accelerator chips"
177 select CRYPTO_LIB_DES
178 select CRYPTO_SKCIPHER
179 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
180 depends on PCI
181 depends on !ARCH_DMA_ADDR_T_64BIT
182 help
183 This option allows you to have support for HIFN 795x crypto adapters.
184
185config CRYPTO_DEV_HIFN_795X_RNG
186 bool "HIFN 795x random number generator"
187 depends on CRYPTO_DEV_HIFN_795X
188 help
189 Select this option if you want to enable the random number generator
190 on the HIFN 795x crypto adapters.
191
192source "drivers/crypto/caam/Kconfig"
193
194config CRYPTO_DEV_TALITOS
195 tristate "Talitos Freescale Security Engine (SEC)"
196 select CRYPTO_AEAD
197 select CRYPTO_AUTHENC
198 select CRYPTO_SKCIPHER
199 select CRYPTO_HASH
200 select CRYPTO_LIB_DES
201 select HW_RANDOM
202 depends on FSL_SOC
203 help
204 Say 'Y' here to use the Freescale Security Engine (SEC)
205 to offload cryptographic algorithm computation.
206
207 The Freescale SEC is present on PowerQUICC 'E' processors, such
208 as the MPC8349E and MPC8548E.
209
210 To compile this driver as a module, choose M here: the module
211 will be called talitos.
212
213config CRYPTO_DEV_TALITOS1
214 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
215 depends on CRYPTO_DEV_TALITOS
216 depends on PPC_8xx || PPC_82xx
217 default y
218 help
219 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
220 found on MPC82xx or the Freescale Security Engine (SEC Lite)
221 version 1.2 found on MPC8xx
222
223config CRYPTO_DEV_TALITOS2
224 bool "SEC2+ (SEC version 2.0 or upper)"
225 depends on CRYPTO_DEV_TALITOS
226 default y if !PPC_8xx
227 help
228 Say 'Y' here to use the Freescale Security Engine (SEC)
229 version 2 and following as found on MPC83xx, MPC85xx, etc ...
230
231config CRYPTO_DEV_PPC4XX
232 tristate "Driver AMCC PPC4xx crypto accelerator"
233 depends on PPC && 4xx
234 select CRYPTO_HASH
235 select CRYPTO_AEAD
236 select CRYPTO_AES
237 select CRYPTO_LIB_AES
238 select CRYPTO_CCM
239 select CRYPTO_CTR
240 select CRYPTO_GCM
241 select CRYPTO_SKCIPHER
242 help
243 This option allows you to have support for AMCC crypto acceleration.
244
245config HW_RANDOM_PPC4XX
246 bool "PowerPC 4xx generic true random number generator support"
247 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y
248 default y
249 help
250 This option provides the kernel-side support for the TRNG hardware
251 found in the security function of some PowerPC 4xx SoCs.
252
253config CRYPTO_DEV_OMAP
254 tristate "Support for OMAP crypto HW accelerators"
255 depends on ARCH_OMAP2PLUS
256 help
257 OMAP processors have various crypto HW accelerators. Select this if
258 you want to use the OMAP modules for any of the crypto algorithms.
259
260if CRYPTO_DEV_OMAP
261
262config CRYPTO_DEV_OMAP_SHAM
263 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
264 depends on ARCH_OMAP2PLUS
265 select CRYPTO_ENGINE
266 select CRYPTO_SHA1
267 select CRYPTO_MD5
268 select CRYPTO_SHA256
269 select CRYPTO_SHA512
270 select CRYPTO_HMAC
271 help
272 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
273 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
274
275config CRYPTO_DEV_OMAP_AES
276 tristate "Support for OMAP AES hw engine"
277 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
278 select CRYPTO_AES
279 select CRYPTO_SKCIPHER
280 select CRYPTO_ENGINE
281 select CRYPTO_CBC
282 select CRYPTO_ECB
283 select CRYPTO_CTR
284 select CRYPTO_AEAD
285 help
286 OMAP processors have AES module accelerator. Select this if you
287 want to use the OMAP module for AES algorithms.
288
289config CRYPTO_DEV_OMAP_DES
290 tristate "Support for OMAP DES/3DES hw engine"
291 depends on ARCH_OMAP2PLUS
292 select CRYPTO_LIB_DES
293 select CRYPTO_SKCIPHER
294 select CRYPTO_ENGINE
295 help
296 OMAP processors have DES/3DES module accelerator. Select this if you
297 want to use the OMAP module for DES and 3DES algorithms. Currently
298 the ECB and CBC modes of operation are supported by the driver. Also
299 accesses made on unaligned boundaries are supported.
300
301endif # CRYPTO_DEV_OMAP
302
303config CRYPTO_DEV_SAHARA
304 tristate "Support for SAHARA crypto accelerator"
305 depends on ARCH_MXC && OF
306 select CRYPTO_SKCIPHER
307 select CRYPTO_AES
308 select CRYPTO_ECB
309 select CRYPTO_ENGINE
310 help
311 This option enables support for the SAHARA HW crypto accelerator
312 found in some Freescale i.MX chips.
313
314config CRYPTO_DEV_EXYNOS_RNG
315 tristate "Exynos HW pseudo random number generator support"
316 depends on ARCH_EXYNOS || COMPILE_TEST
317 depends on HAS_IOMEM
318 select CRYPTO_RNG
319 help
320 This driver provides kernel-side support through the
321 cryptographic API for the pseudo random number generator hardware
322 found on Exynos SoCs.
323
324 To compile this driver as a module, choose M here: the
325 module will be called exynos-rng.
326
327 If unsure, say Y.
328
329config CRYPTO_DEV_S5P
330 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
331 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
332 depends on HAS_IOMEM
333 select CRYPTO_AES
334 select CRYPTO_SKCIPHER
335 help
336 This option allows you to have support for S5P crypto acceleration.
337 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
338 algorithms execution.
339
340config CRYPTO_DEV_EXYNOS_HASH
341 bool "Support for Samsung Exynos HASH accelerator"
342 depends on CRYPTO_DEV_S5P
343 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
344 select CRYPTO_SHA1
345 select CRYPTO_MD5
346 select CRYPTO_SHA256
347 help
348 Select this to offload Exynos from HASH MD5/SHA1/SHA256.
349 This will select software SHA1, MD5 and SHA256 as they are
350 needed for small and zero-size messages.
351 HASH algorithms will be disabled if EXYNOS_RNG
352 is enabled due to hw conflict.
353
354config CRYPTO_DEV_NX
355 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
356 depends on PPC64
357 help
358 This enables support for the NX hardware cryptographic accelerator
359 coprocessor that is in IBM PowerPC P7+ or later processors. This
360 does not actually enable any drivers, it only allows you to select
361 which acceleration type (encryption and/or compression) to enable.
362
363if CRYPTO_DEV_NX
364 source "drivers/crypto/nx/Kconfig"
365endif
366
367config CRYPTO_DEV_ATMEL_AUTHENC
368 bool "Support for Atmel IPSEC/SSL hw accelerator"
369 depends on ARCH_AT91 || COMPILE_TEST
370 depends on CRYPTO_DEV_ATMEL_AES
371 help
372 Some Atmel processors can combine the AES and SHA hw accelerators
373 to enhance support of IPSEC/SSL.
374 Select this if you want to use the Atmel modules for
375 authenc(hmac(shaX),Y(cbc)) algorithms.
376
377config CRYPTO_DEV_ATMEL_AES
378 tristate "Support for Atmel AES hw accelerator"
379 depends on ARCH_AT91 || COMPILE_TEST
380 select CRYPTO_AES
381 select CRYPTO_AEAD
382 select CRYPTO_SKCIPHER
383 select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC
384 select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC
385 help
386 Some Atmel processors have AES hw accelerator.
387 Select this if you want to use the Atmel module for
388 AES algorithms.
389
390 To compile this driver as a module, choose M here: the module
391 will be called atmel-aes.
392
393config CRYPTO_DEV_ATMEL_TDES
394 tristate "Support for Atmel DES/TDES hw accelerator"
395 depends on ARCH_AT91 || COMPILE_TEST
396 select CRYPTO_LIB_DES
397 select CRYPTO_SKCIPHER
398 help
399 Some Atmel processors have DES/TDES hw accelerator.
400 Select this if you want to use the Atmel module for
401 DES/TDES algorithms.
402
403 To compile this driver as a module, choose M here: the module
404 will be called atmel-tdes.
405
406config CRYPTO_DEV_ATMEL_SHA
407 tristate "Support for Atmel SHA hw accelerator"
408 depends on ARCH_AT91 || COMPILE_TEST
409 select CRYPTO_HASH
410 help
411 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
412 hw accelerator.
413 Select this if you want to use the Atmel module for
414 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
415
416 To compile this driver as a module, choose M here: the module
417 will be called atmel-sha.
418
419config CRYPTO_DEV_ATMEL_I2C
420 tristate
421 select BITREVERSE
422
423config CRYPTO_DEV_ATMEL_ECC
424 tristate "Support for Microchip / Atmel ECC hw accelerator"
425 depends on I2C
426 select CRYPTO_DEV_ATMEL_I2C
427 select CRYPTO_ECDH
428 select CRC16
429 help
430 Microhip / Atmel ECC hw accelerator.
431 Select this if you want to use the Microchip / Atmel module for
432 ECDH algorithm.
433
434 To compile this driver as a module, choose M here: the module
435 will be called atmel-ecc.
436
437config CRYPTO_DEV_ATMEL_SHA204A
438 tristate "Support for Microchip / Atmel SHA accelerator and RNG"
439 depends on I2C
440 select CRYPTO_DEV_ATMEL_I2C
441 select HW_RANDOM
442 select CRC16
443 help
444 Microhip / Atmel SHA accelerator and RNG.
445 Select this if you want to use the Microchip / Atmel SHA204A
446 module as a random number generator. (Other functions of the
447 chip are currently not exposed by this driver)
448
449 To compile this driver as a module, choose M here: the module
450 will be called atmel-sha204a.
451
452config CRYPTO_DEV_CCP
453 bool "Support for AMD Secure Processor"
454 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
455 help
456 The AMD Secure Processor provides support for the Cryptographic Coprocessor
457 (CCP) and the Platform Security Processor (PSP) devices.
458
459if CRYPTO_DEV_CCP
460 source "drivers/crypto/ccp/Kconfig"
461endif
462
463config CRYPTO_DEV_MXS_DCP
464 tristate "Support for Freescale MXS DCP"
465 depends on (ARCH_MXS || ARCH_MXC)
466 select STMP_DEVICE
467 select CRYPTO_CBC
468 select CRYPTO_ECB
469 select CRYPTO_AES
470 select CRYPTO_SKCIPHER
471 select CRYPTO_HASH
472 help
473 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
474 co-processor on the die.
475
476 To compile this driver as a module, choose M here: the module
477 will be called mxs-dcp.
478
479source "drivers/crypto/cavium/cpt/Kconfig"
480source "drivers/crypto/cavium/nitrox/Kconfig"
481source "drivers/crypto/marvell/Kconfig"
482source "drivers/crypto/intel/Kconfig"
483
484config CRYPTO_DEV_CAVIUM_ZIP
485 tristate "Cavium ZIP driver"
486 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
487 help
488 Select this option if you want to enable compression/decompression
489 acceleration on Cavium's ARM based SoCs
490
491config CRYPTO_DEV_QCE
492 tristate "Qualcomm crypto engine accelerator"
493 depends on ARCH_QCOM || COMPILE_TEST
494 depends on HAS_IOMEM
495 help
496 This driver supports Qualcomm crypto engine accelerator
497 hardware. To compile this driver as a module, choose M here. The
498 module will be called qcrypto.
499
500config CRYPTO_DEV_QCE_SKCIPHER
501 bool
502 depends on CRYPTO_DEV_QCE
503 select CRYPTO_AES
504 select CRYPTO_LIB_DES
505 select CRYPTO_ECB
506 select CRYPTO_CBC
507 select CRYPTO_XTS
508 select CRYPTO_CTR
509 select CRYPTO_SKCIPHER
510
511config CRYPTO_DEV_QCE_SHA
512 bool
513 depends on CRYPTO_DEV_QCE
514 select CRYPTO_SHA1
515 select CRYPTO_SHA256
516
517config CRYPTO_DEV_QCE_AEAD
518 bool
519 depends on CRYPTO_DEV_QCE
520 select CRYPTO_AUTHENC
521 select CRYPTO_LIB_DES
522
523choice
524 prompt "Algorithms enabled for QCE acceleration"
525 default CRYPTO_DEV_QCE_ENABLE_ALL
526 depends on CRYPTO_DEV_QCE
527 help
528 This option allows to choose whether to build support for all algorithms
529 (default), hashes-only, or skciphers-only.
530
531 The QCE engine does not appear to scale as well as the CPU to handle
532 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
533 QCE handles only 2 requests in parallel.
534
535 Ipsec throughput seems to improve when disabling either family of
536 algorithms, sharing the load with the CPU. Enabling skciphers-only
537 appears to work best.
538
539 config CRYPTO_DEV_QCE_ENABLE_ALL
540 bool "All supported algorithms"
541 select CRYPTO_DEV_QCE_SKCIPHER
542 select CRYPTO_DEV_QCE_SHA
543 select CRYPTO_DEV_QCE_AEAD
544 help
545 Enable all supported algorithms:
546 - AES (CBC, CTR, ECB, XTS)
547 - 3DES (CBC, ECB)
548 - DES (CBC, ECB)
549 - SHA1, HMAC-SHA1
550 - SHA256, HMAC-SHA256
551
552 config CRYPTO_DEV_QCE_ENABLE_SKCIPHER
553 bool "Symmetric-key ciphers only"
554 select CRYPTO_DEV_QCE_SKCIPHER
555 help
556 Enable symmetric-key ciphers only:
557 - AES (CBC, CTR, ECB, XTS)
558 - 3DES (ECB, CBC)
559 - DES (ECB, CBC)
560
561 config CRYPTO_DEV_QCE_ENABLE_SHA
562 bool "Hash/HMAC only"
563 select CRYPTO_DEV_QCE_SHA
564 help
565 Enable hashes/HMAC algorithms only:
566 - SHA1, HMAC-SHA1
567 - SHA256, HMAC-SHA256
568
569 config CRYPTO_DEV_QCE_ENABLE_AEAD
570 bool "AEAD algorithms only"
571 select CRYPTO_DEV_QCE_AEAD
572 help
573 Enable AEAD algorithms only:
574 - authenc()
575 - ccm(aes)
576 - rfc4309(ccm(aes))
577endchoice
578
579config CRYPTO_DEV_QCE_SW_MAX_LEN
580 int "Default maximum request size to use software for AES"
581 depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER
582 default 512
583 help
584 This sets the default maximum request size to perform AES requests
585 using software instead of the crypto engine. It can be changed by
586 setting the aes_sw_max_len parameter.
587
588 Small blocks are processed faster in software than hardware.
589 Considering the 256-bit ciphers, software is 2-3 times faster than
590 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
591 With 128-bit keys, the break-even point would be around 1024-bytes.
592
593 The default is set a little lower, to 512 bytes, to balance the
594 cost in CPU usage. The minimum recommended setting is 16-bytes
595 (1 AES block), since AES-GCM will fail if you set it lower.
596 Setting this to zero will send all requests to the hardware.
597
598 Note that 192-bit keys are not supported by the hardware and are
599 always processed by the software fallback, and all DES requests
600 are done by the hardware.
601
602config CRYPTO_DEV_QCOM_RNG
603 tristate "Qualcomm Random Number Generator Driver"
604 depends on ARCH_QCOM || COMPILE_TEST
605 depends on HW_RANDOM
606 select CRYPTO_RNG
607 help
608 This driver provides support for the Random Number
609 Generator hardware found on Qualcomm SoCs.
610
611 To compile this driver as a module, choose M here. The
612 module will be called qcom-rng. If unsure, say N.
613
614config CRYPTO_DEV_VMX
615 bool "Support for VMX cryptographic acceleration instructions"
616 depends on PPC64 && VSX
617 help
618 Support for VMX cryptographic acceleration instructions.
619
620source "drivers/crypto/vmx/Kconfig"
621
622config CRYPTO_DEV_IMGTEC_HASH
623 tristate "Imagination Technologies hardware hash accelerator"
624 depends on MIPS || COMPILE_TEST
625 select CRYPTO_MD5
626 select CRYPTO_SHA1
627 select CRYPTO_SHA256
628 select CRYPTO_HASH
629 help
630 This driver interfaces with the Imagination Technologies
631 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
632 hashing algorithms.
633
634config CRYPTO_DEV_ROCKCHIP
635 tristate "Rockchip's Cryptographic Engine driver"
636 depends on OF && ARCH_ROCKCHIP
637 depends on PM
638 select CRYPTO_ECB
639 select CRYPTO_CBC
640 select CRYPTO_DES
641 select CRYPTO_AES
642 select CRYPTO_ENGINE
643 select CRYPTO_LIB_DES
644 select CRYPTO_MD5
645 select CRYPTO_SHA1
646 select CRYPTO_SHA256
647 select CRYPTO_HASH
648 select CRYPTO_SKCIPHER
649
650 help
651 This driver interfaces with the hardware crypto accelerator.
652 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
653
654config CRYPTO_DEV_ROCKCHIP_DEBUG
655 bool "Enable Rockchip crypto stats"
656 depends on CRYPTO_DEV_ROCKCHIP
657 depends on DEBUG_FS
658 help
659 Say y to enable Rockchip crypto debug stats.
660 This will create /sys/kernel/debug/rk3288_crypto/stats for displaying
661 the number of requests per algorithm and other internal stats.
662
663
664config CRYPTO_DEV_ZYNQMP_AES
665 tristate "Support for Xilinx ZynqMP AES hw accelerator"
666 depends on ZYNQMP_FIRMWARE || COMPILE_TEST
667 select CRYPTO_AES
668 select CRYPTO_ENGINE
669 select CRYPTO_AEAD
670 help
671 Xilinx ZynqMP has AES-GCM engine used for symmetric key
672 encryption and decryption. This driver interfaces with AES hw
673 accelerator. Select this if you want to use the ZynqMP module
674 for AES algorithms.
675
676config CRYPTO_DEV_ZYNQMP_SHA3
677 tristate "Support for Xilinx ZynqMP SHA3 hardware accelerator"
678 depends on ZYNQMP_FIRMWARE || COMPILE_TEST
679 select CRYPTO_SHA3
680 help
681 Xilinx ZynqMP has SHA3 engine used for secure hash calculation.
682 This driver interfaces with SHA3 hardware engine.
683 Select this if you want to use the ZynqMP module
684 for SHA3 hash computation.
685
686source "drivers/crypto/chelsio/Kconfig"
687
688source "drivers/crypto/virtio/Kconfig"
689
690config CRYPTO_DEV_BCM_SPU
691 tristate "Broadcom symmetric crypto/hash acceleration support"
692 depends on ARCH_BCM_IPROC
693 depends on MAILBOX
694 default m
695 select CRYPTO_AUTHENC
696 select CRYPTO_LIB_DES
697 select CRYPTO_MD5
698 select CRYPTO_SHA1
699 select CRYPTO_SHA256
700 select CRYPTO_SHA512
701 help
702 This driver provides support for Broadcom crypto acceleration using the
703 Secure Processing Unit (SPU). The SPU driver registers skcipher,
704 ahash, and aead algorithms with the kernel cryptographic API.
705
706source "drivers/crypto/stm32/Kconfig"
707
708config CRYPTO_DEV_SAFEXCEL
709 tristate "Inside Secure's SafeXcel cryptographic engine driver"
710 depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM
711 select CRYPTO_LIB_AES
712 select CRYPTO_AUTHENC
713 select CRYPTO_SKCIPHER
714 select CRYPTO_LIB_DES
715 select CRYPTO_HASH
716 select CRYPTO_HMAC
717 select CRYPTO_MD5
718 select CRYPTO_SHA1
719 select CRYPTO_SHA256
720 select CRYPTO_SHA512
721 select CRYPTO_CHACHA20POLY1305
722 select CRYPTO_SHA3
723 help
724 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
725 engines designed by Inside Secure. It currently accelerates DES, 3DES and
726 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
727 SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
728 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
729
730config CRYPTO_DEV_ARTPEC6
731 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
732 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
733 depends on OF
734 select CRYPTO_AEAD
735 select CRYPTO_AES
736 select CRYPTO_ALGAPI
737 select CRYPTO_SKCIPHER
738 select CRYPTO_CTR
739 select CRYPTO_HASH
740 select CRYPTO_SHA1
741 select CRYPTO_SHA256
742 select CRYPTO_SHA512
743 help
744 Enables the driver for the on-chip crypto accelerator
745 of Axis ARTPEC SoCs.
746
747 To compile this driver as a module, choose M here.
748
749config CRYPTO_DEV_CCREE
750 tristate "Support for ARM TrustZone CryptoCell family of security processors"
751 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
752 depends on HAS_IOMEM
753 select CRYPTO_HASH
754 select CRYPTO_SKCIPHER
755 select CRYPTO_LIB_DES
756 select CRYPTO_AEAD
757 select CRYPTO_AUTHENC
758 select CRYPTO_SHA1
759 select CRYPTO_MD5
760 select CRYPTO_SHA256
761 select CRYPTO_SHA512
762 select CRYPTO_HMAC
763 select CRYPTO_AES
764 select CRYPTO_CBC
765 select CRYPTO_ECB
766 select CRYPTO_CTR
767 select CRYPTO_XTS
768 select CRYPTO_SM4_GENERIC
769 select CRYPTO_SM3_GENERIC
770 help
771 Say 'Y' to enable a driver for the REE interface of the Arm
772 TrustZone CryptoCell family of processors. Currently the
773 CryptoCell 713, 703, 712, 710 and 630 are supported.
774 Choose this if you wish to use hardware acceleration of
775 cryptographic operations on the system REE.
776 If unsure say Y.
777
778source "drivers/crypto/hisilicon/Kconfig"
779
780source "drivers/crypto/amlogic/Kconfig"
781
782config CRYPTO_DEV_SA2UL
783 tristate "Support for TI security accelerator"
784 depends on ARCH_K3 || COMPILE_TEST
785 select CRYPTO_AES
786 select CRYPTO_ALGAPI
787 select CRYPTO_AUTHENC
788 select CRYPTO_DES
789 select CRYPTO_SHA1
790 select CRYPTO_SHA256
791 select CRYPTO_SHA512
792 select HW_RANDOM
793 select SG_SPLIT
794 help
795 K3 devices include a security accelerator engine that may be
796 used for crypto offload. Select this if you want to use hardware
797 acceleration for cryptographic algorithms on these devices.
798
799source "drivers/crypto/aspeed/Kconfig"
800source "drivers/crypto/starfive/Kconfig"
801
802endif # CRYPTO_HW
1# SPDX-License-Identifier: GPL-2.0-only
2
3menuconfig CRYPTO_HW
4 bool "Hardware crypto devices"
5 default y
6 help
7 Say Y here to get to see options for hardware crypto devices and
8 processors. This option alone does not add any kernel code.
9
10 If you say N, all options in this submenu will be skipped and disabled.
11
12if CRYPTO_HW
13
14source "drivers/crypto/allwinner/Kconfig"
15
16config CRYPTO_DEV_PADLOCK
17 tristate "Support for VIA PadLock ACE"
18 depends on X86 && !UML
19 help
20 Some VIA processors come with an integrated crypto engine
21 (so called VIA PadLock ACE, Advanced Cryptography Engine)
22 that provides instructions for very fast cryptographic
23 operations with supported algorithms.
24
25 The instructions are used only when the CPU supports them.
26 Otherwise software encryption is used.
27
28config CRYPTO_DEV_PADLOCK_AES
29 tristate "PadLock driver for AES algorithm"
30 depends on CRYPTO_DEV_PADLOCK
31 select CRYPTO_SKCIPHER
32 select CRYPTO_LIB_AES
33 help
34 Use VIA PadLock for AES algorithm.
35
36 Available in VIA C3 and newer CPUs.
37
38 If unsure say M. The compiled module will be
39 called padlock-aes.
40
41config CRYPTO_DEV_PADLOCK_SHA
42 tristate "PadLock driver for SHA1 and SHA256 algorithms"
43 depends on CRYPTO_DEV_PADLOCK
44 select CRYPTO_HASH
45 select CRYPTO_SHA1
46 select CRYPTO_SHA256
47 help
48 Use VIA PadLock for SHA1/SHA256 algorithms.
49
50 Available in VIA C7 and newer processors.
51
52 If unsure say M. The compiled module will be
53 called padlock-sha.
54
55config CRYPTO_DEV_GEODE
56 tristate "Support for the Geode LX AES engine"
57 depends on X86_32 && PCI
58 select CRYPTO_ALGAPI
59 select CRYPTO_SKCIPHER
60 help
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
62 engine for the CryptoAPI AES algorithm.
63
64 To compile this driver as a module, choose M here: the module
65 will be called geode-aes.
66
67config ZCRYPT
68 tristate "Support for s390 cryptographic adapters"
69 depends on S390
70 select HW_RANDOM
71 help
72 Select this option if you want to enable support for
73 s390 cryptographic adapters like:
74 + Crypto Express 2 up to 7 Coprocessor (CEXxC)
75 + Crypto Express 2 up to 7 Accelerator (CEXxA)
76 + Crypto Express 4 up to 7 EP11 Coprocessor (CEXxP)
77
78config ZCRYPT_DEBUG
79 bool "Enable debug features for s390 cryptographic adapters"
80 default n
81 depends on DEBUG_KERNEL
82 depends on ZCRYPT
83 help
84 Say 'Y' here to enable some additional debug features on the
85 s390 cryptographic adapters driver.
86
87 There will be some more sysfs attributes displayed for ap cards
88 and queues and some flags on crypto requests are interpreted as
89 debugging messages to force error injection.
90
91 Do not enable on production level kernel build.
92
93 If unsure, say N.
94
95config ZCRYPT_MULTIDEVNODES
96 bool "Support for multiple zcrypt device nodes"
97 default y
98 depends on S390
99 depends on ZCRYPT
100 help
101 With this option enabled the zcrypt device driver can
102 provide multiple devices nodes in /dev. Each device
103 node can get customized to limit access and narrow
104 down the use of the available crypto hardware.
105
106config PKEY
107 tristate "Kernel API for protected key handling"
108 depends on S390
109 depends on ZCRYPT
110 help
111 With this option enabled the pkey kernel module provides an API
112 for creation and handling of protected keys. Other parts of the
113 kernel or userspace applications may use these functions.
114
115 Select this option if you want to enable the kernel and userspace
116 API for proteced key handling.
117
118 Please note that creation of protected keys from secure keys
119 requires to have at least one CEX card in coprocessor mode
120 available at runtime.
121
122config CRYPTO_PAES_S390
123 tristate "PAES cipher algorithms"
124 depends on S390
125 depends on ZCRYPT
126 depends on PKEY
127 select CRYPTO_ALGAPI
128 select CRYPTO_SKCIPHER
129 help
130 This is the s390 hardware accelerated implementation of the
131 AES cipher algorithms for use with protected key.
132
133 Select this option if you want to use the paes cipher
134 for example to use protected key encrypted devices.
135
136config S390_PRNG
137 tristate "Pseudo random number generator device driver"
138 depends on S390
139 default "m"
140 help
141 Select this option if you want to use the s390 pseudo random number
142 generator. The PRNG is part of the cryptographic processor functions
143 and uses triple-DES to generate secure random numbers like the
144 ANSI X9.17 standard. User-space programs access the
145 pseudo-random-number device through the char device /dev/prandom.
146
147 It is available as of z9.
148
149config CRYPTO_DEV_NIAGARA2
150 tristate "Niagara2 Stream Processing Unit driver"
151 select CRYPTO_LIB_DES
152 select CRYPTO_SKCIPHER
153 select CRYPTO_HASH
154 select CRYPTO_MD5
155 select CRYPTO_SHA1
156 select CRYPTO_SHA256
157 depends on SPARC64
158 help
159 Each core of a Niagara2 processor contains a Stream
160 Processing Unit, which itself contains several cryptographic
161 sub-units. One set provides the Modular Arithmetic Unit,
162 used for SSL offload. The other set provides the Cipher
163 Group, which can perform encryption, decryption, hashing,
164 checksumming, and raw copies.
165
166config CRYPTO_DEV_SL3516
167 tristate "Storlink SL3516 crypto offloader"
168 depends on ARCH_GEMINI || COMPILE_TEST
169 depends on HAS_IOMEM && PM
170 select CRYPTO_SKCIPHER
171 select CRYPTO_ENGINE
172 select CRYPTO_ECB
173 select CRYPTO_AES
174 select HW_RANDOM
175 help
176 This option allows you to have support for SL3516 crypto offloader.
177
178config CRYPTO_DEV_SL3516_DEBUG
179 bool "Enable SL3516 stats"
180 depends on CRYPTO_DEV_SL3516
181 depends on DEBUG_FS
182 help
183 Say y to enable SL3516 debug stats.
184 This will create /sys/kernel/debug/sl3516/stats for displaying
185 the number of requests per algorithm and other internal stats.
186
187config CRYPTO_DEV_HIFN_795X
188 tristate "Driver HIFN 795x crypto accelerator chips"
189 select CRYPTO_LIB_DES
190 select CRYPTO_SKCIPHER
191 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
192 depends on PCI
193 depends on !ARCH_DMA_ADDR_T_64BIT
194 help
195 This option allows you to have support for HIFN 795x crypto adapters.
196
197config CRYPTO_DEV_HIFN_795X_RNG
198 bool "HIFN 795x random number generator"
199 depends on CRYPTO_DEV_HIFN_795X
200 help
201 Select this option if you want to enable the random number generator
202 on the HIFN 795x crypto adapters.
203
204source "drivers/crypto/caam/Kconfig"
205
206config CRYPTO_DEV_TALITOS
207 tristate "Talitos Freescale Security Engine (SEC)"
208 select CRYPTO_AEAD
209 select CRYPTO_AUTHENC
210 select CRYPTO_SKCIPHER
211 select CRYPTO_HASH
212 select CRYPTO_LIB_DES
213 select HW_RANDOM
214 depends on FSL_SOC
215 help
216 Say 'Y' here to use the Freescale Security Engine (SEC)
217 to offload cryptographic algorithm computation.
218
219 The Freescale SEC is present on PowerQUICC 'E' processors, such
220 as the MPC8349E and MPC8548E.
221
222 To compile this driver as a module, choose M here: the module
223 will be called talitos.
224
225config CRYPTO_DEV_TALITOS1
226 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
227 depends on CRYPTO_DEV_TALITOS
228 depends on PPC_8xx || PPC_82xx
229 default y
230 help
231 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
232 found on MPC82xx or the Freescale Security Engine (SEC Lite)
233 version 1.2 found on MPC8xx
234
235config CRYPTO_DEV_TALITOS2
236 bool "SEC2+ (SEC version 2.0 or upper)"
237 depends on CRYPTO_DEV_TALITOS
238 default y if !PPC_8xx
239 help
240 Say 'Y' here to use the Freescale Security Engine (SEC)
241 version 2 and following as found on MPC83xx, MPC85xx, etc ...
242
243config CRYPTO_DEV_IXP4XX
244 tristate "Driver for IXP4xx crypto hardware acceleration"
245 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
246 select CRYPTO_AES
247 select CRYPTO_DES
248 select CRYPTO_ECB
249 select CRYPTO_CBC
250 select CRYPTO_CTR
251 select CRYPTO_LIB_DES
252 select CRYPTO_AEAD
253 select CRYPTO_AUTHENC
254 select CRYPTO_SKCIPHER
255 help
256 Driver for the IXP4xx NPE crypto engine.
257
258config CRYPTO_DEV_PPC4XX
259 tristate "Driver AMCC PPC4xx crypto accelerator"
260 depends on PPC && 4xx
261 select CRYPTO_HASH
262 select CRYPTO_AEAD
263 select CRYPTO_AES
264 select CRYPTO_LIB_AES
265 select CRYPTO_CCM
266 select CRYPTO_CTR
267 select CRYPTO_GCM
268 select CRYPTO_SKCIPHER
269 help
270 This option allows you to have support for AMCC crypto acceleration.
271
272config HW_RANDOM_PPC4XX
273 bool "PowerPC 4xx generic true random number generator support"
274 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y
275 default y
276 help
277 This option provides the kernel-side support for the TRNG hardware
278 found in the security function of some PowerPC 4xx SoCs.
279
280config CRYPTO_DEV_OMAP
281 tristate "Support for OMAP crypto HW accelerators"
282 depends on ARCH_OMAP2PLUS
283 help
284 OMAP processors have various crypto HW accelerators. Select this if
285 you want to use the OMAP modules for any of the crypto algorithms.
286
287if CRYPTO_DEV_OMAP
288
289config CRYPTO_DEV_OMAP_SHAM
290 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
291 depends on ARCH_OMAP2PLUS
292 select CRYPTO_ENGINE
293 select CRYPTO_SHA1
294 select CRYPTO_MD5
295 select CRYPTO_SHA256
296 select CRYPTO_SHA512
297 select CRYPTO_HMAC
298 help
299 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
300 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
301
302config CRYPTO_DEV_OMAP_AES
303 tristate "Support for OMAP AES hw engine"
304 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
305 select CRYPTO_AES
306 select CRYPTO_SKCIPHER
307 select CRYPTO_ENGINE
308 select CRYPTO_CBC
309 select CRYPTO_ECB
310 select CRYPTO_CTR
311 select CRYPTO_AEAD
312 help
313 OMAP processors have AES module accelerator. Select this if you
314 want to use the OMAP module for AES algorithms.
315
316config CRYPTO_DEV_OMAP_DES
317 tristate "Support for OMAP DES/3DES hw engine"
318 depends on ARCH_OMAP2PLUS
319 select CRYPTO_LIB_DES
320 select CRYPTO_SKCIPHER
321 select CRYPTO_ENGINE
322 help
323 OMAP processors have DES/3DES module accelerator. Select this if you
324 want to use the OMAP module for DES and 3DES algorithms. Currently
325 the ECB and CBC modes of operation are supported by the driver. Also
326 accesses made on unaligned boundaries are supported.
327
328endif # CRYPTO_DEV_OMAP
329
330config CRYPTO_DEV_SAHARA
331 tristate "Support for SAHARA crypto accelerator"
332 depends on ARCH_MXC && OF
333 select CRYPTO_SKCIPHER
334 select CRYPTO_AES
335 select CRYPTO_ECB
336 help
337 This option enables support for the SAHARA HW crypto accelerator
338 found in some Freescale i.MX chips.
339
340config CRYPTO_DEV_EXYNOS_RNG
341 tristate "Exynos HW pseudo random number generator support"
342 depends on ARCH_EXYNOS || COMPILE_TEST
343 depends on HAS_IOMEM
344 select CRYPTO_RNG
345 help
346 This driver provides kernel-side support through the
347 cryptographic API for the pseudo random number generator hardware
348 found on Exynos SoCs.
349
350 To compile this driver as a module, choose M here: the
351 module will be called exynos-rng.
352
353 If unsure, say Y.
354
355config CRYPTO_DEV_S5P
356 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
357 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
358 depends on HAS_IOMEM
359 select CRYPTO_AES
360 select CRYPTO_SKCIPHER
361 help
362 This option allows you to have support for S5P crypto acceleration.
363 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
364 algorithms execution.
365
366config CRYPTO_DEV_EXYNOS_HASH
367 bool "Support for Samsung Exynos HASH accelerator"
368 depends on CRYPTO_DEV_S5P
369 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
370 select CRYPTO_SHA1
371 select CRYPTO_MD5
372 select CRYPTO_SHA256
373 help
374 Select this to offload Exynos from HASH MD5/SHA1/SHA256.
375 This will select software SHA1, MD5 and SHA256 as they are
376 needed for small and zero-size messages.
377 HASH algorithms will be disabled if EXYNOS_RNG
378 is enabled due to hw conflict.
379
380config CRYPTO_DEV_NX
381 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
382 depends on PPC64
383 help
384 This enables support for the NX hardware cryptographic accelerator
385 coprocessor that is in IBM PowerPC P7+ or later processors. This
386 does not actually enable any drivers, it only allows you to select
387 which acceleration type (encryption and/or compression) to enable.
388
389if CRYPTO_DEV_NX
390 source "drivers/crypto/nx/Kconfig"
391endif
392
393config CRYPTO_DEV_UX500
394 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
395 depends on ARCH_U8500
396 help
397 Driver for ST-Ericsson UX500 crypto engine.
398
399if CRYPTO_DEV_UX500
400 source "drivers/crypto/ux500/Kconfig"
401endif # if CRYPTO_DEV_UX500
402
403config CRYPTO_DEV_ATMEL_AUTHENC
404 bool "Support for Atmel IPSEC/SSL hw accelerator"
405 depends on ARCH_AT91 || COMPILE_TEST
406 depends on CRYPTO_DEV_ATMEL_AES
407 help
408 Some Atmel processors can combine the AES and SHA hw accelerators
409 to enhance support of IPSEC/SSL.
410 Select this if you want to use the Atmel modules for
411 authenc(hmac(shaX),Y(cbc)) algorithms.
412
413config CRYPTO_DEV_ATMEL_AES
414 tristate "Support for Atmel AES hw accelerator"
415 depends on ARCH_AT91 || COMPILE_TEST
416 select CRYPTO_AES
417 select CRYPTO_AEAD
418 select CRYPTO_SKCIPHER
419 select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC
420 select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC
421 help
422 Some Atmel processors have AES hw accelerator.
423 Select this if you want to use the Atmel module for
424 AES algorithms.
425
426 To compile this driver as a module, choose M here: the module
427 will be called atmel-aes.
428
429config CRYPTO_DEV_ATMEL_TDES
430 tristate "Support for Atmel DES/TDES hw accelerator"
431 depends on ARCH_AT91 || COMPILE_TEST
432 select CRYPTO_LIB_DES
433 select CRYPTO_SKCIPHER
434 help
435 Some Atmel processors have DES/TDES hw accelerator.
436 Select this if you want to use the Atmel module for
437 DES/TDES algorithms.
438
439 To compile this driver as a module, choose M here: the module
440 will be called atmel-tdes.
441
442config CRYPTO_DEV_ATMEL_SHA
443 tristate "Support for Atmel SHA hw accelerator"
444 depends on ARCH_AT91 || COMPILE_TEST
445 select CRYPTO_HASH
446 help
447 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
448 hw accelerator.
449 Select this if you want to use the Atmel module for
450 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
451
452 To compile this driver as a module, choose M here: the module
453 will be called atmel-sha.
454
455config CRYPTO_DEV_ATMEL_I2C
456 tristate
457 select BITREVERSE
458
459config CRYPTO_DEV_ATMEL_ECC
460 tristate "Support for Microchip / Atmel ECC hw accelerator"
461 depends on I2C
462 select CRYPTO_DEV_ATMEL_I2C
463 select CRYPTO_ECDH
464 select CRC16
465 help
466 Microhip / Atmel ECC hw accelerator.
467 Select this if you want to use the Microchip / Atmel module for
468 ECDH algorithm.
469
470 To compile this driver as a module, choose M here: the module
471 will be called atmel-ecc.
472
473config CRYPTO_DEV_ATMEL_SHA204A
474 tristate "Support for Microchip / Atmel SHA accelerator and RNG"
475 depends on I2C
476 select CRYPTO_DEV_ATMEL_I2C
477 select HW_RANDOM
478 select CRC16
479 help
480 Microhip / Atmel SHA accelerator and RNG.
481 Select this if you want to use the Microchip / Atmel SHA204A
482 module as a random number generator. (Other functions of the
483 chip are currently not exposed by this driver)
484
485 To compile this driver as a module, choose M here: the module
486 will be called atmel-sha204a.
487
488config CRYPTO_DEV_CCP
489 bool "Support for AMD Secure Processor"
490 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
491 help
492 The AMD Secure Processor provides support for the Cryptographic Coprocessor
493 (CCP) and the Platform Security Processor (PSP) devices.
494
495if CRYPTO_DEV_CCP
496 source "drivers/crypto/ccp/Kconfig"
497endif
498
499config CRYPTO_DEV_MXS_DCP
500 tristate "Support for Freescale MXS DCP"
501 depends on (ARCH_MXS || ARCH_MXC)
502 select STMP_DEVICE
503 select CRYPTO_CBC
504 select CRYPTO_ECB
505 select CRYPTO_AES
506 select CRYPTO_SKCIPHER
507 select CRYPTO_HASH
508 help
509 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
510 co-processor on the die.
511
512 To compile this driver as a module, choose M here: the module
513 will be called mxs-dcp.
514
515source "drivers/crypto/qat/Kconfig"
516source "drivers/crypto/cavium/cpt/Kconfig"
517source "drivers/crypto/cavium/nitrox/Kconfig"
518source "drivers/crypto/marvell/Kconfig"
519
520config CRYPTO_DEV_CAVIUM_ZIP
521 tristate "Cavium ZIP driver"
522 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
523 help
524 Select this option if you want to enable compression/decompression
525 acceleration on Cavium's ARM based SoCs
526
527config CRYPTO_DEV_QCE
528 tristate "Qualcomm crypto engine accelerator"
529 depends on ARCH_QCOM || COMPILE_TEST
530 depends on HAS_IOMEM
531 help
532 This driver supports Qualcomm crypto engine accelerator
533 hardware. To compile this driver as a module, choose M here. The
534 module will be called qcrypto.
535
536config CRYPTO_DEV_QCE_SKCIPHER
537 bool
538 depends on CRYPTO_DEV_QCE
539 select CRYPTO_AES
540 select CRYPTO_LIB_DES
541 select CRYPTO_ECB
542 select CRYPTO_CBC
543 select CRYPTO_XTS
544 select CRYPTO_CTR
545 select CRYPTO_SKCIPHER
546
547config CRYPTO_DEV_QCE_SHA
548 bool
549 depends on CRYPTO_DEV_QCE
550 select CRYPTO_SHA1
551 select CRYPTO_SHA256
552
553config CRYPTO_DEV_QCE_AEAD
554 bool
555 depends on CRYPTO_DEV_QCE
556 select CRYPTO_AUTHENC
557 select CRYPTO_LIB_DES
558
559choice
560 prompt "Algorithms enabled for QCE acceleration"
561 default CRYPTO_DEV_QCE_ENABLE_ALL
562 depends on CRYPTO_DEV_QCE
563 help
564 This option allows to choose whether to build support for all algorithms
565 (default), hashes-only, or skciphers-only.
566
567 The QCE engine does not appear to scale as well as the CPU to handle
568 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
569 QCE handles only 2 requests in parallel.
570
571 Ipsec throughput seems to improve when disabling either family of
572 algorithms, sharing the load with the CPU. Enabling skciphers-only
573 appears to work best.
574
575 config CRYPTO_DEV_QCE_ENABLE_ALL
576 bool "All supported algorithms"
577 select CRYPTO_DEV_QCE_SKCIPHER
578 select CRYPTO_DEV_QCE_SHA
579 select CRYPTO_DEV_QCE_AEAD
580 help
581 Enable all supported algorithms:
582 - AES (CBC, CTR, ECB, XTS)
583 - 3DES (CBC, ECB)
584 - DES (CBC, ECB)
585 - SHA1, HMAC-SHA1
586 - SHA256, HMAC-SHA256
587
588 config CRYPTO_DEV_QCE_ENABLE_SKCIPHER
589 bool "Symmetric-key ciphers only"
590 select CRYPTO_DEV_QCE_SKCIPHER
591 help
592 Enable symmetric-key ciphers only:
593 - AES (CBC, CTR, ECB, XTS)
594 - 3DES (ECB, CBC)
595 - DES (ECB, CBC)
596
597 config CRYPTO_DEV_QCE_ENABLE_SHA
598 bool "Hash/HMAC only"
599 select CRYPTO_DEV_QCE_SHA
600 help
601 Enable hashes/HMAC algorithms only:
602 - SHA1, HMAC-SHA1
603 - SHA256, HMAC-SHA256
604
605 config CRYPTO_DEV_QCE_ENABLE_AEAD
606 bool "AEAD algorithms only"
607 select CRYPTO_DEV_QCE_AEAD
608 help
609 Enable AEAD algorithms only:
610 - authenc()
611 - ccm(aes)
612 - rfc4309(ccm(aes))
613endchoice
614
615config CRYPTO_DEV_QCE_SW_MAX_LEN
616 int "Default maximum request size to use software for AES"
617 depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER
618 default 512
619 help
620 This sets the default maximum request size to perform AES requests
621 using software instead of the crypto engine. It can be changed by
622 setting the aes_sw_max_len parameter.
623
624 Small blocks are processed faster in software than hardware.
625 Considering the 256-bit ciphers, software is 2-3 times faster than
626 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
627 With 128-bit keys, the break-even point would be around 1024-bytes.
628
629 The default is set a little lower, to 512 bytes, to balance the
630 cost in CPU usage. The minimum recommended setting is 16-bytes
631 (1 AES block), since AES-GCM will fail if you set it lower.
632 Setting this to zero will send all requests to the hardware.
633
634 Note that 192-bit keys are not supported by the hardware and are
635 always processed by the software fallback, and all DES requests
636 are done by the hardware.
637
638config CRYPTO_DEV_QCOM_RNG
639 tristate "Qualcomm Random Number Generator Driver"
640 depends on ARCH_QCOM || COMPILE_TEST
641 select CRYPTO_RNG
642 help
643 This driver provides support for the Random Number
644 Generator hardware found on Qualcomm SoCs.
645
646 To compile this driver as a module, choose M here. The
647 module will be called qcom-rng. If unsure, say N.
648
649config CRYPTO_DEV_VMX
650 bool "Support for VMX cryptographic acceleration instructions"
651 depends on PPC64 && VSX
652 help
653 Support for VMX cryptographic acceleration instructions.
654
655source "drivers/crypto/vmx/Kconfig"
656
657config CRYPTO_DEV_IMGTEC_HASH
658 tristate "Imagination Technologies hardware hash accelerator"
659 depends on MIPS || COMPILE_TEST
660 select CRYPTO_MD5
661 select CRYPTO_SHA1
662 select CRYPTO_SHA256
663 select CRYPTO_HASH
664 help
665 This driver interfaces with the Imagination Technologies
666 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
667 hashing algorithms.
668
669config CRYPTO_DEV_ROCKCHIP
670 tristate "Rockchip's Cryptographic Engine driver"
671 depends on OF && ARCH_ROCKCHIP
672 depends on PM
673 select CRYPTO_ECB
674 select CRYPTO_CBC
675 select CRYPTO_DES
676 select CRYPTO_AES
677 select CRYPTO_ENGINE
678 select CRYPTO_LIB_DES
679 select CRYPTO_MD5
680 select CRYPTO_SHA1
681 select CRYPTO_SHA256
682 select CRYPTO_HASH
683 select CRYPTO_SKCIPHER
684
685 help
686 This driver interfaces with the hardware crypto accelerator.
687 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
688
689config CRYPTO_DEV_ROCKCHIP_DEBUG
690 bool "Enable Rockchip crypto stats"
691 depends on CRYPTO_DEV_ROCKCHIP
692 depends on DEBUG_FS
693 help
694 Say y to enable Rockchip crypto debug stats.
695 This will create /sys/kernel/debug/rk3288_crypto/stats for displaying
696 the number of requests per algorithm and other internal stats.
697
698
699config CRYPTO_DEV_ZYNQMP_AES
700 tristate "Support for Xilinx ZynqMP AES hw accelerator"
701 depends on ZYNQMP_FIRMWARE || COMPILE_TEST
702 select CRYPTO_AES
703 select CRYPTO_ENGINE
704 select CRYPTO_AEAD
705 help
706 Xilinx ZynqMP has AES-GCM engine used for symmetric key
707 encryption and decryption. This driver interfaces with AES hw
708 accelerator. Select this if you want to use the ZynqMP module
709 for AES algorithms.
710
711config CRYPTO_DEV_ZYNQMP_SHA3
712 tristate "Support for Xilinx ZynqMP SHA3 hardware accelerator"
713 depends on ZYNQMP_FIRMWARE || COMPILE_TEST
714 select CRYPTO_SHA3
715 help
716 Xilinx ZynqMP has SHA3 engine used for secure hash calculation.
717 This driver interfaces with SHA3 hardware engine.
718 Select this if you want to use the ZynqMP module
719 for SHA3 hash computation.
720
721source "drivers/crypto/chelsio/Kconfig"
722
723source "drivers/crypto/virtio/Kconfig"
724
725config CRYPTO_DEV_BCM_SPU
726 tristate "Broadcom symmetric crypto/hash acceleration support"
727 depends on ARCH_BCM_IPROC
728 depends on MAILBOX
729 default m
730 select CRYPTO_AUTHENC
731 select CRYPTO_LIB_DES
732 select CRYPTO_MD5
733 select CRYPTO_SHA1
734 select CRYPTO_SHA256
735 select CRYPTO_SHA512
736 help
737 This driver provides support for Broadcom crypto acceleration using the
738 Secure Processing Unit (SPU). The SPU driver registers skcipher,
739 ahash, and aead algorithms with the kernel cryptographic API.
740
741source "drivers/crypto/stm32/Kconfig"
742
743config CRYPTO_DEV_SAFEXCEL
744 tristate "Inside Secure's SafeXcel cryptographic engine driver"
745 depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM
746 select CRYPTO_LIB_AES
747 select CRYPTO_AUTHENC
748 select CRYPTO_SKCIPHER
749 select CRYPTO_LIB_DES
750 select CRYPTO_HASH
751 select CRYPTO_HMAC
752 select CRYPTO_MD5
753 select CRYPTO_SHA1
754 select CRYPTO_SHA256
755 select CRYPTO_SHA512
756 select CRYPTO_CHACHA20POLY1305
757 select CRYPTO_SHA3
758 help
759 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
760 engines designed by Inside Secure. It currently accelerates DES, 3DES and
761 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
762 SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
763 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
764
765config CRYPTO_DEV_ARTPEC6
766 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
767 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
768 depends on OF
769 select CRYPTO_AEAD
770 select CRYPTO_AES
771 select CRYPTO_ALGAPI
772 select CRYPTO_SKCIPHER
773 select CRYPTO_CTR
774 select CRYPTO_HASH
775 select CRYPTO_SHA1
776 select CRYPTO_SHA256
777 select CRYPTO_SHA512
778 help
779 Enables the driver for the on-chip crypto accelerator
780 of Axis ARTPEC SoCs.
781
782 To compile this driver as a module, choose M here.
783
784config CRYPTO_DEV_CCREE
785 tristate "Support for ARM TrustZone CryptoCell family of security processors"
786 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
787 default n
788 select CRYPTO_HASH
789 select CRYPTO_SKCIPHER
790 select CRYPTO_LIB_DES
791 select CRYPTO_AEAD
792 select CRYPTO_AUTHENC
793 select CRYPTO_SHA1
794 select CRYPTO_MD5
795 select CRYPTO_SHA256
796 select CRYPTO_SHA512
797 select CRYPTO_HMAC
798 select CRYPTO_AES
799 select CRYPTO_CBC
800 select CRYPTO_ECB
801 select CRYPTO_CTR
802 select CRYPTO_XTS
803 select CRYPTO_SM4_GENERIC
804 select CRYPTO_SM3_GENERIC
805 help
806 Say 'Y' to enable a driver for the REE interface of the Arm
807 TrustZone CryptoCell family of processors. Currently the
808 CryptoCell 713, 703, 712, 710 and 630 are supported.
809 Choose this if you wish to use hardware acceleration of
810 cryptographic operations on the system REE.
811 If unsure say Y.
812
813source "drivers/crypto/hisilicon/Kconfig"
814
815source "drivers/crypto/amlogic/Kconfig"
816
817config CRYPTO_DEV_SA2UL
818 tristate "Support for TI security accelerator"
819 depends on ARCH_K3 || COMPILE_TEST
820 select CRYPTO_AES
821 select CRYPTO_ALGAPI
822 select CRYPTO_AUTHENC
823 select CRYPTO_SHA1
824 select CRYPTO_SHA256
825 select CRYPTO_SHA512
826 select HW_RANDOM
827 select SG_SPLIT
828 help
829 K3 devices include a security accelerator engine that may be
830 used for crypto offload. Select this if you want to use hardware
831 acceleration for cryptographic algorithms on these devices.
832
833source "drivers/crypto/keembay/Kconfig"
834source "drivers/crypto/aspeed/Kconfig"
835
836endif # CRYPTO_HW