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v6.8
  1// SPDX-License-Identifier: GPL-2.0
  2// Copyright (c) 2020 Silex Insight
  3
  4#include <linux/delay.h>
  5#include <linux/hw_random.h>
  6#include <linux/io.h>
  7#include <linux/iopoll.h>
  8#include <linux/kernel.h>
  9#include <linux/mod_devicetable.h>
 10#include <linux/module.h>
 11#include <linux/platform_device.h>
 12#include <linux/workqueue.h>
 13
 14#define BA431_RESET_DELAY			1 /* usec */
 15#define BA431_RESET_READ_STATUS_TIMEOUT		1000 /* usec */
 16#define BA431_RESET_READ_STATUS_INTERVAL	10 /* usec */
 17#define BA431_READ_RETRY_INTERVAL		1 /* usec */
 18
 19#define BA431_REG_CTRL				0x00
 20#define BA431_REG_FIFO_LEVEL			0x04
 21#define BA431_REG_STATUS			0x30
 22#define BA431_REG_FIFODATA			0x80
 23
 24#define BA431_CTRL_ENABLE			BIT(0)
 25#define BA431_CTRL_SOFTRESET			BIT(8)
 26
 27#define BA431_STATUS_STATE_MASK			(BIT(1) | BIT(2) | BIT(3))
 28#define BA431_STATUS_STATE_OFFSET		1
 29
 30enum ba431_state {
 31	BA431_STATE_RESET,
 32	BA431_STATE_STARTUP,
 33	BA431_STATE_FIFOFULLON,
 34	BA431_STATE_FIFOFULLOFF,
 35	BA431_STATE_RUNNING,
 36	BA431_STATE_ERROR
 37};
 38
 39struct ba431_trng {
 40	struct device *dev;
 41	void __iomem *base;
 42	struct hwrng rng;
 43	atomic_t reset_pending;
 44	struct work_struct reset_work;
 45};
 46
 47static inline u32 ba431_trng_read_reg(struct ba431_trng *ba431, u32 reg)
 48{
 49	return ioread32(ba431->base + reg);
 50}
 51
 52static inline void ba431_trng_write_reg(struct ba431_trng *ba431, u32 reg,
 53					u32 val)
 54{
 55	iowrite32(val, ba431->base + reg);
 56}
 57
 58static inline enum ba431_state ba431_trng_get_state(struct ba431_trng *ba431)
 59{
 60	u32 status = ba431_trng_read_reg(ba431, BA431_REG_STATUS);
 61
 62	return (status & BA431_STATUS_STATE_MASK) >> BA431_STATUS_STATE_OFFSET;
 63}
 64
 65static int ba431_trng_is_in_error(struct ba431_trng *ba431)
 66{
 67	enum ba431_state state = ba431_trng_get_state(ba431);
 68
 69	if ((state < BA431_STATE_STARTUP) ||
 70	    (state >= BA431_STATE_ERROR))
 71		return 1;
 72
 73	return 0;
 74}
 75
 76static int ba431_trng_reset(struct ba431_trng *ba431)
 77{
 78	int ret;
 79
 80	/* Disable interrupts, random generation and enable the softreset */
 81	ba431_trng_write_reg(ba431, BA431_REG_CTRL, BA431_CTRL_SOFTRESET);
 82	udelay(BA431_RESET_DELAY);
 83	ba431_trng_write_reg(ba431, BA431_REG_CTRL, BA431_CTRL_ENABLE);
 84
 85	/* Wait until the state changed */
 86	if (readx_poll_timeout(ba431_trng_is_in_error, ba431, ret, !ret,
 87			       BA431_RESET_READ_STATUS_INTERVAL,
 88			       BA431_RESET_READ_STATUS_TIMEOUT)) {
 89		dev_err(ba431->dev, "reset failed (state: %d)\n",
 90			ba431_trng_get_state(ba431));
 91		return -ETIMEDOUT;
 92	}
 93
 94	dev_info(ba431->dev, "reset done\n");
 95
 96	return 0;
 97}
 98
 99static void ba431_trng_reset_work(struct work_struct *work)
100{
101	struct ba431_trng *ba431 = container_of(work, struct ba431_trng,
102						reset_work);
103	ba431_trng_reset(ba431);
104	atomic_set(&ba431->reset_pending, 0);
105}
106
107static void ba431_trng_schedule_reset(struct ba431_trng *ba431)
108{
109	if (atomic_cmpxchg(&ba431->reset_pending, 0, 1))
110		return;
111
112	schedule_work(&ba431->reset_work);
113}
114
115static int ba431_trng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
116{
117	struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
118	u32 *data = buf;
119	unsigned int level, i;
120	int n = 0;
121
122	while (max > 0) {
123		level = ba431_trng_read_reg(ba431, BA431_REG_FIFO_LEVEL);
124		if (!level) {
125			if (ba431_trng_is_in_error(ba431)) {
126				ba431_trng_schedule_reset(ba431);
127				break;
128			}
129
130			if (!wait)
131				break;
132
133			udelay(BA431_READ_RETRY_INTERVAL);
134			continue;
135		}
136
137		i = level;
138		do {
139			data[n++] = ba431_trng_read_reg(ba431,
140							BA431_REG_FIFODATA);
141			max -= sizeof(*data);
142		} while (--i && (max > 0));
143
144		if (ba431_trng_is_in_error(ba431)) {
145			n -= (level - i);
146			ba431_trng_schedule_reset(ba431);
147			break;
148		}
149	}
150
151	n *= sizeof(data);
152	return (n || !wait) ? n : -EIO;
153}
154
155static void ba431_trng_cleanup(struct hwrng *rng)
156{
157	struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
158
159	ba431_trng_write_reg(ba431, BA431_REG_CTRL, 0);
160	cancel_work_sync(&ba431->reset_work);
161}
162
163static int ba431_trng_init(struct hwrng *rng)
164{
165	struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
166
167	return ba431_trng_reset(ba431);
168}
169
170static int ba431_trng_probe(struct platform_device *pdev)
171{
172	struct ba431_trng *ba431;
173	int ret;
174
175	ba431 = devm_kzalloc(&pdev->dev, sizeof(*ba431), GFP_KERNEL);
176	if (!ba431)
177		return -ENOMEM;
178
179	ba431->dev = &pdev->dev;
180
181	ba431->base = devm_platform_ioremap_resource(pdev, 0);
182	if (IS_ERR(ba431->base))
183		return PTR_ERR(ba431->base);
184
185	atomic_set(&ba431->reset_pending, 0);
186	INIT_WORK(&ba431->reset_work, ba431_trng_reset_work);
187	ba431->rng.name = pdev->name;
188	ba431->rng.init = ba431_trng_init;
189	ba431->rng.cleanup = ba431_trng_cleanup;
190	ba431->rng.read = ba431_trng_read;
191
 
 
192	ret = devm_hwrng_register(&pdev->dev, &ba431->rng);
193	if (ret)
194		return dev_err_probe(&pdev->dev, ret, "BA431 registration failed\n");
 
 
195
196	dev_info(&pdev->dev, "BA431 TRNG registered\n");
197
198	return 0;
199}
200
201static const struct of_device_id ba431_trng_dt_ids[] = {
202	{ .compatible = "silex-insight,ba431-rng" },
203	{ /* sentinel */ }
204};
205MODULE_DEVICE_TABLE(of, ba431_trng_dt_ids);
206
207static struct platform_driver ba431_trng_driver = {
208	.driver = {
209		.name = "ba431-rng",
210		.of_match_table = ba431_trng_dt_ids,
211	},
212	.probe = ba431_trng_probe,
213};
214
215module_platform_driver(ba431_trng_driver);
216
217MODULE_AUTHOR("Olivier Sobrie <olivier@sobrie.be>");
218MODULE_DESCRIPTION("TRNG driver for Silex Insight BA431");
219MODULE_LICENSE("GPL");
v6.2
  1// SPDX-License-Identifier: GPL-2.0
  2// Copyright (c) 2020 Silex Insight
  3
  4#include <linux/delay.h>
  5#include <linux/hw_random.h>
  6#include <linux/io.h>
  7#include <linux/iopoll.h>
  8#include <linux/kernel.h>
  9#include <linux/mod_devicetable.h>
 10#include <linux/module.h>
 11#include <linux/platform_device.h>
 12#include <linux/workqueue.h>
 13
 14#define BA431_RESET_DELAY			1 /* usec */
 15#define BA431_RESET_READ_STATUS_TIMEOUT		1000 /* usec */
 16#define BA431_RESET_READ_STATUS_INTERVAL	10 /* usec */
 17#define BA431_READ_RETRY_INTERVAL		1 /* usec */
 18
 19#define BA431_REG_CTRL				0x00
 20#define BA431_REG_FIFO_LEVEL			0x04
 21#define BA431_REG_STATUS			0x30
 22#define BA431_REG_FIFODATA			0x80
 23
 24#define BA431_CTRL_ENABLE			BIT(0)
 25#define BA431_CTRL_SOFTRESET			BIT(8)
 26
 27#define BA431_STATUS_STATE_MASK			(BIT(1) | BIT(2) | BIT(3))
 28#define BA431_STATUS_STATE_OFFSET		1
 29
 30enum ba431_state {
 31	BA431_STATE_RESET,
 32	BA431_STATE_STARTUP,
 33	BA431_STATE_FIFOFULLON,
 34	BA431_STATE_FIFOFULLOFF,
 35	BA431_STATE_RUNNING,
 36	BA431_STATE_ERROR
 37};
 38
 39struct ba431_trng {
 40	struct device *dev;
 41	void __iomem *base;
 42	struct hwrng rng;
 43	atomic_t reset_pending;
 44	struct work_struct reset_work;
 45};
 46
 47static inline u32 ba431_trng_read_reg(struct ba431_trng *ba431, u32 reg)
 48{
 49	return ioread32(ba431->base + reg);
 50}
 51
 52static inline void ba431_trng_write_reg(struct ba431_trng *ba431, u32 reg,
 53					u32 val)
 54{
 55	iowrite32(val, ba431->base + reg);
 56}
 57
 58static inline enum ba431_state ba431_trng_get_state(struct ba431_trng *ba431)
 59{
 60	u32 status = ba431_trng_read_reg(ba431, BA431_REG_STATUS);
 61
 62	return (status & BA431_STATUS_STATE_MASK) >> BA431_STATUS_STATE_OFFSET;
 63}
 64
 65static int ba431_trng_is_in_error(struct ba431_trng *ba431)
 66{
 67	enum ba431_state state = ba431_trng_get_state(ba431);
 68
 69	if ((state < BA431_STATE_STARTUP) ||
 70	    (state >= BA431_STATE_ERROR))
 71		return 1;
 72
 73	return 0;
 74}
 75
 76static int ba431_trng_reset(struct ba431_trng *ba431)
 77{
 78	int ret;
 79
 80	/* Disable interrupts, random generation and enable the softreset */
 81	ba431_trng_write_reg(ba431, BA431_REG_CTRL, BA431_CTRL_SOFTRESET);
 82	udelay(BA431_RESET_DELAY);
 83	ba431_trng_write_reg(ba431, BA431_REG_CTRL, BA431_CTRL_ENABLE);
 84
 85	/* Wait until the state changed */
 86	if (readx_poll_timeout(ba431_trng_is_in_error, ba431, ret, !ret,
 87			       BA431_RESET_READ_STATUS_INTERVAL,
 88			       BA431_RESET_READ_STATUS_TIMEOUT)) {
 89		dev_err(ba431->dev, "reset failed (state: %d)\n",
 90			ba431_trng_get_state(ba431));
 91		return -ETIMEDOUT;
 92	}
 93
 94	dev_info(ba431->dev, "reset done\n");
 95
 96	return 0;
 97}
 98
 99static void ba431_trng_reset_work(struct work_struct *work)
100{
101	struct ba431_trng *ba431 = container_of(work, struct ba431_trng,
102						reset_work);
103	ba431_trng_reset(ba431);
104	atomic_set(&ba431->reset_pending, 0);
105}
106
107static void ba431_trng_schedule_reset(struct ba431_trng *ba431)
108{
109	if (atomic_cmpxchg(&ba431->reset_pending, 0, 1))
110		return;
111
112	schedule_work(&ba431->reset_work);
113}
114
115static int ba431_trng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
116{
117	struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
118	u32 *data = buf;
119	unsigned int level, i;
120	int n = 0;
121
122	while (max > 0) {
123		level = ba431_trng_read_reg(ba431, BA431_REG_FIFO_LEVEL);
124		if (!level) {
125			if (ba431_trng_is_in_error(ba431)) {
126				ba431_trng_schedule_reset(ba431);
127				break;
128			}
129
130			if (!wait)
131				break;
132
133			udelay(BA431_READ_RETRY_INTERVAL);
134			continue;
135		}
136
137		i = level;
138		do {
139			data[n++] = ba431_trng_read_reg(ba431,
140							BA431_REG_FIFODATA);
141			max -= sizeof(*data);
142		} while (--i && (max > 0));
143
144		if (ba431_trng_is_in_error(ba431)) {
145			n -= (level - i);
146			ba431_trng_schedule_reset(ba431);
147			break;
148		}
149	}
150
151	n *= sizeof(data);
152	return (n || !wait) ? n : -EIO;
153}
154
155static void ba431_trng_cleanup(struct hwrng *rng)
156{
157	struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
158
159	ba431_trng_write_reg(ba431, BA431_REG_CTRL, 0);
160	cancel_work_sync(&ba431->reset_work);
161}
162
163static int ba431_trng_init(struct hwrng *rng)
164{
165	struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
166
167	return ba431_trng_reset(ba431);
168}
169
170static int ba431_trng_probe(struct platform_device *pdev)
171{
172	struct ba431_trng *ba431;
173	int ret;
174
175	ba431 = devm_kzalloc(&pdev->dev, sizeof(*ba431), GFP_KERNEL);
176	if (!ba431)
177		return -ENOMEM;
178
179	ba431->dev = &pdev->dev;
180
181	ba431->base = devm_platform_ioremap_resource(pdev, 0);
182	if (IS_ERR(ba431->base))
183		return PTR_ERR(ba431->base);
184
185	atomic_set(&ba431->reset_pending, 0);
186	INIT_WORK(&ba431->reset_work, ba431_trng_reset_work);
187	ba431->rng.name = pdev->name;
188	ba431->rng.init = ba431_trng_init;
189	ba431->rng.cleanup = ba431_trng_cleanup;
190	ba431->rng.read = ba431_trng_read;
191
192	platform_set_drvdata(pdev, ba431);
193
194	ret = devm_hwrng_register(&pdev->dev, &ba431->rng);
195	if (ret) {
196		dev_err(&pdev->dev, "BA431 registration failed (%d)\n", ret);
197		return ret;
198	}
199
200	dev_info(&pdev->dev, "BA431 TRNG registered\n");
201
202	return 0;
203}
204
205static const struct of_device_id ba431_trng_dt_ids[] = {
206	{ .compatible = "silex-insight,ba431-rng", .data = NULL },
207	{ /* sentinel */ }
208};
209MODULE_DEVICE_TABLE(of, ba431_trng_dt_ids);
210
211static struct platform_driver ba431_trng_driver = {
212	.driver = {
213		.name = "ba431-rng",
214		.of_match_table = ba431_trng_dt_ids,
215	},
216	.probe = ba431_trng_probe,
217};
218
219module_platform_driver(ba431_trng_driver);
220
221MODULE_AUTHOR("Olivier Sobrie <olivier@sobrie.be>");
222MODULE_DESCRIPTION("TRNG driver for Silex Insight BA431");
223MODULE_LICENSE("GPL");